From c15e5d0e9ddf6ef1ebc5def82fec18883e03130c Mon Sep 17 00:00:00 2001 From: Vladimir Indic Date: Mon, 10 Jun 2024 13:12:15 -0700 Subject: [PATCH] PC Sampling: Add s_nop prior to s_sendmeg Add s_nop before s_sendmsg. This is required because the HW does not check for dependencies for SALU writes to M0. Section 4.5: Manually Inserted Wait States (NOPs) "AMD Instinct MI200" Instruction Set Architecture https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/instruction-set-architectures/instinct-mi200-cdna2-instruction-set-architecture.pdf Change-Id: I90f503e3cc80cd29eab8bafa2565699461654055 Signed-off-by: Chris Freehill --- runtime/hsa-runtime/core/runtime/trap_handler/trap_handler.s | 1 + 1 file changed, 1 insertion(+) diff --git a/runtime/hsa-runtime/core/runtime/trap_handler/trap_handler.s b/runtime/hsa-runtime/core/runtime/trap_handler/trap_handler.s index 2e4dbf3a46..3933c926e0 100644 --- a/runtime/hsa-runtime/core/runtime/trap_handler/trap_handler.s +++ b/runtime/hsa-runtime/core/runtime/trap_handler/trap_handler.s @@ -393,6 +393,7 @@ trap_entry: s_waitcnt lgkmcnt(0) s_mov_b32 ttmp13, m0 // save off m0 s_mov_b32 m0, ttmp7 // put ID into message payload + s_nop 0x0 // Manually inserted wait states s_sendmsg sendmsg(MSG_INTERRUPT) // send interrupt message s_waitcnt lgkmcnt(0) // wait for message to be sent s_mov_b32 m0, ttmp13 // restore m0