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Guard #ifdef USE_ROCR_20 is added for ROCR_20 device properties (memoryClockRate, memoryBusWidth)

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By default isn't defined.
To add ROCR_20 support HIP have to be compiled as follows: make CXX_DEFINES+=-DUSE_ROCR_20


[ROCm/hip commit: 833c9e52ad]
This commit is contained in:
Evgeny Mankov
2016-02-19 13:27:03 +03:00
parent 68621c6702
commit c3a600c63b
5 changed files with 15 additions and 1 deletions
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projects/hip/include/hip_runtime_api.h
+4
View File
@@ -81,8 +81,10 @@ typedef struct hipDeviceProp_t {
int maxThreadsDim[3]; ///< Max number of threads in each dimension (XYZ) of a block.
int maxGridSize[3]; ///< Max grid dimensions (XYZ).
int clockRate; ///< Max clock frequency of the multiProcessors in khz.
#ifdef USE_ROCR_20
int memoryClockRate; ///< Max global memory clock frequency in khz.
int memoryBusWidth; ///< Global memory bus width in bits.
#endif
size_t totalConstMem; ///< Size of shared memory region (in bytes).
int major; ///< Major compute capability. On HCC, this is an approximation and features may differ from CUDA CC. See the arch feature flags for portable ways to query feature caps.
int minor; ///< Minor compute capability. On HCC, this is an approximation and features may differ from CUDA CC. See the arch feature flags for portable ways to query feature caps.
@@ -145,8 +147,10 @@ typedef enum hipDeviceAttribute_t {
hipDeviceAttributeWarpSize, ///< Warp size in threads.
hipDeviceAttributeMaxRegistersPerBlock, ///< Maximum number of 32-bit registers available to a thread block. This number is shared by all thread blocks simultaneously resident on a multiprocessor.
hipDeviceAttributeClockRate, ///< Peak clock frequency in kilohertz.
#ifdef USE_ROCR_20
hipDeviceAttributeMemoryClockRate, ///< Peak memory clock frequency in kilohertz.
hipDeviceAttributeMemoryBusWidth, ///< Global memory bus width in bits.
#endif
hipDeviceAttributeMultiprocessorCount, ///< Number of multiprocessors on the device.
hipDeviceAttributeComputeMode, ///< Compute mode that device is currently in.
hipDeviceAttributeL2CacheSize, ///< Size of L2 cache in bytes. 0 if the device doesn't have L2 cache.
projects/hip/include/nvcc_detail/hip_runtime_api.h
+2
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@@ -242,10 +242,12 @@ inline static hipError_t hipDeviceGetAttribute(int* pi, hipDeviceAttribute_t att
cdattr = cudaDevAttrMaxRegistersPerBlock; break;
case hipDeviceAttributeClockRate:
cdattr = cudaDevAttrClockRate; break;
#ifdef USE_ROCR_20
case hipDeviceAttributeMemoryClockRate:
cdattr = cudaDevAttrMemoryClockRate; break;
case hipDeviceAttributeMemoryBusWidth:
cdattr = cudaDevAttrGlobalMemoryBusWidth; break;
#endif
case hipDeviceAttributeMultiprocessorCount:
cdattr = cudaDevAttrMultiProcessorCount; break;
case hipDeviceAttributeComputeMode: