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SWDEV-290160 - Don't send notification for batch markers

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Batch marker already has a barrier with HSA signal callback

Change-Id: I69fc63d72320c2e9cc2d2e59ebd3f07c0bd0e3b5
This commit is contained in:
German Andryeyev
2021-06-15 23:13:27 -04:00
committed by Maneesh Gupta
parent 83ca0821af
commit c49f1069ab
2 changed files with 5 additions and 10 deletions
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rocclr/device/rocm/rocvirtual.cpp
+2 -1
View File
@@ -1239,7 +1239,8 @@ void VirtualGPU::profilingEnd(amd::Command& command) {
timestamp_->end(); timestamp_->end();
} }
command.setData(timestamp_); command.setData(timestamp_);
if (AMD_DIRECT_DISPATCH) { // Update HW event only for batches
if ((AMD_DIRECT_DISPATCH) && (command.GetBatchHead() != nullptr)) {
command.SetHwEvent(timestamp_->Signals().back()); command.SetHwEvent(timestamp_->Signals().back());
} }
timestamp_ = nullptr; timestamp_ = nullptr;
rocclr/platform/command.cpp
+3 -9
View File
@@ -259,15 +259,9 @@ bool Event::notifyCmdQueue() {
HostQueue* queue = command().queue(); HostQueue* queue = command().queue();
if ((status() > CL_COMPLETE) && (nullptr != queue) && if ((status() > CL_COMPLETE) && (nullptr != queue) &&
(!AMD_DIRECT_DISPATCH || (!AMD_DIRECT_DISPATCH ||
// Don't need to notify any marker with direct dispatch, // If HW event was assigned, then notification can be ignored, since a barrier was issued
// because all markers are blocking. (HwEvent() == nullptr)) &&
((command().type() != CL_COMMAND_MARKER) && !notified_.test_and_set()) {
(command().type() != 0)) ||
// Don't need to notify if the current batch is empty,
// because that means the command was processed and extra notification
// will cause a stall on the host.
(queue->GetSubmittionBatch() != nullptr)) &&
!notified_.test_and_set()) {
// Make sure the queue is draining the enqueued commands. // Make sure the queue is draining the enqueued commands.
amd::Command* command = new amd::Marker(*queue, false, nullWaitList, this); amd::Command* command = new amd::Marker(*queue, false, nullWaitList, this);
if (command == NULL) { if (command == NULL) {