Merge rocm-smi/amd-staging into amd-dev 20240119

Change-Id: Ie706473ff92a91b19e95d2d58f64904cad73a89a
Signed-off-by: Charis Poag <Charis.Poag@amd.com>


[ROCm/amdsmi commit: 6132074089]
This commit is contained in:
Charis Poag
2024-01-19 02:45:37 -06:00
parent c081e9e6f8
commit c5ba765be0
23 changed files with 1083 additions and 218 deletions
@@ -80,6 +80,7 @@ extern "C" {
//! The number of points that make up a voltage-frequency curve definition
#define RSMI_NUM_VOLTAGE_CURVE_POINTS 3
/**
* @brief Error codes retured by rocm_smi_lib functions
*/
@@ -353,7 +354,7 @@ typedef struct {
* Clock types
*/
typedef enum {
RSMI_CLK_TYPE_SYS = 0x0, //!< System clock
RSMI_CLK_TYPE_SYS = 0x0, //!< System clock
RSMI_CLK_TYPE_FIRST = RSMI_CLK_TYPE_SYS,
RSMI_CLK_TYPE_DF, //!< Data Fabric clock (for ASICs
//!< running on a separate clock)
@@ -970,6 +971,9 @@ struct metrics_table_header_t {
uint8_t content_revision;
/// \endcond
};
/// \cond Ignore in docs.
typedef struct metrics_table_header_t metrics_table_header_t;
/// \endcond
/**
* @brief The following structure holds the gpu metrics values for a device.
@@ -986,9 +990,14 @@ struct metrics_table_header_t {
#define RSMI_NUM_HBM_INSTANCES 4
/**
* @brief This should match kRSMI_MAX_NUM_VCN
* @brief This should match kRSMI_MAX_NUM_VCNS
*/
#define RSMI_MAX_NUM_VCN 4
#define RSMI_MAX_NUM_VCNS 4
/**
* @brief This should match kRSMI_MAX_JPEG_ENGINES
*/
#define RSMI_MAX_NUM_JPEG_ENGS 32
/**
* @brief This should match kRSMI_MAX_NUM_CLKS
@@ -1109,7 +1118,7 @@ typedef struct {
uint16_t current_socket_power;
// Utilization (%)
uint16_t vcn_activity[RSMI_MAX_NUM_VCN]; // VCN instances activity percent (encode/decode)
uint16_t vcn_activity[RSMI_MAX_NUM_VCNS]; // VCN instances activity percent (encode/decode)
// Clock Lock Status. Each bit corresponds to clock instance
uint32_t gfxclk_lock_status;
@@ -1143,6 +1152,19 @@ typedef struct {
uint16_t current_vclk0s[RSMI_MAX_NUM_CLKS];
uint16_t current_dclk0s[RSMI_MAX_NUM_CLKS];
/*
* v1.5 additions
*/
// JPEG activity percent (encode/decode)
uint16_t jpeg_activity[RSMI_MAX_NUM_JPEG_ENGS];
// PCIE NAK sent accumulated count
uint32_t pcie_nak_sent_count_acc;
// PCIE NAK received accumulated count
uint32_t pcie_nak_rcvd_count_acc;
/// \endcond
} rsmi_gpu_metrics_t;
@@ -1358,7 +1380,7 @@ rsmi_status_t rsmi_dev_revision_get(uint32_t dv_ind, uint16_t *revision);
* @retval ::RSMI_STATUS_INVALID_ARGS the provided arguments are not valid
*
*/
rsmi_status_t rsmi_dev_sku_get(uint32_t dv_ind, uint16_t *sku);
rsmi_status_t rsmi_dev_sku_get(uint32_t dv_ind, char *sku);
/**
* @brief Get the device vendor id associated with the device with provided
@@ -1733,7 +1755,6 @@ rsmi_status_t rsmi_dev_subsystem_vendor_id_get(uint32_t dv_ind, uint16_t *id);
*/
rsmi_status_t rsmi_dev_unique_id_get(uint32_t dv_ind, uint64_t *id);
/**
* @brief Get the XGMI physical id associated with the device
*
@@ -4097,7 +4118,7 @@ rsmi_is_P2P_accessible(uint32_t dv_ind_src, uint32_t dv_ind_dst,
/** @} */ // end of HWTopo
/*****************************************************************************/
/** @defgroup compute_partition Compute Partition Functions
/** @defgroup ComputePartition Compute Partition Functions
* These functions are used to configure and query the device's
* compute parition setting.
* @{
@@ -4182,10 +4203,10 @@ rsmi_dev_compute_partition_set(uint32_t dv_ind,
*/
rsmi_status_t rsmi_dev_compute_partition_reset(uint32_t dv_ind);
/** @} */ // end of compute_partition
/** @} */ // end of ComputePartition
/*****************************************************************************/
/** @defgroup memory_partition Memory Partition Functions
/** @defgroup memory_partition The Memory Partition Functions
* These functions are used to query and set the device's current memory
* partition.
* @{
@@ -4627,7 +4648,8 @@ rsmi_status_t rsmi_event_notification_stop(uint32_t dv_ind);
* Metric multi-valued counter types
*/
typedef uint16_t GPUMetricTempHbm_t[RSMI_NUM_HBM_INSTANCES];
typedef uint16_t GPUMetricVcnActivity_t[RSMI_MAX_NUM_VCN];
typedef uint16_t GPUMetricVcnActivity_t[RSMI_MAX_NUM_VCNS];
typedef uint16_t GPUMetricJpegActivity_t[RSMI_MAX_NUM_JPEG_ENGS];
typedef uint64_t GPUMetricXgmiReadDataAcc_t[RSMI_MAX_NUM_XGMI_LINKS];
typedef uint64_t GPUMetricXgmiWriteDataAcc_t[RSMI_MAX_NUM_XGMI_LINKS];
typedef uint16_t GPUMetricCurrGfxClk_t[RSMI_MAX_NUM_GFX_CLKS];
@@ -5113,7 +5135,7 @@ rsmi_dev_metrics_temp_hbm_get(uint32_t dv_ind, GPUMetricTempHbm_t* temp_hbm_valu
*
* @param[inout] vcn_activity_value a pointer to uint16_t to which the device gpu
* metric unit will be stored
* - This is a multi-valued counter holding a 4 (RSMI_MAX_NUM_VCN)
* - This is a multi-valued counter holding a 4 (RSMI_MAX_NUM_VCNS)
* element array (GPUMetricVcnActivity_t)
*
* @retval ::RSMI_STATUS_SUCCESS is returned upon successful call.
@@ -255,6 +255,7 @@ class Device {
rsmi_status_t dev_log_gpu_metrics(std::ostringstream& outstream_metrics);
AMGpuMetricsPublicLatestTupl_t dev_copy_internal_to_external_metrics();
private:
std::shared_ptr<Monitor> monitor_;
std::shared_ptr<PowerMon> power_monitor_;
@@ -277,7 +278,6 @@ class Device {
bool returnWriteErr = false);
rsmi_status_t run_amdgpu_property_reinforcement_query(const AMDGpuPropertyQuery_t& amdgpu_property_query);
uint64_t bdfid_;
uint64_t kfd_gpu_id_;
std::unordered_set<rsmi_event_group_t,
@@ -92,7 +92,10 @@ constexpr uint32_t kRSMI_MAX_NUM_GFX_CLKS = 8;
constexpr uint32_t kRSMI_MAX_NUM_CLKS = 4;
// Note: This *must* match NUM_VCN
constexpr uint32_t kRSMI_MAX_NUM_VCN = 4;
constexpr uint32_t kRSMI_MAX_NUM_VCNS = 4;
// Note: This *must* match NUM_JPEG_ENG
constexpr uint32_t kRSMI_MAX_JPEG_ENGINES = 32;
struct AMDGpuMetricsHeader_v1_t
@@ -326,7 +329,7 @@ struct AMDGpuMetrics_v14_t
// Utilization (%)
uint16_t m_average_gfx_activity;
uint16_t m_average_umc_activity; // memory controller
uint16_t m_vcn_activity[kRSMI_MAX_NUM_VCN]; // VCN instances activity percent (encode/decode)
uint16_t m_vcn_activity[kRSMI_MAX_NUM_VCNS]; // VCN instances activity percent (encode/decode)
// Energy (15.259uJ (2^-16) units)
uint64_t m_energy_accumulator;
@@ -383,7 +386,89 @@ struct AMDGpuMetrics_v14_t
uint16_t m_padding;
};
using AMGpuMetricsLatest_t = AMDGpuMetrics_v14_t;
struct AMDGpuMetrics_v15_t
{
~AMDGpuMetrics_v15_t() = default;
struct AMDGpuMetricsHeader_v1_t m_common_header;
// Temperature (Celsius). It will be zero (0) if unsupported.
uint16_t m_temperature_hotspot;
uint16_t m_temperature_mem;
uint16_t m_temperature_vrsoc;
// Power (Watts)
uint16_t m_current_socket_power;
// Utilization (%)
uint16_t m_average_gfx_activity;
uint16_t m_average_umc_activity; // memory controller
uint16_t m_vcn_activity[kRSMI_MAX_NUM_VCNS]; // VCN instances activity percent (encode/decode)
uint16_t m_jpeg_activity[kRSMI_MAX_JPEG_ENGINES]; // JPEG activity percent (encode/decode)
// Energy (15.259uJ (2^-16) units)
uint64_t m_energy_accumulator;
// Driver attached timestamp (in ns)
uint64_t m_system_clock_counter;
// Throttle status
uint32_t m_throttle_status;
// Clock Lock Status. Each bit corresponds to clock instance
uint32_t m_gfxclk_lock_status;
// Link width (number of lanes) and speed (in 0.1 GT/s)
uint16_t m_pcie_link_width;
uint16_t m_pcie_link_speed; // in 0.1 GT/s
// XGMI bus width and bitrate (in Gbps)
uint16_t m_xgmi_link_width;
uint16_t m_xgmi_link_speed;
// Utilization Accumulated (%)
uint32_t m_gfx_activity_acc;
uint32_t m_mem_activity_acc;
// PCIE accumulated bandwidth (GB/sec)
uint64_t m_pcie_bandwidth_acc;
// PCIE instantaneous bandwidth (GB/sec)
uint64_t m_pcie_bandwidth_inst;
// PCIE L0 to recovery state transition accumulated count
uint64_t m_pcie_l0_to_recov_count_acc;
// PCIE replay accumulated count
uint64_t m_pcie_replay_count_acc;
// PCIE replay rollover accumulated count
uint64_t m_pcie_replay_rover_count_acc;
// PCIE NAK sent accumulated count
uint32_t m_pcie_nak_sent_count_acc;
// PCIE NAK received accumulated count
uint32_t m_pcie_nak_rcvd_count_acc;
// XGMI accumulated data transfer size(KiloBytes)
uint64_t m_xgmi_read_data_acc[kRSMI_MAX_NUM_XGMI_LINKS];
uint64_t m_xgmi_write_data_acc[kRSMI_MAX_NUM_XGMI_LINKS];
// PMFW attached timestamp (10ns resolution)
uint64_t m_firmware_timestamp;
// Current clocks (Mhz)
uint16_t m_current_gfxclk[kRSMI_MAX_NUM_GFX_CLKS];
uint16_t m_current_socclk[kRSMI_MAX_NUM_CLKS];
uint16_t m_current_vclk0[kRSMI_MAX_NUM_CLKS];
uint16_t m_current_dclk0[kRSMI_MAX_NUM_CLKS];
uint16_t m_current_uclk;
uint16_t m_padding;
};
using AMGpuMetricsLatest_t = AMDGpuMetrics_v15_t;
/**
* This is GPU Metrics version that gets to public access.
@@ -410,6 +495,9 @@ using GPUMetricTempHbmTbl_t = GpuMetricU16Tbl_t;
using GPUMetricVcnActivity_t = decltype(AMDGpuMetrics_v14_t::m_vcn_activity);
using GPUMetricVcnActivityTbl_t = GpuMetricU16Tbl_t;
using GPUMetricJpegActivity_t = decltype(AMDGpuMetrics_v15_t::m_jpeg_activity);
using GPUMetricJpegActivityTbl_t = GpuMetricU16Tbl_t;
using GPUMetricXgmiReadDataAcc_t = decltype(AMDGpuMetrics_v14_t::m_xgmi_read_data_acc);
using GPUMetricXgmiWriteDataAcc_t = decltype(AMDGpuMetrics_v14_t::m_xgmi_write_data_acc);
using GPUMetricXgmiAccTbl_t = GpuMetricU64Tbl_t;
@@ -518,6 +606,7 @@ enum class AMDGpuMetricsUnitType_t : AMDGpuMetricTypeId_t
kMetricGfxActivityAccumulator,
kMetricMemActivityAccumulator,
kMetricVcnActivity, //v1.4
kMetricJpegActivity, //v1.5
// kGpuMetricAverageClock counters
kMetricAvgGfxClockFrequency,
@@ -559,6 +648,8 @@ enum class AMDGpuMetricsUnitType_t : AMDGpuMetricTypeId_t
kMetricPcieL0RecovCountAccumulator, //v1.4
kMetricPcieReplayCountAccumulator, //v1.4
kMetricPcieReplayRollOverCountAccumulator, //v1.4
kMetricPcieNakSentCountAccumulator, //v1.5
kMetricPcieNakReceivedCountAccumulator, //v1.5
// kGpuMetricPowerEnergy counters
kMetricAvgSocketPower,
@@ -608,6 +699,7 @@ enum class AMDGpuMetricVersionFlags_t : AMDGpuMetricVersionFlagId_t
kGpuMetricV12 = (0x1 << 2),
kGpuMetricV13 = (0x1 << 3),
kGpuMetricV14 = (0x1 << 4),
kGpuMetricV15 = (0x1 << 5),
};
using AMDGpuMetricVersionTranslationTbl_t = std::map<uint16_t, AMDGpuMetricVersionFlags_t>;
using GpuMetricTypePtr_t = std::shared_ptr<void>;
@@ -780,6 +872,40 @@ class GpuMetricsBase_v14_t final : public GpuMetricsBase_t
};
class GpuMetricsBase_v15_t final : public GpuMetricsBase_t
{
public:
~GpuMetricsBase_v15_t() = default;
size_t sizeof_metric_table() override {
return sizeof(AMDGpuMetrics_v15_t);
}
GpuMetricTypePtr_t get_metrics_table() override
{
if (!m_gpu_metric_ptr) {
m_gpu_metric_ptr.reset(&m_gpu_metrics_tbl, [](AMDGpuMetrics_v15_t*){});
}
assert(m_gpu_metric_ptr != nullptr);
return m_gpu_metric_ptr;
}
void dump_internal_metrics_table() override;
AMDGpuMetricVersionFlags_t get_gpu_metrics_version_used() override
{
return AMDGpuMetricVersionFlags_t::kGpuMetricV15;
}
rsmi_status_t populate_metrics_dynamic_tbl() override;
AMGpuMetricsPublicLatestTupl_t copy_internal_to_external_metrics() override;
private:
AMDGpuMetrics_v15_t m_gpu_metrics_tbl;
std::shared_ptr<AMDGpuMetrics_v15_t> m_gpu_metric_ptr;
};
template<typename T>
rsmi_status_t rsmi_dev_gpu_metrics_info_query(uint32_t dv_ind, AMDGpuMetricsUnitType_t metric_counter, T& metric_value);