Increase minimal channels for gfx908 (#259)
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@@ -25,6 +25,7 @@ struct allGather3Data_t{
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int cudaCompCap;
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int fullCudaCompCap;
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int nChannels;
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int gcn;
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struct ncclGraphInfo tree;
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struct ncclGraphInfo ring;
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struct ncclGraphInfo collNet;
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@@ -0,0 +1,85 @@
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<system version="2">
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<cpu numaid="0" affinity="0003ff,f0003fff" arch="x86_64" vendor="GenuineIntel" familyid="6" modelid="85">
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<pci busid="0000:18:00.0" class="0x060400" link_speed="8 GT/s" link_width="16">
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<pci busid="0000:1b:00.0" class="0x060400" link_speed="8 GT/s" link_width="16">
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<pci busid="0000:1d:00.0" class="0x038000" link_speed="16 GT/s" link_width="16">
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<gpu dev="0" sm="98" gcn="908" arch="38911" rank="0" gdr="0">
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<xgmi target="0000:20:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:23:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:26:00.0" count="1" tclass="0x038000"/>
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</gpu>
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</pci>
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</pci>
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<pci busid="0000:1e:00.0" class="0x060400" link_speed="8 GT/s" link_width="16">
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<pci busid="0000:20:00.0" class="0x038000" link_speed="16 GT/s" link_width="16">
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<gpu dev="1" sm="98" gcn="908" arch="38911" rank="1" gdr="0">
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<xgmi target="0000:1d:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:23:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:26:00.0" count="1" tclass="0x038000"/>
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</gpu>
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</pci>
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</pci>
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<pci busid="0000:21:00.0" class="0x060400" link_speed="8 GT/s" link_width="16">
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<pci busid="0000:23:00.0" class="0x038000" link_speed="16 GT/s" link_width="16">
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<gpu dev="2" sm="98" gcn="908" arch="38911" rank="2" gdr="0">
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<xgmi target="0000:1d:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:20:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:26:00.0" count="1" tclass="0x038000"/>
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</gpu>
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</pci>
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</pci>
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<pci busid="0000:24:00.0" class="0x060400" link_speed="8 GT/s" link_width="16">
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<pci busid="0000:26:00.0" class="0x038000" link_speed="16 GT/s" link_width="16">
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<gpu dev="3" sm="98" gcn="908" arch="38911" rank="3" gdr="0">
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<xgmi target="0000:1d:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:20:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:23:00.0" count="1" tclass="0x038000"/>
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</gpu>
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</pci>
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</pci>
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<pci busid="0000:1a:00.0" class="0x020000" link_speed="8 GT/s" link_width="16">
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<nic>
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<net name="mlx5_0" dev="0" speed="100000" port="1" guid="0xf2bb2700034b6b50" maxconn="262144" gdr="1"/>
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</nic>
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</pci>
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</pci>
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<pci busid="0000:3b:00.0" class="0x060400" link_speed="8 GT/s" link_width="16">
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<pci busid="0000:3d:00.0" class="0x060400" link_speed="8 GT/s" link_width="16">
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<pci busid="0000:3f:00.0" class="0x038000" link_speed="16 GT/s" link_width="16">
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<gpu dev="4" sm="98" gcn="908" arch="38911" rank="4" gdr="0">
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<xgmi target="0000:43:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:46:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:49:00.0" count="1" tclass="0x038000"/>
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</gpu>
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</pci>
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</pci>
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<pci busid="0000:41:00.0" class="0x060400" link_speed="8 GT/s" link_width="16">
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<pci busid="0000:43:00.0" class="0x038000" link_speed="16 GT/s" link_width="16">
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<gpu dev="5" sm="98" gcn="908" arch="38911" rank="5" gdr="0">
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<xgmi target="0000:3f:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:46:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:49:00.0" count="1" tclass="0x038000"/>
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</gpu>
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</pci>
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</pci>
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<pci busid="0000:44:00.0" class="0x060400" link_speed="8 GT/s" link_width="16">
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<pci busid="0000:46:00.0" class="0x038000" link_speed="16 GT/s" link_width="16">
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<gpu dev="6" sm="98" gcn="908" arch="38911" rank="6" gdr="0">
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<xgmi target="0000:3f:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:43:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:49:00.0" count="1" tclass="0x038000"/>
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</gpu>
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</pci>
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</pci>
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<pci busid="0000:47:00.0" class="0x060400" link_speed="8 GT/s" link_width="16">
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<pci busid="0000:49:00.0" class="0x038000" link_speed="16 GT/s" link_width="16">
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<gpu dev="7" sm="98" gcn="908" arch="38911" rank="7" gdr="0">
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<xgmi target="0000:3f:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:43:00.0" count="1" tclass="0x038000"/>
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<xgmi target="0000:46:00.0" count="1" tclass="0x038000"/>
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</gpu>
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</pci>
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</pci>
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</pci>
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</cpu>
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</system>
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@@ -103,6 +103,8 @@ NodeModelDesc model_descs[] = {
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{4, "topo_8p_ts1_n4.xml", "4 nodes 8 VEGA20 TS1 NPS=4"},
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{1, "topo_8p_ts1_n4_1.xml", "single node 8 VEGA20 TS1 NPS=4 Alt. Model"},
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{4, "topo_8p_ts1_n4_1.xml", "4 nodes 8 VEGA20 TS1 NPS=4 Alt. Model"},
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{1, "topo_4p3l_ia.xml", "single node 8 gfx908"},
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{4, "topo_4p3l_ia.xml", "4 nodes 8 gfx908"},
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};
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int main(int argc,char* argv[])
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@@ -216,7 +216,10 @@ ncclResult_t initTransportsRank_1(struct ncclComm* comm, struct allGather1Data_t
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}
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// AllGather3 - begin
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allGather3Data[rank].cudaCompCap = ncclCudaCompCap();
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int idx;
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NCCLCHECK(ncclTopoIdToIndex(comm->topo, GPU, myInfo->busId, &idx));
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allGather3Data[rank].cudaCompCap = comm->topo->nodes[GPU].nodes[idx].gpu.cudaCompCap;
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allGather3Data[rank].gcn = comm->topo->nodes[GPU].nodes[idx].gpu.gcn;
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allGather3Data[rank].nChannels = comm->nChannels = std::min(treeGraph.nChannels, ringGraph.nChannels);
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allGather3Data[rank].tree.sameChannels = treeGraph.sameChannels;
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allGather3Data[rank].tree.speedIntra = treeGraph.speedIntra;
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@@ -397,8 +400,10 @@ ncclResult_t initTransportsRank_3(struct ncclComm* comm, struct allGather3Data_t
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int nChannelsOrig = comm->nChannels;
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struct ncclTopoRanks** allTopoRanks;
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NCCLCHECK(ncclCalloc(&allTopoRanks, comm->nRanks));
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int gcn = allGather3Data[0].gcn;
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for (int i=0; i<nranks; i++) {
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allTopoRanks[i] = &allGather3Data[i].topoRanks;
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gcn = std::min(allGather3Data[i].gcn, gcn);
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// Make sure we align all ranks so that the tuning is consistent across ranks
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treeGraph.nChannels = ringGraph.nChannels = comm->nChannels = std::min(allGather3Data[i].nChannels, comm->nChannels);
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treeGraph.sameChannels = std::min(allGather3Data[i].tree.sameChannels, treeGraph.sameChannels);
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@@ -424,7 +429,7 @@ ncclResult_t initTransportsRank_3(struct ncclComm* comm, struct allGather3Data_t
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int *rings;
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NCCLCHECK(ncclCalloc(&rings, nranks*MAXCHANNELS));
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NCCLCHECK(ncclTopoPostset(comm, nodesFirstRank, allTopoRanks, rings));
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NCCLCHECK(ncclTopoPostset(comm, nodesFirstRank, allTopoRanks, rings, gcn));
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if (comm->nNodes > 1 &&
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ncclParamCollNetEnable() == 1 &&
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collNetSupport()) {
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