From c73bd2bf9181eb6361db232e7d350811877e505f Mon Sep 17 00:00:00 2001 From: Cole Ramos Date: Mon, 18 Dec 2023 16:37:01 -0600 Subject: [PATCH] Enabling Standalone GUI on 2.x (#214) * Initial overhaul of Analyze mode. Basic CLI is enabled. Signed-off-by: colramos-amd * Merge branch '2.x' of github.com:AMDResearch/omniperf into 2.x-dev Signed-off-by: colramos-amd * fix comment typo Signed-off-by: Karl W Schulz * Move error logging to util.py Signed-off-by: colramos-amd * Move perfmon_configs dir into omniperf_soc dir. Rename config dirs for clarity Signed-off-by: colramos-amd * Add a supported_archs property to Omniperf base class Signed-off-by: colramos-amd * Add css assets for GUI styling Signed-off-by: colramos-amd * Re-organize roofline class. Improved useability Signed-off-by: colramos-amd * Enable standalone GUI Signed-off-by: colramos-amd * Remove outdated metric_configs. This was moved to omniperf_soc dir Signed-off-by: colramos-amd * Fix small bug in GUI to enable Mi100 visualization Signed-off-by: colramos-amd --------- Signed-off-by: colramos-amd Signed-off-by: Karl W Schulz Signed-off-by: Cole Ramos Co-authored-by: Karl W Schulz [ROCm/rocprofiler-compute commit: 7d93a086c23c0c748d43688a6b6438788ba2614a] --- projects/rocprofiler-compute/src/argparser.py | 2 +- .../metric_configs/gfx906/0000_top_stat.yaml | 8 - .../gfx906/0100_system_info.yaml | 9 - .../gfx906/0200_system-speed-of-light.yaml | 230 - .../gfx906/0500_command-processor.yaml | 180 - .../gfx906/0600_shader-processor-input.yaml | 174 - .../gfx906/0700_wavefront-launch.yaml | 142 - .../1000_compute-unit-instruction-mix.yaml | 234 - .../1100_compute-unit-compute-pipeline.yaml | 154 - .../src/metric_configs/gfx906/1200_lds.yaml | 121 - .../gfx906/1300_instruction-cache.yaml | 79 - .../gfx906/1400_constant-cache.yaml | 164 - .../metric_configs/gfx906/1500_TA_and_TD.yaml | 174 - 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projects/rocprofiler-compute/src/omniperf_analyze/assets/media-queries.css create mode 100644 projects/rocprofiler-compute/src/utils/gui.py create mode 100644 projects/rocprofiler-compute/src/utils/gui_components/header.py create mode 100644 projects/rocprofiler-compute/src/utils/gui_components/memchart.py diff --git a/projects/rocprofiler-compute/src/argparser.py b/projects/rocprofiler-compute/src/argparser.py index 8525a30fc4..40dc63030a 100644 --- a/projects/rocprofiler-compute/src/argparser.py +++ b/projects/rocprofiler-compute/src/argparser.py @@ -505,7 +505,7 @@ def omniarg_parser(parser, omniperf_home, supported_archs, omniperf_version): nargs="+", help="\t\tSpecify column indices to display.", ) - analyze_advanced_group.add_argument("-g", action="store_true", help="\t\tDebug single metric.") + analyze_advanced_group.add_argument("-g", dest="debug", action="store_true", help="\t\tDebug single metric.") analyze_advanced_group.add_argument( "--dependency", action="store_true", help="\t\tList the installation dependency." ) diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/0000_top_stat.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/0000_top_stat.yaml deleted file mode 100644 index 077004080f..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/0000_top_stat.yaml +++ /dev/null @@ -1,8 +0,0 @@ ---- -Panel Config: - id: 000 - title: Top Stat - data source: - - raw_csv_table: - id: 001 - source: pmc_kernel_top.csv diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/0100_system_info.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/0100_system_info.yaml deleted file mode 100644 index b7ec29eaf9..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/0100_system_info.yaml +++ /dev/null @@ -1,9 +0,0 @@ ---- -Panel Config: - id: 100 - title: System Info - data source: - - raw_csv_table: - id: 101 - source: sysinfo.csv - columnwise: True diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/0200_system-speed-of-light.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/0200_system-speed-of-light.yaml deleted file mode 100644 index 986b2f0aec..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/0200_system-speed-of-light.yaml +++ /dev/null @@ -1,230 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - SALU: &SALU_anchor Scalar Arithmetic Logic Unit - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 200 - title: System Speed-of-Light - data source: - - metric_table: - id: 201 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - peak: Peak - pop: PoP - tips: Tips - metric: - VALU FLOPs: - value: None # No perf counter - unit: GFLOPs - peak: (((($sclk * $numCU) * 64) * 2) / 1000) - pop: None # No perf counter - tips: - VALU IOPs: - value: None # No perf counter - unit: GOPs - peak: (((($sclk * $numCU) * 64) * 2) / 1000) - pop: None # No perf counter - tips: - MFMA FLOPs (BF16): - value: None # No perf counter - unit: GFLOPs - peak: ((($sclk * $numCU) * 512) / 1000) - pop: None # No perf counter - tips: - MFMA FLOPs (F16): - value: None # No perf counter - unit: GFLOPs - peak: ((($sclk * $numCU) * 1024) / 1000) - pop: None # No perf counter - tips: - MFMA FLOPs (F32): - value: None # No perf counter - unit: GFLOPs - peak: ((($sclk * $numCU) * 256) / 1000) - pop: None # No perf counter - tips: - MFMA FLOPs (F64): - value: None # No perf counter - unit: GFLOPs - peak: ((($sclk * $numCU) * 256) / 1000) - pop: None # No perf counter - tips: - MFMA IOPs (Int8): - value: None # No perf counter - unit: GOPs - peak: ((($sclk * $numCU) * 1024) / 1000) - pop: None # No perf counter - tips: - Active CUs: - value: $numActiveCUs - unit: CUs - peak: $numCU - pop: ((100 * $numActiveCUs) / $numCU) - tips: - SALU Util: - value: AVG(((100 * SQ_ACTIVE_INST_SCA) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - peak: 100 - pop: AVG(((100 * SQ_ACTIVE_INST_SCA) / (GRBM_GUI_ACTIVE * $numCU))) - tips: - VALU Util: - value: AVG(((100 * SQ_ACTIVE_INST_VALU) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - peak: 100 - pop: AVG(((100 * SQ_ACTIVE_INST_VALU) / (GRBM_GUI_ACTIVE * $numCU))) - tips: - MFMA Util: - value: None # No HW module - unit: pct - peak: 100 - pop: None # No HW module - tips: - VALU Active Threads/Wave: - value: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) - unit: Threads - peak: 64 - pop: (AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) * 1.5625) - tips: - IPC - Issue: - value: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY)) - unit: Instr/cycle - peak: 5 - pop: ((100 * AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY))) / 5) - tips: - LDS BW: - value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / (EndNs - BeginNs))) - unit: GB/sec - peak: (($sclk * $numCU) * 0.128) - pop: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / (EndNs - BeginNs)) / (($sclk * $numCU) * 0.00128))) - tips: - LDS Bank Conflict: - value: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - unit: Conflicts/access - peak: 32 - pop: ((100 * AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))) / 32) - tips: - Instr Cache Hit Rate: - value: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES))) - unit: pct - peak: 100 - pop: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES))) - tips: - Instr Cache BW: - value: AVG(((SQC_ICACHE_REQ / (EndNs - BeginNs)) * 64)) - unit: GB/s - peak: ((($sclk / 1000) * 64) * $numSQC) - pop: ((100 * AVG(((SQC_ICACHE_REQ / (EndNs - BeginNs)) * 64))) / ((($sclk - / 1000) * 64) * $numSQC)) - tips: - Scalar L1D Cache Hit Rate: - value: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES)) - if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None)) - unit: pct - peak: 100 - pop: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES)) - if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None)) - tips: - Scalar L1D Cache BW: - value: AVG(((SQC_DCACHE_REQ / (EndNs - BeginNs)) * 64)) - unit: GB/s - peak: ((($sclk / 1000) * 64) * $numSQC) - pop: ((100 * AVG(((SQC_DCACHE_REQ / (EndNs - BeginNs)) * 64))) / ((($sclk - / 1000) * 64) * $numSQC)) - tips: - Vector L1D Cache Hit Rate: - value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - unit: pct - peak: 100 - pop: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + - TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / - TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - tips: - Vector L1D Cache BW: - value: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) - unit: GB/s - peak: ((($sclk / 1000) * 64) * $numCU) - pop: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs)))) - / ((($sclk / 1000) * 64) * $numCU)) - tips: - L2 Cache Hit Rate: - value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - unit: pct - peak: 100 - pop: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - tips: - L2-Fabric Read BW: - value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / (EndNs - BeginNs))) - unit: GB/s - peak: $hbmBW - pop: ((100 * AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / (EndNs - BeginNs)))) / $hbmBW) - tips: - L2-Fabric Write BW: - value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / (EndNs - BeginNs))) - unit: GB/s - peak: $hbmBW - pop: ((100 * AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / (EndNs - BeginNs)))) / $hbmBW) - tips: - L2-Fabric Read Latency: - value: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum - != 0) else None)) - unit: Cycles - peak: '' - pop: '' - tips: - L2-Fabric Write Latency: - value: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum - != 0) else None)) - unit: Cycles - peak: '' - pop: '' - tips: - Wave Occupancy: - value: AVG((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) - unit: Wavefronts - peak: ($maxWavesPerCU * $numCU) - pop: (100 * AVG(((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE) / ($maxWavesPerCU - * $numCU)))) - coll_level: SQ_LEVEL_WAVES - tips: - Instr Fetch BW: - value: AVG(((SQ_IFETCH / (EndNs - BeginNs)) * 32)) - unit: GB/s - peak: ((($sclk / 1000) * 32) * $numSQC) - pop: ((100 * AVG(((SQ_IFETCH / (EndNs - BeginNs)) * 32))) / ($numSQC - * (($sclk / 1000) * 32))) - coll_level: SQ_IFETCH_LEVEL - tips: - Instr Fetch Latency: - value: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH)) - unit: Cycles - peak: '' - pop: '' - coll_level: SQ_IFETCH_LEVEL - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/0500_command-processor.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/0500_command-processor.yaml deleted file mode 100644 index 5250918799..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/0500_command-processor.yaml +++ /dev/null @@ -1,180 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 500 - title: Command Processor (CPC/CPF) - data source: - - metric_table: - id: 501 - title: Command Processor Fetcher - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - GPU Busy Cycles: - avg: AVG(GRBM_GUI_ACTIVE) - min: MIN(GRBM_GUI_ACTIVE) - max: MAX(GRBM_GUI_ACTIVE) - unit: Cycles/Kernel - tips: - CPF Busy: - avg: AVG(CPF_CPF_STAT_BUSY) - min: MIN(CPF_CPF_STAT_BUSY) - max: MAX(CPF_CPF_STAT_BUSY) - unit: Cycles/Kernel - tips: - CPF Util: - avg: AVG((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) - if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) - min: MIN((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) - if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) - max: MAX((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) - if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) - unit: pct - tips: - CPF Stall: - avg: AVG((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY - != 0) else None)) - min: MIN((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY - != 0) else None)) - max: MAX((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY - != 0) else None)) - unit: Cycles/Kernel - tips: - L2Cache Intf Busy: - avg: AVG(CPF_CPF_TCIU_BUSY) - min: MIN(CPF_CPF_TCIU_BUSY) - max: MAX(CPF_CPF_TCIU_BUSY) - unit: Cycles/Kernel - tips: - L2Cache Intf Util: - avg: AVG((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) - if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) - min: MIN((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) - if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) - max: MAX((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) - if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) - unit: pct - tips: - L2Cache Intf Stall: - avg: AVG((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY - != 0) else None)) - min: MIN((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY - != 0) else None)) - max: MAX((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY - != 0) else None)) - unit: pct - tips: - UTCL1 Stall: - avg: AVG(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) - min: MIN(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) - max: MAX(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) - unit: Cycles/Kernel - tips: - - - metric_table: - id: 502 - title: Command Processor Compute - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - GPU Busy Cycles: - avg: AVG(GRBM_GUI_ACTIVE) - min: MIN(GRBM_GUI_ACTIVE) - max: MAX(GRBM_GUI_ACTIVE) - unit: Cycles - tips: - CPC Busy Cycles: - avg: AVG(CPC_CPC_STAT_BUSY) - min: MIN(CPC_CPC_STAT_BUSY) - max: MAX(CPC_CPC_STAT_BUSY) - unit: Cycles - tips: - CPC Util: - avg: AVG((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) - if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) - min: MIN((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) - if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) - max: MAX((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) - if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) - unit: pct - tips: - CPC Stall Cycles: - avg: AVG(CPC_CPC_STAT_STALL) - min: MIN(CPC_CPC_STAT_STALL) - max: MAX(CPC_CPC_STAT_STALL) - unit: Cycles - tips: - CPC Stall Rate: - avg: AVG((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - min: MIN((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - max: MAX((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - unit: pct - tips: - CPC Packet Decoding: - avg: AVG(CPC_ME1_BUSY_FOR_PACKET_DECODE) - min: MIN(CPC_ME1_BUSY_FOR_PACKET_DECODE) - max: MAX(CPC_ME1_BUSY_FOR_PACKET_DECODE) - unit: Cycles - tips: - SPI Intf Busy Cycles: - avg: AVG(CPC_ME1_DC0_SPI_BUSY) - min: MIN(CPC_ME1_DC0_SPI_BUSY) - max: MAX(CPC_ME1_DC0_SPI_BUSY) - unit: Cycles - tips: - SPI Intf Util: - avg: AVG((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - min: MIN((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - max: MAX((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - unit: pct - tips: - L2Cache Intf Util: - avg: AVG((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) - if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) - min: MIN((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) - if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) - max: MAX((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) - if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) - unit: pct - tips: - UTCL1 Stall Cycles: - avg: AVG(CPC_UTCL1_STALL_ON_TRANSLATION) - min: MIN(CPC_UTCL1_STALL_ON_TRANSLATION) - max: MAX(CPC_UTCL1_STALL_ON_TRANSLATION) - unit: Cycles - tips: - UTCL2 Intf Busy Cycles: - avg: AVG(CPC_CPC_UTCL2IU_BUSY) - min: MIN(CPC_CPC_UTCL2IU_BUSY) - max: MAX(CPC_CPC_UTCL2IU_BUSY) - unit: Cycles - tips: - UTCL2 Intf Util: - avg: AVG((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) - if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) - min: MIN((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) - if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) - max: MAX((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) - if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) - unit: pct - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/0600_shader-processor-input.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/0600_shader-processor-input.yaml deleted file mode 100644 index bab48700ac..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/0600_shader-processor-input.yaml +++ /dev/null @@ -1,174 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 600 - title: Shader Processor Input (SPI) - data source: - - metric_table: - id: 601 - title: SPI Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - GPU Busy: - avg: AVG(GRBM_GUI_ACTIVE) - min: MIN(GRBM_GUI_ACTIVE) - max: MAX(GRBM_GUI_ACTIVE) - unit: Cycles - tips: - CS Busy: - avg: AVG(SPI_CSN_BUSY) - min: MIN(SPI_CSN_BUSY) - max: MAX(SPI_CSN_BUSY) - unit: Cycles - tips: - SPI Busy: - avg: AVG(GRBM_SPI_BUSY) - min: MIN(GRBM_SPI_BUSY) - max: MAX(GRBM_SPI_BUSY) - unit: Cycles - tips: - SQ Busy: - avg: AVG(SQ_BUSY_CYCLES) - min: MIN(SQ_BUSY_CYCLES) - max: MAX(SQ_BUSY_CYCLES) - unit: Cycles - tips: - Dispatched Workgroups: - avg: AVG(SPI_CSN_NUM_THREADGROUPS) - min: MIN(SPI_CSN_NUM_THREADGROUPS) - max: MAX(SPI_CSN_NUM_THREADGROUPS) - unit: Workgroups - tips: - Dispatched Wavefronts: - avg: AVG(SPI_CSN_WAVE) - min: MIN(SPI_CSN_WAVE) - max: MAX(SPI_CSN_WAVE) - unit: Wavefronts - tips: - Wave Alloc Failed: - avg: AVG(SPI_RA_REQ_NO_ALLOC) - min: MIN(SPI_RA_REQ_NO_ALLOC) - max: MAX(SPI_RA_REQ_NO_ALLOC) - unit: Cycles - tips: - Wave Alloc Failed - CS: - avg: AVG(SPI_RA_REQ_NO_ALLOC_CSN) - min: MIN(SPI_RA_REQ_NO_ALLOC_CSN) - max: MAX(SPI_RA_REQ_NO_ALLOC_CSN) - unit: Cycles - tips: - - - metric_table: - id: 602 - title: SPI Resource Allocation - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Wave request Failed (CS): - avg: AVG(SPI_RA_REQ_NO_ALLOC_CSN) - min: MIN(SPI_RA_REQ_NO_ALLOC_CSN) - max: MAX(SPI_RA_REQ_NO_ALLOC_CSN) - unit: Cycles - tips: - CS Stall: - avg: AVG(SPI_RA_RES_STALL_CSN) - min: MIN(SPI_RA_RES_STALL_CSN) - max: MAX(SPI_RA_RES_STALL_CSN) - unit: Cycles - tips: - CS Stall Rate: - avg: AVG((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != - 0) else None)) - min: MIN((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != - 0) else None)) - max: MAX((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != - 0) else None)) - unit: pct - tips: - Scratch Stall: - avg: AVG(SPI_RA_TMP_STALL_CSN) - min: MIN(SPI_RA_TMP_STALL_CSN) - max: MAX(SPI_RA_TMP_STALL_CSN) - unit: Cycles - tips: - Insufficient SIMD Waveslots: - avg: AVG(SPI_RA_WAVE_SIMD_FULL_CSN) - min: MIN(SPI_RA_WAVE_SIMD_FULL_CSN) - max: MAX(SPI_RA_WAVE_SIMD_FULL_CSN) - unit: SIMD - tips: - Insufficient SIMD VGPRs: - avg: AVG(SPI_RA_VGPR_SIMD_FULL_CSN) - min: MIN(SPI_RA_VGPR_SIMD_FULL_CSN) - max: MAX(SPI_RA_VGPR_SIMD_FULL_CSN) - unit: SIMD - tips: - Insufficient SIMD SGPRs: - avg: AVG(SPI_RA_SGPR_SIMD_FULL_CSN) - min: MIN(SPI_RA_SGPR_SIMD_FULL_CSN) - max: MAX(SPI_RA_SGPR_SIMD_FULL_CSN) - unit: SIMD - tips: - Insufficient CU LDS: - avg: AVG(SPI_RA_LDS_CU_FULL_CSN) - min: MIN(SPI_RA_LDS_CU_FULL_CSN) - max: MAX(SPI_RA_LDS_CU_FULL_CSN) - unit: CU - tips: - Insufficient CU Barries: - avg: AVG(SPI_RA_BAR_CU_FULL_CSN) - min: MIN(SPI_RA_BAR_CU_FULL_CSN) - max: MAX(SPI_RA_BAR_CU_FULL_CSN) - unit: CU - tips: - Insufficient Bulky Resource: - avg: AVG(SPI_RA_BULKY_CU_FULL_CSN) - min: MIN(SPI_RA_BULKY_CU_FULL_CSN) - max: MAX(SPI_RA_BULKY_CU_FULL_CSN) - unit: CU - tips: - Reach CU Threadgroups Limit: - avg: AVG(SPI_RA_TGLIM_CU_FULL_CSN) - min: MIN(SPI_RA_TGLIM_CU_FULL_CSN) - max: MAX(SPI_RA_TGLIM_CU_FULL_CSN) - unit: Cycles - tips: - Reach CU Wave Limit: - avg: AVG(SPI_RA_WVLIM_STALL_CSN) - min: MIN(SPI_RA_WVLIM_STALL_CSN) - max: MAX(SPI_RA_WVLIM_STALL_CSN) - unit: Cycles - tips: - VGPR Writes: - avg: AVG((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - min: MIN((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - max: MAX((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - unit: Cycles/wave - tips: - SGPR Writes: - avg: AVG((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - min: MIN((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - max: MAX((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - unit: Cycles/wave - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/0700_wavefront-launch.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/0700_wavefront-launch.yaml deleted file mode 100644 index 70141193e6..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/0700_wavefront-launch.yaml +++ /dev/null @@ -1,142 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 700 - title: Wavefront - data source: - - metric_table: - id: 701 - title: Wavefront Launch Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Grid Size: - avg: AVG(grd) - min: MIN(grd) - max: MAX(grd) - unit: Work Items - tips: - Workgroup Size: - avg: AVG(wgr) - min: MIN(wgr) - max: MAX(wgr) - unit: Work Items - tips: - Total Wavefronts: - avg: AVG(SPI_CSN_WAVE) - min: MIN(SPI_CSN_WAVE) - max: MAX(SPI_CSN_WAVE) - unit: Wavefronts - tips: - Saved Wavefronts: - avg: AVG(SQ_WAVES_SAVED) - min: MIN(SQ_WAVES_SAVED) - max: MAX(SQ_WAVES_SAVED) - unit: Wavefronts - tips: - Restored Wavefronts: - avg: AVG(SQ_WAVES_RESTORED) - min: MIN(SQ_WAVES_RESTORED) - max: MAX(SQ_WAVES_RESTORED) - unit: Wavefronts - tips: - VGPRs: - avg: AVG(arch_vgpr) - min: MIN(arch_vgpr) - max: MAX(arch_vgpr) - unit: Registers - tips: - AGPRs: - avg: AVG(accum_vgpr) - min: MIN(accum_vgpr) - max: MAX(accum_vgpr) - unit: Registers - tips: - SGPRs: - avg: AVG(sgpr) - min: MIN(sgpr) - max: MAX(sgpr) - unit: Registers - tips: - LDS Allocation: - avg: AVG(lds) - min: MIN(lds) - max: MAX(lds) - unit: Bytes - tips: - Scratch Allocation: - avg: AVG(scr) - min: MIN(scr) - max: MAX(scr) - unit: Bytes - tips: - - - metric_table: - id: 702 - title: Wavefront Runtime Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Kernel Time (Nanosec): - avg: AVG((EndNs - BeginNs)) - min: MIN((EndNs - BeginNs)) - max: MAX((EndNs - BeginNs)) - unit: ns - tips: - Kernel Time (Cycles): - avg: AVG(GRBM_GUI_ACTIVE) - min: MIN(GRBM_GUI_ACTIVE) - max: MAX(GRBM_GUI_ACTIVE) - unit: Cycle - tips: - Instr/wavefront: - avg: AVG((SQ_INSTS / SQ_WAVES)) - min: MIN((SQ_INSTS / SQ_WAVES)) - max: MAX((SQ_INSTS / SQ_WAVES)) - unit: Instr/wavefront - tips: - Wave Cycles: - avg: AVG(((4 * SQ_WAVE_CYCLES) / $denom)) - min: MIN(((4 * SQ_WAVE_CYCLES) / $denom)) - max: MAX(((4 * SQ_WAVE_CYCLES) / $denom)) - unit: (Cycles + $normUnit) - tips: - Dependency Wait Cycles: - avg: AVG(((4 * SQ_WAIT_ANY) / $denom)) - min: MIN(((4 * SQ_WAIT_ANY) / $denom)) - max: MAX(((4 * SQ_WAIT_ANY) / $denom)) - unit: (Cycles + $normUnit) - tips: - Issue Wait Cycles: - avg: AVG(((4 * SQ_WAIT_INST_ANY) / $denom)) - min: MIN(((4 * SQ_WAIT_INST_ANY) / $denom)) - max: MAX(((4 * SQ_WAIT_INST_ANY) / $denom)) - unit: (Cycles + $normUnit) - tips: - Active Cycles: - avg: AVG(((4 * SQ_ACTIVE_INST_ANY) / $denom)) - min: MIN(((4 * SQ_ACTIVE_INST_ANY) / $denom)) - max: MAX(((4 * SQ_ACTIVE_INST_ANY) / $denom)) - unit: (Cycles + $normUnit) - tips: - Wavefront Occupancy: - avg: AVG((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) - min: MIN((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) - max: MAX((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) - unit: Wavefronts - coll_level: SQ_LEVEL_WAVES - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/1000_compute-unit-instruction-mix.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/1000_compute-unit-instruction-mix.yaml deleted file mode 100644 index 679acc34d1..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/1000_compute-unit-instruction-mix.yaml +++ /dev/null @@ -1,234 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1000 - title: Compute Units - Instruction Mix - data source: - - metric_table: - id: 1001 - title: Instruction Mix - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - style: - type: simple_bar - label_txt: (# of instr + $normUnit) - metric: - VALU - Vector: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - VMEM: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - LDS: - avg: AVG((SQ_INSTS_LDS / $denom)) - min: MIN((SQ_INSTS_LDS / $denom)) - max: MAX((SQ_INSTS_LDS / $denom)) - unit: (instr + $normUnit) - tips: - VALU - MFMA: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - SALU: - avg: AVG((SQ_INSTS_SALU / $denom)) - min: MIN((SQ_INSTS_SALU / $denom)) - max: MAX((SQ_INSTS_SALU / $denom)) - unit: (instr + $normUnit) - tips: - SMEM: - avg: AVG((SQ_INSTS_SMEM / $denom)) - min: MIN((SQ_INSTS_SMEM / $denom)) - max: MAX((SQ_INSTS_SMEM / $denom)) - unit: (instr + $normUnit) - tips: - Branch: - avg: AVG((SQ_INSTS_BRANCH / $denom)) - min: MIN((SQ_INSTS_BRANCH / $denom)) - max: MAX((SQ_INSTS_BRANCH / $denom)) - unit: (instr + $normUnit) - tips: - GDS: - avg: AVG((SQ_INSTS_GDS / $denom)) - min: MIN((SQ_INSTS_GDS / $denom)) - max: MAX((SQ_INSTS_GDS / $denom)) - unit: (instr + $normUnit) - tips: - - - metric_table: - id: 1002 - title: VALU Arithmetic Instr Mix - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - style: - type: simple_bar - label_txt: (# of instr + $normUnit) - metric: - INT-32: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - INT-64: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - F16-ADD: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - F16-Mult: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - F16-FMA: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - F16-Trans: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - F32-ADD: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - F32-Mult: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - F32-FMA: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - F32-Trans: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - F64-ADD: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - F64-Mult: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - F64-FMA: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - F64-Trans: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - Conversion: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - - - metric_table: - id: 1003 - title: VMEM Instr Mix - header: - type: Type - count: Count - tips: Tips - metric: - Buffer Instr: - count: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom)) - tips: - Buffer Read: - count: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) - tips: - Buffer Write: - count: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) - tips: - Buffer Atomic: - count: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) - tips: - Flat Instr: - count: AVG((TA_FLAT_WAVEFRONTS_sum / $denom)) - tips: - Flat Read: - count: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) - tips: - Flat Write: - count: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) - tips: - Flat Atomic: - count: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) - tips: - - - metric_table: - id: 1004 - title: MFMA Arithmetic Instr Mix - header: - type: Type - count: Count - tips: Tips - metric: - MFMA-I8: - count: None # No HW module - tips: - MFMA-F16: - count: None # No HW module - tips: - MFMA-BF16: - count: None # No HW module - tips: - MFMA-F32: - count: None # No HW module - tips: - MFMA-F64: - count: None # No HW module - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/1100_compute-unit-compute-pipeline.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/1100_compute-unit-compute-pipeline.yaml deleted file mode 100644 index 8cffb24c7e..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/1100_compute-unit-compute-pipeline.yaml +++ /dev/null @@ -1,154 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1100 - title: Compute Units - Compute Pipeline - data source: - - metric_table: - id: 1101 - title: Speed-of-Light - header: - metric: Metric - value: Value - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - valu_flops_pop: - value: None # No perf counter - tips: - mfma_flops_bf16_pop: - value: None # No perf counter - tips: - mfma_flops_f16_pop: - value: None # No perf counter - tips: - mfma_flops_f32_pop: - value: None # No perf counter - tips: - mfma_flops_f64_pop: - value: None # No perf counter - tips: - mfma_flops_i8_pop: - value: None # No perf counter - tips: - - - metric_table: - id: 1102 - title: Pipeline Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - IPC (Avg): - avg: AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES)) - min: MIN((SQ_INSTS / SQ_BUSY_CU_CYCLES)) - max: MAX((SQ_INSTS / SQ_BUSY_CU_CYCLES)) - unit: Instr/cycle - tips: - IPC (Issue): - avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY)) - min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY)) - max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY)) - unit: Instr/cycle - tips: - SALU Util: - avg: AVG((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) - min: MIN((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) - max: MAX((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) - unit: pct - tips: - VALU Util: - avg: AVG((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) - min: MIN((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) - max: MAX((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) - unit: pct - tips: - VALU Active Threads: - avg: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) - min: MIN(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) - max: MAX(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) - unit: Threads - tips: - MFMA Util: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: pct - tips: - MFMA Instr Cycles: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: cycles/instr - tips: - - - metric_table: - id: 1103 - title: Arithmetic Operations - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - FLOPs (Total): - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (OPs + $normUnit) - tips: - INT8 OPs: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (OPs + $normUnit) - tips: - F16 OPs: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (OPs + $normUnit) - tips: - BF16 OPs: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (OPs + $normUnit) - tips: - F32 OPs: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (OPs + $normUnit) - tips: - F64 OPs: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (OPs + $normUnit) - tips: - - diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/1200_lds.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/1200_lds.yaml deleted file mode 100644 index 3fd52c3b1b..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/1200_lds.yaml +++ /dev/null @@ -1,121 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1200 - title: Local Data Share (LDS) - data source: - - metric_table: - id: 1201 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - Utilization: - value: AVG(((100 * SQ_LDS_IDX_ACTIVE) / (GRBM_GUI_ACTIVE * $numCU))) - unit: Pct of Peak - tips: - Access Rate: - value: AVG(((200 * SQ_ACTIVE_INST_LDS) / (GRBM_GUI_ACTIVE * $numCU))) - unit: Pct of Peak - tips: - Bandwidth (Pct-of-Peak): - value: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / (EndNs - BeginNs)) / (($sclk * $numCU) * 0.00128))) - unit: Pct of Peak - tips: - Bank Conflict Rate: - value: AVG((((SQ_LDS_BANK_CONFLICT * 3.125) / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - unit: Pct of Peak - tips: - - - metric_table: - id: 1202 - title: LDS Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - LDS Instrs: - avg: AVG((SQ_INSTS_LDS / $denom)) - min: MIN((SQ_INSTS_LDS / $denom)) - max: MAX((SQ_INSTS_LDS / $denom)) - unit: (Instr + $normUnit) - tips: - Bandwidth: - avg: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / $denom)) - min: MIN(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / $denom)) - max: MAX(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / $denom)) - unit: (Bytes + $normUnit) - tips: - Bank Conficts/Access: - avg: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - min: MIN(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - max: MAX(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - unit: Conflicts/Access - tips: - Index Accesses: - avg: AVG((SQ_LDS_IDX_ACTIVE / $denom)) - min: MIN((SQ_LDS_IDX_ACTIVE / $denom)) - max: MAX((SQ_LDS_IDX_ACTIVE / $denom)) - unit: (Cycles + $normUnit) - tips: - Atomic Cycles: - avg: AVG((SQ_LDS_ATOMIC_RETURN / $denom)) - min: MIN((SQ_LDS_ATOMIC_RETURN / $denom)) - max: MAX((SQ_LDS_ATOMIC_RETURN / $denom)) - unit: (Cycles + $normUnit) - tips: - Bank Conflict: - avg: AVG((SQ_LDS_BANK_CONFLICT / $denom)) - min: MIN((SQ_LDS_BANK_CONFLICT / $denom)) - max: MAX((SQ_LDS_BANK_CONFLICT / $denom)) - unit: (Cycles + $normUnit) - tips: - Addr Conflict: - avg: AVG((SQ_LDS_ADDR_CONFLICT / $denom)) - min: MIN((SQ_LDS_ADDR_CONFLICT / $denom)) - max: MAX((SQ_LDS_ADDR_CONFLICT / $denom)) - unit: (Cycles + $normUnit) - tips: - Unaligned Stall: - avg: AVG((SQ_LDS_UNALIGNED_STALL / $denom)) - min: MIN((SQ_LDS_UNALIGNED_STALL / $denom)) - max: MAX((SQ_LDS_UNALIGNED_STALL / $denom)) - unit: (Cycles + $normUnit) - tips: - Mem Violations: - avg: AVG((SQ_LDS_MEM_VIOLATIONS / $denom)) - min: MIN((SQ_LDS_MEM_VIOLATIONS / $denom)) - max: MAX((SQ_LDS_MEM_VIOLATIONS / $denom)) - unit: ( + $normUnit) - tips: - LDS Latency: - avg: AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) - min: MIN(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) - max: MAX(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) - unit: Cycles - coll_level: SQ_INST_LEVEL_LDS - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/1300_instruction-cache.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/1300_instruction-cache.yaml deleted file mode 100644 index 05dc759803..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/1300_instruction-cache.yaml +++ /dev/null @@ -1,79 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1300 - title: Instruction Cache - data source: - - metric_table: - id: 1301 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - Bandwidth: - value: AVG(((SQC_ICACHE_REQ * 100000) / (($sclk * $numSQC) - * (EndNs - BeginNs)))) - unit: Pct of Peak - tips: - Cache Hit: - value: AVG(((SQC_ICACHE_HITS * 100) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) - + SQC_ICACHE_MISSES_DUPLICATE))) - unit: Pct of Peak - tips: - - - metric_table: - id: 1302 - title: Instruction Cache Accesses - header: - metric: L1I Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Req: - avg: AVG((SQC_ICACHE_REQ / $denom)) - min: MIN((SQC_ICACHE_REQ / $denom)) - max: MAX((SQC_ICACHE_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Hits: - avg: AVG((SQC_ICACHE_HITS / $denom)) - min: MIN((SQC_ICACHE_HITS / $denom)) - max: MAX((SQC_ICACHE_HITS / $denom)) - unit: (Hits + $normUnit) - tips: - Misses - Non Duplicated: - avg: AVG((SQC_ICACHE_MISSES / $denom)) - min: MIN((SQC_ICACHE_MISSES / $denom)) - max: MAX((SQC_ICACHE_MISSES / $denom)) - unit: (Misses + $normUnit) - tips: - Misses - Duplicated: - avg: AVG((SQC_ICACHE_MISSES_DUPLICATE / $denom)) - min: MIN((SQC_ICACHE_MISSES_DUPLICATE / $denom)) - max: MAX((SQC_ICACHE_MISSES_DUPLICATE / $denom)) - unit: (Misses + $normUnit) - tips: - Cache Hit: - avg: AVG(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) - + SQC_ICACHE_MISSES_DUPLICATE))) - min: MIN(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + - SQC_ICACHE_MISSES_DUPLICATE))) - max: MAX(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + - SQC_ICACHE_MISSES_DUPLICATE))) - unit: pct - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/1400_constant-cache.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/1400_constant-cache.yaml deleted file mode 100644 index 563caad13f..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/1400_constant-cache.yaml +++ /dev/null @@ -1,164 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1400 - title: Scalar L1 Data Cache - data source: - - metric_table: - id: 1401 - title: Speed-of-Light - header: - mertic: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - Bandwidth: - value: AVG(((SQC_DCACHE_REQ * 100000) / (($sclk * $numSQC) - * (EndNs - BeginNs)))) - unit: Pct of Peak - tips: - Cache Hit: - value: - AVG((((SQC_DCACHE_HITS * 100) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES + SQC_DCACHE_MISSES_DUPLICATE)) - if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) - unit: Pct of Peak - tips: - - - metric_table: - id: 1402 - title: Scalar L1D Cache Accesses - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Req: - avg: AVG((SQC_DCACHE_REQ / $denom)) - min: MIN((SQC_DCACHE_REQ / $denom)) - max: MAX((SQC_DCACHE_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Hits: - avg: AVG((SQC_DCACHE_HITS / $denom)) - min: MIN((SQC_DCACHE_HITS / $denom)) - max: MAX((SQC_DCACHE_HITS / $denom)) - unit: (Req + $normUnit) - tips: - Misses - Non Duplicated: - avg: AVG((SQC_DCACHE_MISSES / $denom)) - min: MIN((SQC_DCACHE_MISSES / $denom)) - max: MAX((SQC_DCACHE_MISSES / $denom)) - unit: (Req + $normUnit) - tips: - Misses- Duplicated: - avg: AVG((SQC_DCACHE_MISSES_DUPLICATE / $denom)) - min: MIN((SQC_DCACHE_MISSES_DUPLICATE / $denom)) - max: MAX((SQC_DCACHE_MISSES_DUPLICATE / $denom)) - unit: (Req + $normUnit) - tips: - Cache Hit: - avg: AVG((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) - min: MIN((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) - max: MAX((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) - unit: pct - tips: - Read Req (Total): - avg: AVG((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) - + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) - min: MIN((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) - + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) - max: MAX((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) - + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) - unit: (Req + $normUnit) - tips: - Atomic Req: - avg: AVG((SQC_DCACHE_ATOMIC / $denom)) - min: MIN((SQC_DCACHE_ATOMIC / $denom)) - max: MAX((SQC_DCACHE_ATOMIC / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (1 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_1 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_1 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_1 / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (2 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_2 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_2 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_2 / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (4 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_4 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_4 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_4 / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (8 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_8 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_8 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_8 / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (16 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_16 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_16 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_16 / $denom)) - unit: (Req + $normUnit) - tips: - - - metric_table: - id: 1403 - title: Scalar L1D Cache - L2 Interface - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Read Req: - avg: AVG((SQC_TC_DATA_READ_REQ / $denom)) - min: MIN((SQC_TC_DATA_READ_REQ / $denom)) - max: MAX((SQC_TC_DATA_READ_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Write Req: - avg: AVG((SQC_TC_DATA_WRITE_REQ / $denom)) - min: MIN((SQC_TC_DATA_WRITE_REQ / $denom)) - max: MAX((SQC_TC_DATA_WRITE_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Atomic Req: - avg: AVG((SQC_TC_DATA_ATOMIC_REQ / $denom)) - min: MIN((SQC_TC_DATA_ATOMIC_REQ / $denom)) - max: MAX((SQC_TC_DATA_ATOMIC_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Stall: - avg: AVG((SQC_TC_STALL / $denom)) - min: MIN((SQC_TC_STALL / $denom)) - max: MAX((SQC_TC_STALL / $denom)) - unit: (Cycles + $normUnit) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/1500_TA_and_TD.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/1500_TA_and_TD.yaml deleted file mode 100644 index 8f71cedc99..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/1500_TA_and_TD.yaml +++ /dev/null @@ -1,174 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1500 - title: Texture Addresser and Texture Data (TA/TD) - data source: - - metric_table: - id: 1501 - title: TA - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - TA Busy: - avg: AVG(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - TC2TA Addr Stall: - avg: AVG(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - TC2TA Data Stall: - avg: AVG(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - TD2TA Addr Stall: - avg: AVG(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - Total Instructions: - avg: AVG((TA_TOTAL_WAVEFRONTS_sum / $denom)) - min: MIN((TA_TOTAL_WAVEFRONTS_sum / $denom)) - max: MAX((TA_TOTAL_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Flat Instr: - avg: AVG((TA_FLAT_WAVEFRONTS_sum / $denom)) - min: MIN((TA_FLAT_WAVEFRONTS_sum / $denom)) - max: MAX((TA_FLAT_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Flat Read Instr: - avg: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) - min: MIN((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) - max: MAX((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Flat Write Instr: - avg: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) - min: MIN((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) - max: MAX((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Flat Atomic Instr: - avg: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) - min: MIN((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) - max: MAX((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Instr: - avg: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom)) - min: MIN((TA_BUFFER_WAVEFRONTS_sum / $denom)) - max: MAX((TA_BUFFER_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Read Instr: - avg: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) - min: MIN((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) - max: MAX((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Write Instr: - avg: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) - min: MIN((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) - max: MAX((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Atomic Instr: - avg: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) - min: MIN((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) - max: MAX((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Total Cylces: - avg: AVG((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) - min: MIN((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) - max: MAX((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) - unit: (Cycles + $normUnit) - tips: - Buffer Coalesced Read: - avg: AVG((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) - min: MIN((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) - max: MAX((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) - unit: (Cycles + $normUnit) - tips: - Buffer Coalesced Write: - avg: AVG((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) - min: MIN((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) - max: MAX((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) - unit: (Cycles + $normUnit) - tips: - - - metric_table: - id: 1502 - title: TD - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - TD Busy: - avg: AVG(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - TC2TD Stall: - avg: AVG(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - SPI2TD Stall: - avg: # No perf counter - min: # No perf counter - max: # No perf counter - unit: pct - tips: - Coalescable Instr: - avg: AVG((TD_COALESCABLE_WAVEFRONT_sum / $denom)) - min: MIN((TD_COALESCABLE_WAVEFRONT_sum / $denom)) - max: MAX((TD_COALESCABLE_WAVEFRONT_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Load Instr: - avg: AVG((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) - / $denom)) - min: MIN((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) - / $denom)) - max: MAX((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) - / $denom)) - unit: (Instr + $normUnit) - tips: - Store Instr: - avg: AVG((TD_STORE_WAVEFRONT_sum / $denom)) - min: MIN((TD_STORE_WAVEFRONT_sum / $denom)) - max: MAX((TD_STORE_WAVEFRONT_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Atomic Instr: - avg: AVG((TD_ATOMIC_WAVEFRONT_sum / $denom)) - min: MIN((TD_ATOMIC_WAVEFRONT_sum / $denom)) - max: MAX((TD_ATOMIC_WAVEFRONT_sum / $denom)) - unit: (Instr + $normUnit) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/1600_L1_cache.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/1600_L1_cache.yaml deleted file mode 100644 index 01e6d29d71..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/1600_L1_cache.yaml +++ /dev/null @@ -1,404 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1600 - title: Vector L1 Data Cache - data source: - - metric_table: - id: 1601 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - Buffer Coalescing: - value: AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum - * 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else None)) - unit: Pct of Peak - tips: - Cache Util: - value: AVG((((TCP_GATE_EN2_sum * 100) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - unit: Pct of Peak - tips: - Cache BW: - value: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs)))) - / ((($sclk / 1000) * 64) * $numCU)) - unit: Pct of Peak - tips: - Cache Hit: - value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - unit: Pct of Peak - tips: - - - metric_table: - id: 1602 - title: L1D Cache Stalls - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Stalled on L2 Data: - avg: AVG((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - min: MIN((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - max: MAX((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - unit: pct - tips: - Stalled on L2 Req: - avg: AVG((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - min: MIN((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - max: MAX((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - unit: pct - tips: - Tag RAM Stall (Read): - avg: AVG((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - min: MIN((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - max: MAX((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - unit: pct - tips: - Tag RAM Stall (Write): - avg: AVG((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - min: MIN((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - max: MAX((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - unit: pct - tips: - Tag RAM Stall (Atomic): - avg: AVG((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - min: MIN((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - max: MAX((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - unit: pct - tips: - - - metric_table: - id: 1603 - title: L1D Cache Accesses - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Total Req: - avg: AVG((TCP_TOTAL_ACCESSES_sum / $denom)) - min: MIN((TCP_TOTAL_ACCESSES_sum / $denom)) - max: MAX((TCP_TOTAL_ACCESSES_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read Req: - avg: AVG((TCP_TOTAL_READ_sum / $denom)) - min: MIN((TCP_TOTAL_READ_sum / $denom)) - max: MAX((TCP_TOTAL_READ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write Req: - avg: AVG((TCP_TOTAL_WRITE_sum / $denom)) - min: MIN((TCP_TOTAL_WRITE_sum / $denom)) - max: MAX((TCP_TOTAL_WRITE_sum / $denom)) - unit: (Req + $normUnit) - tips: - Atomic Req: - avg: AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) - / $denom)) - min: MIN(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) - / $denom)) - max: MAX(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) - / $denom)) - unit: (Req + $normUnit) - tips: - Cache BW: - avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) - min: MIN(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) - max: MAX(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) - unit: GB/s - tips: - Cache Accesses: - avg: AVG((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) - min: MIN((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) - max: MAX((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) - unit: (Req + $normUnit) - tips: - Cache Hits: - avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / $denom)) - min: MIN(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / $denom)) - max: MAX(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / $denom)) - unit: (Req + $normUnit) - tips: - Cache Hit Rate: - avg: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + - TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / - TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - min: MIN(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + - TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / - TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - max: MAX(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + - TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / - TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - unit: pct - tips: - Invalidate: - avg: AVG((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) - min: MIN((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) - max: MAX((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) - unit: ( + $normUnit) - tips: - L1-L2 BW: - avg: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) - + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) - min: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) - + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) - max: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) - + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) - unit: (Bytes + $normUnit) - tips: - L1-L2 Read: - avg: AVG((TCP_TCC_READ_REQ_sum / $denom)) - min: MIN((TCP_TCC_READ_REQ_sum / $denom)) - max: MAX((TCP_TCC_READ_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - L1-L2 Write: - avg: AVG((TCP_TCC_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - L1-L2 Atomic: - avg: AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - / $denom)) - min: MIN(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - / $denom)) - max: MAX(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - / $denom)) - unit: (Req + $normUnit) - tips: - L1 Access Latency: - avg: AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum - != 0) else None)) - min: MIN(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum - != 0) else None)) - max: MAX(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum - != 0) else None)) - unit: Cycles - tips: - L1-L2 Read Latency: - avg: AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) - if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) - min: MIN(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) - if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) - max: MAX(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) - if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) - unit: Cycles - tips: - L1-L2 Write Latency: - avg: AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else - None)) - min: MIN(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else - None)) - max: MAX(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else - None)) - unit: Cycles - tips: - - - metric_table: - id: 1604 - title: L1D - L2 Transactions - header: - metric: Metric - xfer: Xfer - coherency: Coherency - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - style: - type: simple_multi_bar - metric: - NC - Read: - xfer: Read - coherency: NC - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Req + $normUnit) - tips: - UC - Read: - xfer: Read - coherency: UC - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Req + $normUnit) - tips: - CC - Read: - xfer: Read - coherency: CC - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Req + $normUnit) - tips: - RW - Read: - xfer: Read - coherency: RW - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Req + $normUnit) - tips: - RW - Write: - xfer: Write - coherency: RW - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Req + $normUnit) - tips: - NC - Write: - xfer: Write - coherency: NC - avg: AVG((TCP_TCC_NC_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_NC_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_NC_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - CC - Write: - xfer: Write - coherency: CC - avg: AVG((TCP_TCC_CC_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_CC_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_CC_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - UC - Write: - xfer: Write - coherency: UC - avg: AVG((TCP_TCC_UC_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_UC_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_UC_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - NC - Atomic: - xfer: Atomic - coherency: NC - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Req + $normUnit) - tips: - UC - Atomic: - xfer: Atomic - coherency: UC - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Req + $normUnit) - tips: - CC - Atomic: - xfer: Atomic - coherency: CC - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Req + $normUnit) - tips: - RW - Atomic: - xfer: Atomic - coherency: RW - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Req + $normUnit) - tips: - - - metric_table: - id: 1605 - title: L1D Addr Translation - header: - metric: Metric - avg: Avg - min: Min - max: Max - units: Units - tips: Tips - metric: - Req: - avg: AVG((TCP_UTCL1_REQUEST_sum / $denom)) - min: MIN((TCP_UTCL1_REQUEST_sum / $denom)) - max: MAX((TCP_UTCL1_REQUEST_sum / $denom)) - units: (Req + $normUnit) - tips: - Hit Ratio: - avg: AVG((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if - (TCP_UTCL1_REQUEST_sum != 0) else None)) - min: MIN((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if - (TCP_UTCL1_REQUEST_sum != 0) else None)) - max: MAX((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if - (TCP_UTCL1_REQUEST_sum != 0) else None)) - units: pct - tips: - Hits: - avg: AVG((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) - min: MIN((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) - max: MAX((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) - units: (Hits + $normUnit) - tips: - Misses (Translation): - avg: AVG((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) - min: MIN((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) - max: MAX((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) - units: (Misses + $normUnit) - tips: - Misses (Permission): - avg: AVG((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) - min: MIN((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) - max: MAX((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) - units: (Misses + $normUnit) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/1700_L2_cache.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/1700_L2_cache.yaml deleted file mode 100644 index 0b5f5e827a..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/1700_L2_cache.yaml +++ /dev/null @@ -1,364 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1700 - title: L2 Cache - data source: - - metric_table: - id: 1701 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - metric: - L2 Util: - value: AVG(((TCC_BUSY_sum * 100) / (TO_INT($L2Banks) * GRBM_GUI_ACTIVE))) - unit: pct - tips: - Cache Hit: - value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else 0)) - unit: pct - tips: - L2-EA Rd BW: - value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / (EndNs - BeginNs))) - unit: GB/s - tips: - L2-EA Wr BW: - value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / (EndNs - BeginNs))) - unit: GB/s - tips: - - - metric_table: - id: 1702 - title: L2 - Fabric Transactions - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Read BW: - avg: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / $denom)) - min: MIN((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / $denom)) - max: MAX((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / $denom)) - unit: (Bytes + $normUnit) - tips: - Write BW: - avg: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / $denom)) - min: MIN((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / $denom)) - max: MAX((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / $denom)) - unit: (Bytes + $normUnit) - tips: - Read (32B): - avg: AVG((TCC_EA_RDREQ_32B_sum / $denom)) - min: MIN((TCC_EA_RDREQ_32B_sum / $denom)) - max: MAX((TCC_EA_RDREQ_32B_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read (Uncached 32B): - avg: AVG((TCC_EA_RD_UNCACHED_32B_sum / $denom)) - min: MIN((TCC_EA_RD_UNCACHED_32B_sum / $denom)) - max: MAX((TCC_EA_RD_UNCACHED_32B_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read (64B): - avg: AVG(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) - min: MIN(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) - max: MAX(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) - unit: (Req + $normUnit) - tips: - HBM Read: - avg: AVG((TCC_EA_RDREQ_DRAM_sum / $denom)) - min: MIN((TCC_EA_RDREQ_DRAM_sum / $denom)) - max: MAX((TCC_EA_RDREQ_DRAM_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write (32B): - avg: AVG(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) - min: MIN(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) - max: MAX(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) - unit: (Req + $normUnit) - tips: - Write (Uncached 32B): - avg: AVG((TCC_EA_WR_UNCACHED_32B_sum / $denom)) - min: MIN((TCC_EA_WR_UNCACHED_32B_sum / $denom)) - max: MAX((TCC_EA_WR_UNCACHED_32B_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write (64B): - avg: AVG((TCC_EA_WRREQ_64B_sum / $denom)) - min: MIN((TCC_EA_WRREQ_64B_sum / $denom)) - max: MAX((TCC_EA_WRREQ_64B_sum / $denom)) - unit: (Req + $normUnit) - tips: - HBM Write: - avg: AVG((TCC_EA_WRREQ_DRAM_sum / $denom)) - min: MIN((TCC_EA_WRREQ_DRAM_sum / $denom)) - max: MAX((TCC_EA_WRREQ_DRAM_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read Latency: - avg: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != - 0) else None)) - min: MIN(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != - 0) else None)) - max: MAX(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != - 0) else None)) - unit: Cycles - tips: - Write Latency: - avg: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != - 0) else None)) - min: MIN(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != - 0) else None)) - max: MAX(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != - 0) else None)) - unit: Cycles - tips: - Atomic Latency: - avg: AVG(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum - != 0) else None)) - min: MIN(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum - != 0) else None)) - max: MAX(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum - != 0) else None)) - unit: Cycles - tips: - Read Stall: - avg: AVG((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - min: MIN((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - max: MAX((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - unit: pct - tips: - Write Stall: - avg: AVG((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - min: MIN((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - max: MAX((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - unit: pct - tips: - - - metric_table: - id: 1703 - title: L2 Cache Accesses - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Req: - avg: AVG((TCC_REQ_sum / $denom)) - min: MIN((TCC_REQ_sum / $denom)) - max: MAX((TCC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Streaming Req: - avg: AVG((TCC_STREAMING_REQ_sum / $denom)) - min: MIN((TCC_STREAMING_REQ_sum / $denom)) - max: MAX((TCC_STREAMING_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read Req: - avg: AVG((TCC_READ_sum / $denom)) - min: MIN((TCC_READ_sum / $denom)) - max: MAX((TCC_READ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write Req: - avg: AVG((TCC_WRITE_sum / $denom)) - min: MIN((TCC_WRITE_sum / $denom)) - max: MAX((TCC_WRITE_sum / $denom)) - unit: (Req + $normUnit) - tips: - Atomic Req: - avg: AVG((TCC_ATOMIC_sum / $denom)) - min: MIN((TCC_ATOMIC_sum / $denom)) - max: MAX((TCC_ATOMIC_sum / $denom)) - unit: (Req + $normUnit) - tips: - Probe Req: - avg: AVG((TCC_PROBE_sum / $denom)) - min: MIN((TCC_PROBE_sum / $denom)) - max: MAX((TCC_PROBE_sum / $denom)) - unit: (Req + $normUnit) - tips: - Hits: - avg: AVG((TCC_HIT_sum / $denom)) - min: MIN((TCC_HIT_sum / $denom)) - max: MAX((TCC_HIT_sum / $denom)) - unit: (Hits + $normUnit) - tips: - Misses: - avg: AVG((TCC_MISS_sum / $denom)) - min: MIN((TCC_MISS_sum / $denom)) - max: MAX((TCC_MISS_sum / $denom)) - unit: (Misses + $normUnit) - tips: - Cache Hit: - avg: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - min: MIN((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - max: MAX((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - unit: pct - tips: - Writeback: - avg: AVG((TCC_WRITEBACK_sum / $denom)) - min: MIN((TCC_WRITEBACK_sum / $denom)) - max: MAX((TCC_WRITEBACK_sum / $denom)) - unit: ( + $normUnit) - tips: - NC Req: - avg: AVG((TCC_NC_REQ_sum / $denom)) - min: MIN((TCC_NC_REQ_sum / $denom)) - max: MAX((TCC_NC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - UC Req: - avg: AVG((TCC_UC_REQ_sum / $denom)) - min: MIN((TCC_UC_REQ_sum / $denom)) - max: MAX((TCC_UC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - CC Req: - avg: AVG((TCC_CC_REQ_sum / $denom)) - min: MIN((TCC_CC_REQ_sum / $denom)) - max: MAX((TCC_CC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - RW Req: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (Req + $normUnit) - tips: - Writeback (Normal): - avg: AVG((TCC_NORMAL_WRITEBACK_sum / $denom)) - min: MIN((TCC_NORMAL_WRITEBACK_sum / $denom)) - max: MAX((TCC_NORMAL_WRITEBACK_sum / $denom)) - unit: ( + $normUnit) - tips: - Writeback (TC Req): - avg: AVG((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) - min: MIN((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) - max: MAX((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) - unit: ( + $normUnit) - tips: - Evict (Normal): - avg: AVG((TCC_NORMAL_EVICT_sum / $denom)) - min: MIN((TCC_NORMAL_EVICT_sum / $denom)) - max: MAX((TCC_NORMAL_EVICT_sum / $denom)) - unit: ( + $normUnit) - tips: - Evict (TC Req): - avg: AVG((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) - min: MIN((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) - max: MAX((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) - unit: ( + $normUnit) - tips: - - - metric_table: - id: 1704 - title: L2 - EA Interface Stalls - header: - metric: Metric - type: Type - transaction: Transaction - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - style: - type: simple_multi_bar - metric: - Read - Remote Socket Stall: - type: Remote Socket Stall - transaction: Read - avg: AVG((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read - Peer GCD Stall: - type: Peer GCD Stall - transaction: Read - avg: AVG((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read - HBM Stall: - type: HBM Stall - transaction: Read - avg: AVG((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write - Remote Socket Stall: - type: Remote Socket Stall - transaction: Write - avg: AVG((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write - Peer GCD Stall: - type: Peer GCD Stall - transaction: Write - avg: AVG((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write - HBM Stall: - type: HBM Stall - transaction: Write - avg: AVG((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write - Credit Starvation: - type: Credit Starvation - transaction: Write - avg: AVG((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) - min: MIN((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) - max: MAX((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/1800_L2_cache_per_channel.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/1800_L2_cache_per_channel.yaml deleted file mode 100644 index 7a808c5b82..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/1800_L2_cache_per_channel.yaml +++ /dev/null @@ -1,1721 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1800 - title: L2 Cache (per Channel) - data source: - - metric_table: - id: 1801 - title: Aggregate Stats (All 32 channels) - header: - metric: Metric - avg: Mean - std dev: Std Dev - min: Min - max: Max - unit: Unit - tips: Tips - metric: - L2 Cache Hit Rate: - avg: AVG(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) - + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * - TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) - + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 - * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) - + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 - * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) - + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 - * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) - + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[29] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) - std dev: STD(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) - + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * - TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) - + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 - * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) - + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 - * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) - + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 - * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) - + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) - min: MIN(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) - + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * - TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) - + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 - * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) - + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 - * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) - + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 - * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) - + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) - max: MAX(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) - + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * - TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) - + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 - * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) - + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 - * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) - + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 - * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) - + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) - unit: pct - tips: - Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) - + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) - + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) - + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) - + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) - + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) - + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) - + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) - + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) - + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) - + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) - + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) - + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) - + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) - + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) - + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) - + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) - + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) - + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) - + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) - + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) - + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) - + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) - + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) - + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) - + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) - + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) - + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) - + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) - + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) - + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) - + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) - + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L1 - L2 Read Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) - + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) - + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) - + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + - TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) - + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + - TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) - + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + - TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) - + TO_INT(TCC_READ[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) - + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) - + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) - + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + - TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) - + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + - TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) - + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + - TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) - + TO_INT(TCC_READ[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) - + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) - + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) - + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + - TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) - + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + - TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) - + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + - TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) - + TO_INT(TCC_READ[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) - + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) - + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) - + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + - TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) - + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + - TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) - + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + - TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) - + TO_INT(TCC_READ[31])) / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L1 - L2 Write Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) - + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + - TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) - + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) - + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) - + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) - + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) - + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) - + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) - + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) - + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) - + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + - TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) - + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) - + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) - + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) - + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) - + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) - + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) - + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) - + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) - + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + - TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) - + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) - + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) - + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) - + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) - + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) - + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) - + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) - + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) - + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + - TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) - + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) - + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) - + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) - + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) - + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) - + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) - + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) - + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L1 - L2 Atomic Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) - + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) - + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) - + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) - + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) - + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) - + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) - + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) - + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) - + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) - + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) - / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) - + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) - + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) - + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) - + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) - + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) - + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) - + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) - + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) - + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) - + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) - / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) - + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) - + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) - + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) - + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) - + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) - + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) - + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) - + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) - + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) - + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) - / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) - + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) - + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) - + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) - + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) - + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) - + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) - + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) - + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) - + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) - + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) - / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L2 - EA Read Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) - + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) - + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) - + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) - + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) - + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) - + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) - + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) - + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) - + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) - + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) - / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) - + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) - + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) - + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) - + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) - + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) - + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) - + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) - + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) - + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) - + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) - / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) - + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) - + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) - + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) - + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) - + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) - + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) - + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) - + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) - + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) - + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) - / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) - + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) - + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) - + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) - + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) - + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) - + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) - + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) - + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) - + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) - + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) - / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L2 - EA Write Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) - + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) - + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) - + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) - + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) - + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) - + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) - + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) - + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) - + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) - + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) - / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) - + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) - + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) - + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) - + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) - + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) - + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) - + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) - + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) - + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) - + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) - / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) - + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) - + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) - + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) - + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) - + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) - + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) - + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) - + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) - + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) - + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) - / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) - + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) - + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) - + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) - + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) - + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) - + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) - + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) - + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) - + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) - + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) - / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L2 - EA Atomic Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) - + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) - + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) - + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) - + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) - + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) - + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) - + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) - + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) - + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) - + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) - / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) - + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) - + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) - + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) - + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) - + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) - + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) - + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) - + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) - + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) - + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) - / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) - + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) - + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) - + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) - + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) - + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) - + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) - + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) - + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) - + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) - + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) - / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) - + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) - + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) - + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) - + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) - + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) - + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) - + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) - + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) - + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) - + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) - / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L2 - EA Read Lat: - avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) - + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) - + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) - + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) - + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) - + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) - + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) - + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) - + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) - + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) - + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) - + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) - + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) - + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) - + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) - + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) - + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) - + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) - + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + - TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) - + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) - + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) - + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) - + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) - + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) - + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) - + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) - std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) - + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) - + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) - + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) - + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) - + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) - + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) - + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) - + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) - + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) - + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) - + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) - + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) - + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) - + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) - + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) - + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) - + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) - + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + - TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) - + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) - + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) - + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) - + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) - + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) - + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) - + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) - min: MIN((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) - + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) - + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) - + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) - + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) - + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) - + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) - + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) - + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) - + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) - + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) - + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) - + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) - + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) - + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) - + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) - + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) - + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) - + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + - TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) - + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) - + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) - + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) - + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) - + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) - + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) - + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) - max: MAX((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) - + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) - + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) - + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) - + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) - + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) - + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) - + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) - + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) - + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) - + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) - + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) - + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) - + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) - + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) - + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) - + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) - + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) - + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + - TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) - + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) - + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) - + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) - + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) - + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) - + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) - + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) - unit: Cycles - tips: - L2 - EA Write Lat: - avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) - + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) - + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) - + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) - + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) - + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) - + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) - + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) - + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) - + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) - + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) - + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) - + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) - + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) - + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) - + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) - + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) - + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) - + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + - TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) - + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) - + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) - + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) - + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) - + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) - + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) - + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) - std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) - + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) - + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) - + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) - + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) - + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) - + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) - + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) - + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) - + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) - + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) - + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) - + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) - + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) - + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) - + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) - + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) - + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) - + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + - TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) - + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) - + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) - + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) - + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) - + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) - + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) - + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) - min: MIN((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) - + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) - + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) - + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) - + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) - + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) - + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) - + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) - + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) - + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) - + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) - + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) - + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) - + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) - + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) - + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) - + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) - + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) - + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + - TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) - + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) - + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) - + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) - + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) - + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) - + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) - + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) - max: MAX((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) - + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) - + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) - + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) - + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) - + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) - + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) - + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) - + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) - + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) - + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) - + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) - + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) - + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) - + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) - + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) - + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) - + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) - + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + - TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) - + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) - + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) - + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) - + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) - + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) - + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) - + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) - unit: Cycles - tips: - L2 - EA Atomic Lat: - avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) - + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) - + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) - + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) - + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) - + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) - + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) - + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) - + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) - + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) - + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) - + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) - + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) - + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) - + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) - + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) - + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) - + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) - + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] - + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) - + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) - + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) - + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) - + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) - + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) - + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) - + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else - None)) - std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) - + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) - + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) - + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) - + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) - + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) - + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) - + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) - + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) - + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) - + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) - + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) - + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) - + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) - + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) - + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) - + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) - + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) - + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] - + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) - + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) - + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) - + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) - + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) - + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) - + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) - + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else - None)) - min: MIN((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) - + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) - + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) - + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) - + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) - + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) - + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) - + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) - + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) - + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) - + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) - + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) - + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) - + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) - + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) - + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) - + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) - + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) - + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] - + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) - + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) - + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) - + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) - + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) - + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) - + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) - + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else - None)) - max: MAX((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) - + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) - + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) - + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) - + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) - + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) - + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) - + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) - + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) - + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) - + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) - + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) - + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) - + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) - + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) - + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) - + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) - + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) - + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] - + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) - + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) - + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) - + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) - + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) - + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) - + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) - + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else - None)) - unit: Cycles - tips: - L2 - EA Read Stall (IO): - avg: None # No perf counter - std dev: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Cycles + $normUnit) - tips: - L2 - EA Read Stall (GMI): - avg: None # No perf counter - std dev: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Cycles + $normUnit) - tips: - L2 - EA Read Stall (DRAM): - avg: None # No perf counter - std dev: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Cycles + $normUnit) - tips: - L2 - EA Write Stall (IO): - avg: None # No perf counter - std dev: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Cycles + $normUnit) - tips: - L2 - EA Write Stall (GMI): - avg: None # No perf counter - std dev: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Cycles + $normUnit) - tips: - L2 - EA Write Stall (DRAM): - avg: None # No perf counter - std dev: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Cycles + $normUnit) - tips: - L2 - EA Write Starve: - avg: None # No perf counter - std dev: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (Cycles + $normUnit) - tips: - - metric_table: - id: 1802 - title: Channel 0-15 - columnwise: True - header: - channel: Channel - hit rate: L2 Cache Hit Rate (%) - req: Requests (Requests) - read req: L1-L2 Read (Requests) - write req: L1-L2 Write (Requests) - atomic req: L1-L2 Atomic (Requests) - ea read req: L2-EA Read (Requests) - ea write req: L2-EA Write (Requests) - ea atomic req: L2-EA Atomic (Requests) - ea read lat - cycles: L2-EA Read Latency (Cycles) - ea write lat - cycles: L2-EA Write Latency (Cycles) - ea atomic lat - cycles: L2-EA Atomic Latency (Cycles) - ea read stall - io: L2-EA Read Stall - IO (Cycles per) - ea read stall - gmi: L2-EA Read Stall - GMI (Cycles per) - ea read stall - dram: L2-EA Read Stall - DRAM (Cycles per) - ea write stall - io: L2-EA Write Stall - IO (Cycles per) - ea write stall - gmi: L2-EA Write Stall - GMI (Cycles per) - ea write stall - dram: L2-EA Write Stall - DRAM (Cycles per) - ea write stall - starve: L2-EA Write Stall - Starve (Cycles per) - tips: Tips - metric: - "0": - hit rate: - AVG((((100 * TCC_HIT[0]) / (TCC_HIT[0] + TCC_MISS[0])) if ((TCC_HIT[0] - + TCC_MISS[0]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[0]) / $denom)) - read req: AVG((TO_INT(TCC_READ[0]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[0]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[0]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[0]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[0]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[0]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[0] / TCC_EA_RDREQ[0]) if (TCC_EA_RDREQ[0] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[0] / TCC_EA_WRREQ[0]) if (TCC_EA_WRREQ[0] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[0] / TCC_EA_ATOMIC[0]) if - (TCC_EA_ATOMIC[0] != 0) else 0)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "1": - hit rate: - AVG((((100 * TCC_HIT[1]) / (TCC_HIT[1] + TCC_MISS[1])) if ((TCC_HIT[1] - + TCC_MISS[1]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[1]) / $denom)) - read req: AVG((TO_INT(TCC_READ[1]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[1]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[1]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[1]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[1]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[1]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[1] / TCC_EA_RDREQ[1]) if (TCC_EA_RDREQ[1] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[1] / TCC_EA_WRREQ[1]) if (TCC_EA_WRREQ[1] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[1] / TCC_EA_ATOMIC[1]) if - (TCC_EA_ATOMIC[1] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "2": - hit rate: - AVG((((100 * TCC_HIT[2]) / (TCC_HIT[2] + TCC_MISS[2])) if ((TCC_HIT[2] - + TCC_MISS[2]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[2]) / $denom)) - read req: AVG((TO_INT(TCC_READ[2]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[2]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[2]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[2]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[2]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[2]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[2] / TCC_EA_RDREQ[2]) if (TCC_EA_RDREQ[2] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[2] / TCC_EA_WRREQ[2]) if (TCC_EA_WRREQ[2] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[2] / TCC_EA_ATOMIC[2]) if - (TCC_EA_ATOMIC[2] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "3": - hit rate: - AVG((((100 * TCC_HIT[3]) / (TCC_HIT[3] + TCC_MISS[3])) if ((TCC_HIT[3] - + TCC_MISS[3]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[3]) / $denom)) - read req: AVG((TO_INT(TCC_READ[3]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[3]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[3]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[3]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[3]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[3]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[3] / TCC_EA_RDREQ[3]) if (TCC_EA_RDREQ[3] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[3] / TCC_EA_WRREQ[3]) if (TCC_EA_WRREQ[3] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[3] / TCC_EA_ATOMIC[3]) if - (TCC_EA_ATOMIC[3] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "4": - hit rate: - AVG((((100 * TCC_HIT[4]) / (TCC_HIT[4] + TCC_MISS[4])) if ((TCC_HIT[4] - + TCC_MISS[4]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[4]) / $denom)) - read req: AVG((TO_INT(TCC_READ[4]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[4]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[4]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[4]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[4]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[4]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[4] / TCC_EA_RDREQ[4]) if (TCC_EA_RDREQ[4] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[4] / TCC_EA_WRREQ[4]) if (TCC_EA_WRREQ[4] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[4] / TCC_EA_ATOMIC[4]) if - (TCC_EA_ATOMIC[4] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "5": - hit rate: - AVG((((100 * TCC_HIT[5]) / (TCC_HIT[5] + TCC_MISS[5])) if ((TCC_HIT[5] - + TCC_MISS[5]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[5]) / $denom)) - read req: AVG((TO_INT(TCC_READ[5]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[5]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[5]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[5]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[5]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[5]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[5] / TCC_EA_RDREQ[5]) if (TCC_EA_RDREQ[5] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[5] / TCC_EA_WRREQ[5]) if (TCC_EA_WRREQ[5] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[5] / TCC_EA_ATOMIC[5]) if - (TCC_EA_ATOMIC[5] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "6": - hit rate: - AVG((((100 * TCC_HIT[6]) / (TCC_HIT[6] + TCC_MISS[6])) if ((TCC_HIT[6] - + TCC_MISS[6]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[6]) / $denom)) - read req: AVG((TO_INT(TCC_READ[6]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[6]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[6]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[6]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[6]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[6]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[6] / TCC_EA_RDREQ[6]) if (TCC_EA_RDREQ[6] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[6] / TCC_EA_WRREQ[6]) if (TCC_EA_WRREQ[6] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[6] / TCC_EA_ATOMIC[6]) if - (TCC_EA_ATOMIC[6] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "7": - hit rate: - AVG((((100 * TCC_HIT[7]) / (TCC_HIT[7] + TCC_MISS[7])) if ((TCC_HIT[7] - + TCC_MISS[7]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[7]) / $denom)) - read req: AVG((TO_INT(TCC_READ[7]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[7]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[7]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[7]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[7]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[7]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[7] / TCC_EA_RDREQ[7]) if (TCC_EA_RDREQ[7] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[7] / TCC_EA_WRREQ[7]) if (TCC_EA_WRREQ[7] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[7] / TCC_EA_ATOMIC[7]) if - (TCC_EA_ATOMIC[7] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "8": - hit rate: - AVG((((100 * TCC_HIT[8]) / (TCC_HIT[8] + TCC_MISS[8])) if ((TCC_HIT[8] - + TCC_MISS[8]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[8]) / $denom)) - read req: AVG((TO_INT(TCC_READ[8]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[8]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[8]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[8]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[8]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[8]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[8] / TCC_EA_RDREQ[8]) if (TCC_EA_RDREQ[8] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[8] / TCC_EA_WRREQ[8]) if (TCC_EA_WRREQ[8] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[8] / TCC_EA_ATOMIC[8]) if - (TCC_EA_ATOMIC[8] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "9": - hit rate: - AVG((((100 * TCC_HIT[9]) / (TCC_HIT[9] + TCC_MISS[9])) if ((TCC_HIT[9] - + TCC_MISS[9]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[9]) / $denom)) - read req: AVG((TO_INT(TCC_READ[9]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[9]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[9]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[9]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[9]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[9]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[9] / TCC_EA_RDREQ[9]) if (TCC_EA_RDREQ[9] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[9] / TCC_EA_WRREQ[9]) if (TCC_EA_WRREQ[9] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[9] / TCC_EA_ATOMIC[9]) if - (TCC_EA_ATOMIC[9] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "10": - hit rate: - AVG((((100 * TCC_HIT[10]) / (TCC_HIT[10] + TCC_MISS[10])) if ((TCC_HIT[10] - + TCC_MISS[10]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[10]) / $denom)) - read req: AVG((TO_INT(TCC_READ[10]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[10]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[10]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[10]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[10]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[10]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[10] / TCC_EA_RDREQ[10]) if (TCC_EA_RDREQ[10] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[10] / TCC_EA_WRREQ[10]) if (TCC_EA_WRREQ[10] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[10] / TCC_EA_ATOMIC[10]) if - (TCC_EA_ATOMIC[10] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "11": - hit rate: - AVG((((100 * TCC_HIT[11]) / (TCC_HIT[11] + TCC_MISS[11])) if ((TCC_HIT[11] - + TCC_MISS[11]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[11]) / $denom)) - read req: AVG((TO_INT(TCC_READ[11]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[11]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[11]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[11]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[11]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[11]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[11] / TCC_EA_RDREQ[11]) if (TCC_EA_RDREQ[11] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[11] / TCC_EA_WRREQ[11]) if (TCC_EA_WRREQ[11] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[11] / TCC_EA_ATOMIC[11]) if - (TCC_EA_ATOMIC[11] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "12": - hit rate: - AVG((((100 * TCC_HIT[12]) / (TCC_HIT[12] + TCC_MISS[12])) if ((TCC_HIT[12] - + TCC_MISS[12]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[12]) / $denom)) - read req: AVG((TO_INT(TCC_READ[12]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[12]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[12]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[12]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[12]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[12]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[12] / TCC_EA_RDREQ[12]) if (TCC_EA_RDREQ[12] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[12] / TCC_EA_WRREQ[12]) if (TCC_EA_WRREQ[12] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[12] / TCC_EA_ATOMIC[12]) if - (TCC_EA_ATOMIC[12] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "13": - hit rate: - AVG((((100 * TCC_HIT[13]) / (TCC_HIT[13] + TCC_MISS[13])) if ((TCC_HIT[13] - + TCC_MISS[13]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[13]) / $denom)) - read req: AVG((TO_INT(TCC_READ[13]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[13]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[13]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[13]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[13]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[13]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[13] / TCC_EA_RDREQ[13]) if (TCC_EA_RDREQ[13] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[13] / TCC_EA_WRREQ[13]) if (TCC_EA_WRREQ[13] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[13] / TCC_EA_ATOMIC[13]) if - (TCC_EA_ATOMIC[13] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "14": - hit rate: - AVG((((100 * TCC_HIT[14]) / (TCC_HIT[14] + TCC_MISS[14])) if ((TCC_HIT[14] - + TCC_MISS[14]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[14]) / $denom)) - read req: AVG((TO_INT(TCC_READ[14]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[14]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[14]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[14]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[14]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[14]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[14] / TCC_EA_RDREQ[14]) if (TCC_EA_RDREQ[14] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[14] / TCC_EA_WRREQ[14]) if (TCC_EA_WRREQ[14] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[14] / TCC_EA_ATOMIC[14]) if - (TCC_EA_ATOMIC[14] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "15": - hit rate: - AVG((((100 * TCC_HIT[15]) / (TCC_HIT[15] + TCC_MISS[15])) if ((TCC_HIT[15] - + TCC_MISS[15]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[15]) / $denom)) - read req: AVG((TO_INT(TCC_READ[15]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[15]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[15]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[15]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[15]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[15]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[15] / TCC_EA_RDREQ[15]) if (TCC_EA_RDREQ[15] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[15] / TCC_EA_WRREQ[15]) if (TCC_EA_WRREQ[15] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[15] / TCC_EA_ATOMIC[15]) if - (TCC_EA_ATOMIC[15] != 0) else None)) - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - - - metric_table: - id: 1803 - title: Channel 16-31 - columnwise: True - header: - channel: Channel - hit rate: L2 Cache Hit Rate (%) - req: Requests (Requests) - read req: L1-L2 Read (Requests) - write req: L1-L2 Write (Requests) - atomic req: L1-L2 Atomic (Requests) - ea read req: L2-EA Read (Requests) - ea write req: L2-EA Write (Requests) - ea atomic req: L2-EA Atomic (Requests) - ea read lat - cycles: L2-EA Read Latency (Cycles) - ea write lat - cycles: L2-EA Write Latency (Cycles) - ea atomic lat - cycles: L2-EA Atomic Latency (Cycles) - ea read stall - io: L2-EA Read Stall - IO (Cycles per) - ea read stall - gmi: L2-EA Read Stall - GMI (Cycles per) - ea read stall - dram: L2-EA Read Stall - DRAM (Cycles per) - ea write stall - io: L2-EA Write Stall - IO (Cycles per) - ea write stall - gmi: L2-EA Write Stall - GMI (Cycles per) - ea write stall - dram: L2-EA Write Stall - DRAM (Cycles per) - ea write stall - starve: L2-EA Write Stall - Starve (Cycles per) - tips: Tips - metric: - "16": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "17": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "18": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "19": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "20": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "21": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "22": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "23": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "24": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "25": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "26": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "27": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "28": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "29": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "30": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: - "31": - hit rate: None # No perf counter - req: None # No perf counter - read req: None # No perf counter - write req: None # No perf counter - atomic req: None # No perf counter - ea read req: None # No perf counter - ea write req: None # No perf counter - ea atomic req: None # No perf counter - ea read lat - cycles: None # No perf counter - ea write lat - cycles: None # No perf counter - ea atomic lat - cycles: None # No perf counter - ea read stall - io: None # No perf counter - ea read stall - gmi: None # No perf counter - ea read stall - dram: None # No perf counter - ea write stall - io: None # No perf counter - ea write stall - gmi: None # No perf counter - ea write stall - dram: None # No perf counter - ea write stall - starve: None # No perf counter - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/1900_memory_chart.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/1900_memory_chart.yaml deleted file mode 100644 index 905204601d..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/1900_memory_chart.yaml +++ /dev/null @@ -1,259 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1900 - title: Memory Chart Analysis - data source: - - metric_table: - id: 1901 - title: # subtitle for this table(optional) - header: - metric: Metric - value: Value - alias: Alias - tips: Tips - metric: - Wave Life: - value: ROUND(AVG(((4 * (SQ_WAVE_CYCLES / SQ_WAVES)) if (SQ_WAVES != 0) else - None)), 0) - alias: wave_life_ - tips: - Active CUs: - value: CONCAT(CONCAT($numActiveCUs, "/"), $numCU) - alias: active_cu_ - tips: - SALU: - value: ROUND(AVG((SQ_INSTS_SALU / $denom)), 0) - alias: salu_ - tips: - SMEM: - value: ROUND(AVG((SQ_INSTS_SMEM / $denom)), 0) - alias: smem_ - tips: - VALU: - value: ROUND(AVG((SQ_INSTS_VALU / $denom)), 0) - alias: valu_ - tips: - MFMA: - value: None # No perf counter - alias: mfma_ - tips: - VMEM: - value: ROUND(AVG((SQ_INSTS_VMEM / $denom)), 0) - alias: vmem_ - tips: - LDS: - value: ROUND(AVG((SQ_INSTS_LDS / $denom)), 0) - alias: lds_ - tips: - GWS: - value: ROUND(AVG((SQ_INSTS_GDS / $denom)), 0) - alias: gws_ - tips: - BR: - value: ROUND(AVG((SQ_INSTS_BRANCH / $denom)), 0) - alias: br_ - tips: - VGPR: - value: ROUND(AVG(vgpr), 0) - alias: vgpr_ - tips: - SGPR: - value: ROUND(AVG(sgpr), 0) - alias: sgpr_ - tips: - LDS Allocation: - value: ROUND(AVG(lds), 0) - alias: lds_alloc_ - tips: - Scratch Allocation: - value: ROUND(AVG(scr), 0) - alias: scratch_alloc_ - tips: - Wavefronts: - value: ROUND(AVG(SPI_CSN_WAVE), 0) - alias: wavefronts_ - tips: - Workgroups: - value: ROUND(AVG(SPI_CSN_NUM_THREADGROUPS), 0) - alias: workgroups_ - tips: - LDS Req: - value: ROUND(AVG((SQ_INSTS_LDS / $denom)), 0) - alias: lds_req_ - tips: - IL1 Fetch: - value: ROUND(AVG((SQC_ICACHE_REQ / $denom)), 0) - alias: il1_fetch_ - tips: - IL1 Hit: - value: ROUND((AVG((SQC_ICACHE_HITS / SQC_ICACHE_REQ)) * 100), 0) - alias: il1_hit_ - tips: - IL1_L2 Rd: - value: ROUND(AVG((SQC_TC_INST_REQ / $denom)), 0) - alias: il1_l2_req_ - tips: - vL1D Rd: - value: ROUND(AVG((SQC_DCACHE_REQ / $denom)), 0) - alias: sl1_rd_ - tips: - vL1D Hit: - value: ROUND((AVG(((SQC_DCACHE_HITS / SQC_DCACHE_REQ) if (SQC_DCACHE_REQ != - 0) else None)) * 100), 0) - alias: sl1_hit_ - tips: - vL1D_L2 Rd: - value: ROUND(AVG((SQC_TC_DATA_READ_REQ / $denom)), 0) - alias: sl1_l2_rd_ - tips: - vL1D_L2 Wr: - value: ROUND(AVG((SQC_TC_DATA_WRITE_REQ / $denom)), 0) - alias: sl1_l2_wr_ - tips: - vL1D_L2 Atomic: - value: ROUND(AVG((SQC_TC_DATA_ATOMIC_REQ / $denom)), 0) - alias: sl1_l2_atom_ - tips: - VL1 Rd: - value: ROUND(AVG((TCP_TOTAL_READ_sum / $denom)), 0) - alias: vl1_rd_ - tips: - VL1 Wr: - value: ROUND(AVG((TCP_TOTAL_WRITE_sum / $denom)), 0) - alias: vl1_wr_ - tips: - VL1 Atomic: - value: ROUND(AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) - / $denom)), 0) - alias: vl1_atom_ - tips: - VL1 Hit: - value: ROUND(AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)), 0) - alias: vl1_hit_ - tips: - VL1 Lat: - value: ROUND(AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum - != 0) else None)), 0) - alias: vl1_lat_ - tips: - VL1_L2 Rd: - value: ROUND(AVG((TCP_TCC_READ_REQ_sum / $denom)), 0) - alias: vl1_l2_rd_ - tips: - VL1_L2 Wr: - value: ROUND(AVG((TCP_TCC_WRITE_REQ_sum / $denom)), 0) - alias: vl1_l2_wr_ - tips: - vL1_L2 Atomic: - value: ROUND(AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - / $denom)), 0) - alias: vl1_l2_atom_ - tips: - L2 Rd: - value: ROUND(AVG((TCC_READ_sum / $denom)), 0) - alias: l2_rd_ - tips: - L2 Wr: - value: ROUND(AVG((TCC_WRITE_sum / $denom)), 0) - alias: l2_wr_ - tips: - L2 Atomic: - value: ROUND(AVG((TCC_ATOMIC_sum / $denom)), 0) - alias: l2_atom_ - tips: - L2 Hit: - value: ROUND(AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)), 0) - alias: l2_hit_ - tips: - L2 Rd Lat: - value: ROUND(AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) - if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)), - 0) - alias: l2_rd_lat_ - tips: - L2 Wr Lat: - value: ROUND(AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + - TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - != 0) else None)), 0) - alias: l2_wr_lat_ - tips: - Fabric Rd Lat: - value: ROUND(AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum - != 0) else None)), 0) - alias: fabric_rd_lat_ - tips: - Fabric Wr Lat: - value: ROUND(AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum - != 0) else None)), 0) - alias: fabric_wr_lat_ - tips: - Fabric Atomic Lat: - value: ROUND(AVG(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum - != 0) else None)), 0) - alias: fabric_atom_lat_ - tips: - Fabric_L2 Rd: - value: ROUND(AVG((TCC_EA_RDREQ_sum / $denom)), 0) - alias: l2_fabric_rd_ - tips: - Fabric_L2 Wr: - value: ROUND(AVG((TCC_EA_WRREQ_sum / $denom)), 0) - alias: l2_fabric_wr_ - tips: - Fabric_l2 Atomic: - value: ROUND(AVG((TCC_EA_ATOMIC_sum / $denom)), 0) - alias: l2_fabric_atom_ - tips: - HBM Rd: - value: ROUND(AVG((TCC_EA_RDREQ_DRAM_sum / $denom)), 0) - alias: hbm_rd_ - tips: - HBM Wr: - value: ROUND(AVG((TCC_EA_WRREQ_DRAM_sum / $denom)), 0) - alias: hbm_wr_ - tips: - LDS Util: - value: ROUND(AVG(((100 * SQ_LDS_IDX_ACTIVE) / (GRBM_GUI_ACTIVE * $numCU))), - 0) - alias: lds_util_ - tips: - VL1 Coalesce: - value: ROUND(AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum - * 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else 0)), 0) - alias: vl1_coales_ - tips: - VL1 Stall: - value: ROUND(AVG((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)), 0) - alias: vl1_stall_ - tips: - LDS Lat: - value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) - if (SQ_INSTS_LDS != 0) else None)), 0) - alias: lds_lat_ - coll_level: SQ_INST_LEVEL_LDS - tips: - vL1D Lat: - value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQC_DCACHE_REQ) - if (SQC_DCACHE_REQ != 0) else None)), 0) - alias: sl1_lat_ - tips: - IL1 Lat: - value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQC_ICACHE_REQ) - if (SQC_ICACHE_REQ != 0) else None)), 0) - alias: il1_lat_ - tips: - Wave Occupancy: - value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE) / $numActiveCUs)), 0) - alias: wave_occ_ - coll_level: SQ_LEVEL_WAVES - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx906/2000_kernels.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx906/2000_kernels.yaml deleted file mode 100644 index ed566f75a2..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx906/2000_kernels.yaml +++ /dev/null @@ -1,8 +0,0 @@ ---- -Panel Config: - id: 2000 - title: Kernels - data source: - - raw_csv_table: - id: 2001 - source: pmc_dispatch_info.csv diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/0000_top_stat.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/0000_top_stat.yaml deleted file mode 100644 index 077004080f..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/0000_top_stat.yaml +++ /dev/null @@ -1,8 +0,0 @@ ---- -Panel Config: - id: 000 - title: Top Stat - data source: - - raw_csv_table: - id: 001 - source: pmc_kernel_top.csv diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/0100_system_info.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/0100_system_info.yaml deleted file mode 100644 index b7ec29eaf9..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/0100_system_info.yaml +++ /dev/null @@ -1,9 +0,0 @@ ---- -Panel Config: - id: 100 - title: System Info - data source: - - raw_csv_table: - id: 101 - source: sysinfo.csv - columnwise: True diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/0200_system-speed-of-light.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/0200_system-speed-of-light.yaml deleted file mode 100644 index 986b2f0aec..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/0200_system-speed-of-light.yaml +++ /dev/null @@ -1,230 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - SALU: &SALU_anchor Scalar Arithmetic Logic Unit - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 200 - title: System Speed-of-Light - data source: - - metric_table: - id: 201 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - peak: Peak - pop: PoP - tips: Tips - metric: - VALU FLOPs: - value: None # No perf counter - unit: GFLOPs - peak: (((($sclk * $numCU) * 64) * 2) / 1000) - pop: None # No perf counter - tips: - VALU IOPs: - value: None # No perf counter - unit: GOPs - peak: (((($sclk * $numCU) * 64) * 2) / 1000) - pop: None # No perf counter - tips: - MFMA FLOPs (BF16): - value: None # No perf counter - unit: GFLOPs - peak: ((($sclk * $numCU) * 512) / 1000) - pop: None # No perf counter - tips: - MFMA FLOPs (F16): - value: None # No perf counter - unit: GFLOPs - peak: ((($sclk * $numCU) * 1024) / 1000) - pop: None # No perf counter - tips: - MFMA FLOPs (F32): - value: None # No perf counter - unit: GFLOPs - peak: ((($sclk * $numCU) * 256) / 1000) - pop: None # No perf counter - tips: - MFMA FLOPs (F64): - value: None # No perf counter - unit: GFLOPs - peak: ((($sclk * $numCU) * 256) / 1000) - pop: None # No perf counter - tips: - MFMA IOPs (Int8): - value: None # No perf counter - unit: GOPs - peak: ((($sclk * $numCU) * 1024) / 1000) - pop: None # No perf counter - tips: - Active CUs: - value: $numActiveCUs - unit: CUs - peak: $numCU - pop: ((100 * $numActiveCUs) / $numCU) - tips: - SALU Util: - value: AVG(((100 * SQ_ACTIVE_INST_SCA) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - peak: 100 - pop: AVG(((100 * SQ_ACTIVE_INST_SCA) / (GRBM_GUI_ACTIVE * $numCU))) - tips: - VALU Util: - value: AVG(((100 * SQ_ACTIVE_INST_VALU) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - peak: 100 - pop: AVG(((100 * SQ_ACTIVE_INST_VALU) / (GRBM_GUI_ACTIVE * $numCU))) - tips: - MFMA Util: - value: None # No HW module - unit: pct - peak: 100 - pop: None # No HW module - tips: - VALU Active Threads/Wave: - value: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) - unit: Threads - peak: 64 - pop: (AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) * 1.5625) - tips: - IPC - Issue: - value: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY)) - unit: Instr/cycle - peak: 5 - pop: ((100 * AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY))) / 5) - tips: - LDS BW: - value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / (EndNs - BeginNs))) - unit: GB/sec - peak: (($sclk * $numCU) * 0.128) - pop: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / (EndNs - BeginNs)) / (($sclk * $numCU) * 0.00128))) - tips: - LDS Bank Conflict: - value: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - unit: Conflicts/access - peak: 32 - pop: ((100 * AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))) / 32) - tips: - Instr Cache Hit Rate: - value: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES))) - unit: pct - peak: 100 - pop: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES))) - tips: - Instr Cache BW: - value: AVG(((SQC_ICACHE_REQ / (EndNs - BeginNs)) * 64)) - unit: GB/s - peak: ((($sclk / 1000) * 64) * $numSQC) - pop: ((100 * AVG(((SQC_ICACHE_REQ / (EndNs - BeginNs)) * 64))) / ((($sclk - / 1000) * 64) * $numSQC)) - tips: - Scalar L1D Cache Hit Rate: - value: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES)) - if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None)) - unit: pct - peak: 100 - pop: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES)) - if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None)) - tips: - Scalar L1D Cache BW: - value: AVG(((SQC_DCACHE_REQ / (EndNs - BeginNs)) * 64)) - unit: GB/s - peak: ((($sclk / 1000) * 64) * $numSQC) - pop: ((100 * AVG(((SQC_DCACHE_REQ / (EndNs - BeginNs)) * 64))) / ((($sclk - / 1000) * 64) * $numSQC)) - tips: - Vector L1D Cache Hit Rate: - value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - unit: pct - peak: 100 - pop: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + - TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / - TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - tips: - Vector L1D Cache BW: - value: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) - unit: GB/s - peak: ((($sclk / 1000) * 64) * $numCU) - pop: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs)))) - / ((($sclk / 1000) * 64) * $numCU)) - tips: - L2 Cache Hit Rate: - value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - unit: pct - peak: 100 - pop: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - tips: - L2-Fabric Read BW: - value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / (EndNs - BeginNs))) - unit: GB/s - peak: $hbmBW - pop: ((100 * AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / (EndNs - BeginNs)))) / $hbmBW) - tips: - L2-Fabric Write BW: - value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / (EndNs - BeginNs))) - unit: GB/s - peak: $hbmBW - pop: ((100 * AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / (EndNs - BeginNs)))) / $hbmBW) - tips: - L2-Fabric Read Latency: - value: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum - != 0) else None)) - unit: Cycles - peak: '' - pop: '' - tips: - L2-Fabric Write Latency: - value: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum - != 0) else None)) - unit: Cycles - peak: '' - pop: '' - tips: - Wave Occupancy: - value: AVG((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) - unit: Wavefronts - peak: ($maxWavesPerCU * $numCU) - pop: (100 * AVG(((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE) / ($maxWavesPerCU - * $numCU)))) - coll_level: SQ_LEVEL_WAVES - tips: - Instr Fetch BW: - value: AVG(((SQ_IFETCH / (EndNs - BeginNs)) * 32)) - unit: GB/s - peak: ((($sclk / 1000) * 32) * $numSQC) - pop: ((100 * AVG(((SQ_IFETCH / (EndNs - BeginNs)) * 32))) / ($numSQC - * (($sclk / 1000) * 32))) - coll_level: SQ_IFETCH_LEVEL - tips: - Instr Fetch Latency: - value: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH)) - unit: Cycles - peak: '' - pop: '' - coll_level: SQ_IFETCH_LEVEL - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/0500_command-processor.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/0500_command-processor.yaml deleted file mode 100644 index 5250918799..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/0500_command-processor.yaml +++ /dev/null @@ -1,180 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 500 - title: Command Processor (CPC/CPF) - data source: - - metric_table: - id: 501 - title: Command Processor Fetcher - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - GPU Busy Cycles: - avg: AVG(GRBM_GUI_ACTIVE) - min: MIN(GRBM_GUI_ACTIVE) - max: MAX(GRBM_GUI_ACTIVE) - unit: Cycles/Kernel - tips: - CPF Busy: - avg: AVG(CPF_CPF_STAT_BUSY) - min: MIN(CPF_CPF_STAT_BUSY) - max: MAX(CPF_CPF_STAT_BUSY) - unit: Cycles/Kernel - tips: - CPF Util: - avg: AVG((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) - if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) - min: MIN((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) - if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) - max: MAX((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) - if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) - unit: pct - tips: - CPF Stall: - avg: AVG((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY - != 0) else None)) - min: MIN((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY - != 0) else None)) - max: MAX((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY - != 0) else None)) - unit: Cycles/Kernel - tips: - L2Cache Intf Busy: - avg: AVG(CPF_CPF_TCIU_BUSY) - min: MIN(CPF_CPF_TCIU_BUSY) - max: MAX(CPF_CPF_TCIU_BUSY) - unit: Cycles/Kernel - tips: - L2Cache Intf Util: - avg: AVG((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) - if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) - min: MIN((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) - if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) - max: MAX((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) - if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) - unit: pct - tips: - L2Cache Intf Stall: - avg: AVG((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY - != 0) else None)) - min: MIN((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY - != 0) else None)) - max: MAX((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY - != 0) else None)) - unit: pct - tips: - UTCL1 Stall: - avg: AVG(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) - min: MIN(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) - max: MAX(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) - unit: Cycles/Kernel - tips: - - - metric_table: - id: 502 - title: Command Processor Compute - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - GPU Busy Cycles: - avg: AVG(GRBM_GUI_ACTIVE) - min: MIN(GRBM_GUI_ACTIVE) - max: MAX(GRBM_GUI_ACTIVE) - unit: Cycles - tips: - CPC Busy Cycles: - avg: AVG(CPC_CPC_STAT_BUSY) - min: MIN(CPC_CPC_STAT_BUSY) - max: MAX(CPC_CPC_STAT_BUSY) - unit: Cycles - tips: - CPC Util: - avg: AVG((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) - if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) - min: MIN((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) - if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) - max: MAX((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) - if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) - unit: pct - tips: - CPC Stall Cycles: - avg: AVG(CPC_CPC_STAT_STALL) - min: MIN(CPC_CPC_STAT_STALL) - max: MAX(CPC_CPC_STAT_STALL) - unit: Cycles - tips: - CPC Stall Rate: - avg: AVG((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - min: MIN((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - max: MAX((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - unit: pct - tips: - CPC Packet Decoding: - avg: AVG(CPC_ME1_BUSY_FOR_PACKET_DECODE) - min: MIN(CPC_ME1_BUSY_FOR_PACKET_DECODE) - max: MAX(CPC_ME1_BUSY_FOR_PACKET_DECODE) - unit: Cycles - tips: - SPI Intf Busy Cycles: - avg: AVG(CPC_ME1_DC0_SPI_BUSY) - min: MIN(CPC_ME1_DC0_SPI_BUSY) - max: MAX(CPC_ME1_DC0_SPI_BUSY) - unit: Cycles - tips: - SPI Intf Util: - avg: AVG((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - min: MIN((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - max: MAX((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - unit: pct - tips: - L2Cache Intf Util: - avg: AVG((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) - if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) - min: MIN((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) - if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) - max: MAX((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) - if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) - unit: pct - tips: - UTCL1 Stall Cycles: - avg: AVG(CPC_UTCL1_STALL_ON_TRANSLATION) - min: MIN(CPC_UTCL1_STALL_ON_TRANSLATION) - max: MAX(CPC_UTCL1_STALL_ON_TRANSLATION) - unit: Cycles - tips: - UTCL2 Intf Busy Cycles: - avg: AVG(CPC_CPC_UTCL2IU_BUSY) - min: MIN(CPC_CPC_UTCL2IU_BUSY) - max: MAX(CPC_CPC_UTCL2IU_BUSY) - unit: Cycles - tips: - UTCL2 Intf Util: - avg: AVG((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) - if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) - min: MIN((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) - if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) - max: MAX((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) - if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) - unit: pct - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/0600_shader-processor-input.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/0600_shader-processor-input.yaml deleted file mode 100644 index 38b81ed4fc..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/0600_shader-processor-input.yaml +++ /dev/null @@ -1,174 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 600 - title: Shader Processor Input (SPI) - data source: - - metric_table: - id: 601 - title: SPI Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - GPU Busy: - avg: AVG(GRBM_GUI_ACTIVE) - min: MIN(GRBM_GUI_ACTIVE) - max: MAX(GRBM_GUI_ACTIVE) - unit: Cycles - tips: - CS Busy: - avg: AVG(SPI_CSN_BUSY) - min: MIN(SPI_CSN_BUSY) - max: MAX(SPI_CSN_BUSY) - unit: Cycles - tips: - SPI Busy: - avg: AVG(GRBM_SPI_BUSY) - min: MIN(GRBM_SPI_BUSY) - max: MAX(GRBM_SPI_BUSY) - unit: Cycles - tips: - SQ Busy: - avg: AVG(SQ_BUSY_CYCLES) - min: MIN(SQ_BUSY_CYCLES) - max: MAX(SQ_BUSY_CYCLES) - unit: Cycles - tips: - Dispatched Workgroups: - avg: AVG(SPI_CSN_NUM_THREADGROUPS) - min: MIN(SPI_CSN_NUM_THREADGROUPS) - max: MAX(SPI_CSN_NUM_THREADGROUPS) - unit: Workgroups - tips: - Dispatched Wavefronts: - avg: AVG(SPI_CSN_WAVE) - min: MIN(SPI_CSN_WAVE) - max: MAX(SPI_CSN_WAVE) - unit: Wavefronts - tips: - Wave Alloc Failed: - avg: AVG(SPI_RA_REQ_NO_ALLOC) - min: MIN(SPI_RA_REQ_NO_ALLOC) - max: MAX(SPI_RA_REQ_NO_ALLOC) - unit: Cycles - tips: - Wave Alloc Failed - CS: - avg: AVG(SPI_RA_REQ_NO_ALLOC_CSN) - min: MIN(SPI_RA_REQ_NO_ALLOC_CSN) - max: MAX(SPI_RA_REQ_NO_ALLOC_CSN) - unit: Cycles - tips: - - - metric_table: - id: 602 - title: SPI Resource Allocation - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Wave request Failed (CS): - avg: AVG(SPI_RA_REQ_NO_ALLOC_CSN) - min: MIN(SPI_RA_REQ_NO_ALLOC_CSN) - max: MAX(SPI_RA_REQ_NO_ALLOC_CSN) - unit: Cycles - tips: - CS Stall: - avg: AVG(SPI_RA_RES_STALL_CSN) - min: MIN(SPI_RA_RES_STALL_CSN) - max: MAX(SPI_RA_RES_STALL_CSN) - unit: Cycles - tips: - CS Stall Rate: - avg: AVG((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != - 0) else None)) - min: MIN((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != - 0) else None)) - max: MAX((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != - 0) else None)) - unit: pct - tips: - Scratch Stall: - avg: AVG(SPI_RA_TMP_STALL_CSN) - min: MIN(SPI_RA_TMP_STALL_CSN) - max: MAX(SPI_RA_TMP_STALL_CSN) - unit: Cycles - tips: - Insufficient SIMD Waveslots: - avg: AVG(SPI_RA_WAVE_SIMD_FULL_CSN) - min: MIN(SPI_RA_WAVE_SIMD_FULL_CSN) - max: MAX(SPI_RA_WAVE_SIMD_FULL_CSN) - unit: SIMD - tips: - Insufficient SIMD VGPRs: - avg: AVG(SPI_RA_VGPR_SIMD_FULL_CSN) - min: MIN(SPI_RA_VGPR_SIMD_FULL_CSN) - max: MAX(SPI_RA_VGPR_SIMD_FULL_CSN) - unit: SIMD - tips: - Insufficient SIMD SGPRs: - avg: AVG(SPI_RA_SGPR_SIMD_FULL_CSN) - min: MIN(SPI_RA_SGPR_SIMD_FULL_CSN) - max: MAX(SPI_RA_SGPR_SIMD_FULL_CSN) - unit: SIMD - tips: - Insufficient CU LDS: - avg: AVG(SPI_RA_LDS_CU_FULL_CSN) - min: MIN(SPI_RA_LDS_CU_FULL_CSN) - max: MAX(SPI_RA_LDS_CU_FULL_CSN) - unit: CU - tips: - Insufficient CU Barries: - avg: AVG(SPI_RA_BAR_CU_FULL_CSN) - min: MIN(SPI_RA_BAR_CU_FULL_CSN) - max: MAX(SPI_RA_BAR_CU_FULL_CSN) - unit: CU - tips: - Insufficient Bulky Resource: - avg: AVG(SPI_RA_BULKY_CU_FULL_CSN) - min: MIN(SPI_RA_BULKY_CU_FULL_CSN) - max: MAX(SPI_RA_BULKY_CU_FULL_CSN) - unit: CU - tips: - Reach CU Threadgroups Limit: - avg: AVG(SPI_RA_TGLIM_CU_FULL_CSN) - min: MIN(SPI_RA_TGLIM_CU_FULL_CSN) - max: MAX(SPI_RA_TGLIM_CU_FULL_CSN) - unit: Cycles - tips: - Reach CU Wave Limit: - avg: AVG(SPI_RA_WVLIM_STALL_CSN) - min: MIN(SPI_RA_WVLIM_STALL_CSN) - max: MAX(SPI_RA_WVLIM_STALL_CSN) - unit: Cycles - tips: - VGPR Writes: - avg: AVG((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - min: MIN((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - max: MAX((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - unit: Cycles/wave - tips: - SGPR Writes: - avg: AVG((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - min: MIN((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - max: MAX((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - unit: Cycles/wave - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/0700_wavefront-launch.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/0700_wavefront-launch.yaml deleted file mode 100644 index 70141193e6..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/0700_wavefront-launch.yaml +++ /dev/null @@ -1,142 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 700 - title: Wavefront - data source: - - metric_table: - id: 701 - title: Wavefront Launch Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Grid Size: - avg: AVG(grd) - min: MIN(grd) - max: MAX(grd) - unit: Work Items - tips: - Workgroup Size: - avg: AVG(wgr) - min: MIN(wgr) - max: MAX(wgr) - unit: Work Items - tips: - Total Wavefronts: - avg: AVG(SPI_CSN_WAVE) - min: MIN(SPI_CSN_WAVE) - max: MAX(SPI_CSN_WAVE) - unit: Wavefronts - tips: - Saved Wavefronts: - avg: AVG(SQ_WAVES_SAVED) - min: MIN(SQ_WAVES_SAVED) - max: MAX(SQ_WAVES_SAVED) - unit: Wavefronts - tips: - Restored Wavefronts: - avg: AVG(SQ_WAVES_RESTORED) - min: MIN(SQ_WAVES_RESTORED) - max: MAX(SQ_WAVES_RESTORED) - unit: Wavefronts - tips: - VGPRs: - avg: AVG(arch_vgpr) - min: MIN(arch_vgpr) - max: MAX(arch_vgpr) - unit: Registers - tips: - AGPRs: - avg: AVG(accum_vgpr) - min: MIN(accum_vgpr) - max: MAX(accum_vgpr) - unit: Registers - tips: - SGPRs: - avg: AVG(sgpr) - min: MIN(sgpr) - max: MAX(sgpr) - unit: Registers - tips: - LDS Allocation: - avg: AVG(lds) - min: MIN(lds) - max: MAX(lds) - unit: Bytes - tips: - Scratch Allocation: - avg: AVG(scr) - min: MIN(scr) - max: MAX(scr) - unit: Bytes - tips: - - - metric_table: - id: 702 - title: Wavefront Runtime Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Kernel Time (Nanosec): - avg: AVG((EndNs - BeginNs)) - min: MIN((EndNs - BeginNs)) - max: MAX((EndNs - BeginNs)) - unit: ns - tips: - Kernel Time (Cycles): - avg: AVG(GRBM_GUI_ACTIVE) - min: MIN(GRBM_GUI_ACTIVE) - max: MAX(GRBM_GUI_ACTIVE) - unit: Cycle - tips: - Instr/wavefront: - avg: AVG((SQ_INSTS / SQ_WAVES)) - min: MIN((SQ_INSTS / SQ_WAVES)) - max: MAX((SQ_INSTS / SQ_WAVES)) - unit: Instr/wavefront - tips: - Wave Cycles: - avg: AVG(((4 * SQ_WAVE_CYCLES) / $denom)) - min: MIN(((4 * SQ_WAVE_CYCLES) / $denom)) - max: MAX(((4 * SQ_WAVE_CYCLES) / $denom)) - unit: (Cycles + $normUnit) - tips: - Dependency Wait Cycles: - avg: AVG(((4 * SQ_WAIT_ANY) / $denom)) - min: MIN(((4 * SQ_WAIT_ANY) / $denom)) - max: MAX(((4 * SQ_WAIT_ANY) / $denom)) - unit: (Cycles + $normUnit) - tips: - Issue Wait Cycles: - avg: AVG(((4 * SQ_WAIT_INST_ANY) / $denom)) - min: MIN(((4 * SQ_WAIT_INST_ANY) / $denom)) - max: MAX(((4 * SQ_WAIT_INST_ANY) / $denom)) - unit: (Cycles + $normUnit) - tips: - Active Cycles: - avg: AVG(((4 * SQ_ACTIVE_INST_ANY) / $denom)) - min: MIN(((4 * SQ_ACTIVE_INST_ANY) / $denom)) - max: MAX(((4 * SQ_ACTIVE_INST_ANY) / $denom)) - unit: (Cycles + $normUnit) - tips: - Wavefront Occupancy: - avg: AVG((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) - min: MIN((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) - max: MAX((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) - unit: Wavefronts - coll_level: SQ_LEVEL_WAVES - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/1000_compute-unit-instruction-mix.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/1000_compute-unit-instruction-mix.yaml deleted file mode 100644 index 13c27dd209..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/1000_compute-unit-instruction-mix.yaml +++ /dev/null @@ -1,234 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1000 - title: Compute Units - Instruction Mix - data source: - - metric_table: - id: 1001 - title: Instruction Mix - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - style: - type: simple_bar - label_txt: (# of instr + $normUnit) - metric: - VALU - Vector: - avg: AVG(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom)) - min: MIN(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom)) - max: MAX(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom)) - unit: (instr + $normUnit) - tips: - VMEM: - avg: AVG(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom)) - min: MIN(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom)) - max: MAX(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom)) - unit: (instr + $normUnit) - tips: - LDS: - avg: AVG((SQ_INSTS_LDS / $denom)) - min: MIN((SQ_INSTS_LDS / $denom)) - max: MAX((SQ_INSTS_LDS / $denom)) - unit: (instr + $normUnit) - tips: - VALU - MFMA: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: (instr + $normUnit) - tips: - SALU: - avg: AVG((SQ_INSTS_SALU / $denom)) - min: MIN((SQ_INSTS_SALU / $denom)) - max: MAX((SQ_INSTS_SALU / $denom)) - unit: (instr + $normUnit) - tips: - SMEM: - avg: AVG((SQ_INSTS_SMEM / $denom)) - min: MIN((SQ_INSTS_SMEM / $denom)) - max: MAX((SQ_INSTS_SMEM / $denom)) - unit: (instr + $normUnit) - tips: - Branch: - avg: AVG((SQ_INSTS_BRANCH / $denom)) - min: MIN((SQ_INSTS_BRANCH / $denom)) - max: MAX((SQ_INSTS_BRANCH / $denom)) - unit: (instr + $normUnit) - tips: - GDS: - avg: AVG((SQ_INSTS_GDS / $denom)) - min: MIN((SQ_INSTS_GDS / $denom)) - max: MAX((SQ_INSTS_GDS / $denom)) - unit: (instr + $normUnit) - tips: - - - metric_table: - id: 1002 - title: VALU Arithmetic Instr Mix - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - style: - type: simple_bar - label_txt: (# of instr + $normUnit) - metric: - INT-32: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - INT-64: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - F16-ADD: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - F16-Mult: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - F16-FMA: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - F16-Trans: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - F32-ADD: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - F32-Mult: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - F32-FMA: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - F32-Trans: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - F64-ADD: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - F64-Mult: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - F64-FMA: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - F64-Trans: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - Conversion: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (instr + $normUnit) - tips: - - - metric_table: - id: 1003 - title: VMEM Instr Mix - header: - type: Type - count: Count - tips: Tips - metric: - Buffer Instr: - count: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom)) - tips: - Buffer Read: - count: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) - tips: - Buffer Write: - count: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) - tips: - Buffer Atomic: - count: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) - tips: - Flat Instr: - count: AVG((TA_FLAT_WAVEFRONTS_sum / $denom)) - tips: - Flat Read: - count: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) - tips: - Flat Write: - count: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) - tips: - Flat Atomic: - count: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) - tips: - - - metric_table: - id: 1004 - title: MFMA Arithmetic Instr Mix - header: - type: Type - count: Count - tips: Tips - metric: - MFMA-I8: - count: None # No HW module - tips: - MFMA-F16: - count: None # No HW module - tips: - MFMA-BF16: - count: None # No HW module - tips: - MFMA-F32: - count: None # No HW module - tips: - MFMA-F64: - count: None # No HW module - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/1100_compute-unit-compute-pipeline.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/1100_compute-unit-compute-pipeline.yaml deleted file mode 100644 index 061311d62d..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/1100_compute-unit-compute-pipeline.yaml +++ /dev/null @@ -1,155 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1100 - title: Compute Units - Compute Pipeline - data source: - - metric_table: - id: 1101 - title: Speed-of-Light - header: - metric: Metric - value: Value - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - valu_flops_pop: - value: None # No perf counter - tips: - mfma_flops_bf16_pop: - value: None # No perf counter - tips: - mfma_flops_f16_pop: - value: None # No perf counter - tips: - mfma_flops_f32_pop: - value: None # No perf counter - tips: - mfma_flops_f64_pop: - value: None # No perf counter - tips: - mfma_flops_i8_pop: - value: None # No perf counter - tips: - - - metric_table: - id: 1102 - title: Pipeline Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - IPC (Avg): - avg: AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES)) - min: MIN((SQ_INSTS / SQ_BUSY_CU_CYCLES)) - max: MAX((SQ_INSTS / SQ_BUSY_CU_CYCLES)) - unit: Instr/cycle - tips: - IPC (Issue): - avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY)) - min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY)) - max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY)) - unit: Instr/cycle - tips: - SALU Util: - avg: AVG((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) - min: MIN((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) - max: MAX((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) - unit: pct - tips: - VALU Util: - avg: AVG((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) - min: MIN((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) - max: MAX((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) - unit: pct - tips: - VALU Active Threads: - avg: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) - min: MIN(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) - max: MAX(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) - unit: Threads - tips: - MFMA Util: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: pct - tips: - MFMA Instr Cycles: - avg: None # No HW module - min: None # No HW module - max: None # No HW module - unit: cycles/instr - tips: - - - metric_table: - id: 1103 - title: Arithmetic Operations - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - FLOPs (Total): - #FIXME: double check what is available on MI100!!! - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (OPs + $normUnit) - tips: - INT8 OPs: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (OPs + $normUnit) - tips: - F16 OPs: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (OPs + $normUnit) - tips: - BF16 OPs: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (OPs + $normUnit) - tips: - F32 OPs: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (OPs + $normUnit) - tips: - F64 OPs: - avg: None # No perf counter - min: None # No perf counter - max: None # No perf counter - unit: (OPs + $normUnit) - tips: - - diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/1200_lds.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/1200_lds.yaml deleted file mode 100644 index 3fd52c3b1b..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/1200_lds.yaml +++ /dev/null @@ -1,121 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1200 - title: Local Data Share (LDS) - data source: - - metric_table: - id: 1201 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - Utilization: - value: AVG(((100 * SQ_LDS_IDX_ACTIVE) / (GRBM_GUI_ACTIVE * $numCU))) - unit: Pct of Peak - tips: - Access Rate: - value: AVG(((200 * SQ_ACTIVE_INST_LDS) / (GRBM_GUI_ACTIVE * $numCU))) - unit: Pct of Peak - tips: - Bandwidth (Pct-of-Peak): - value: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / (EndNs - BeginNs)) / (($sclk * $numCU) * 0.00128))) - unit: Pct of Peak - tips: - Bank Conflict Rate: - value: AVG((((SQ_LDS_BANK_CONFLICT * 3.125) / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - unit: Pct of Peak - tips: - - - metric_table: - id: 1202 - title: LDS Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - LDS Instrs: - avg: AVG((SQ_INSTS_LDS / $denom)) - min: MIN((SQ_INSTS_LDS / $denom)) - max: MAX((SQ_INSTS_LDS / $denom)) - unit: (Instr + $normUnit) - tips: - Bandwidth: - avg: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / $denom)) - min: MIN(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / $denom)) - max: MAX(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / $denom)) - unit: (Bytes + $normUnit) - tips: - Bank Conficts/Access: - avg: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - min: MIN(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - max: MAX(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - unit: Conflicts/Access - tips: - Index Accesses: - avg: AVG((SQ_LDS_IDX_ACTIVE / $denom)) - min: MIN((SQ_LDS_IDX_ACTIVE / $denom)) - max: MAX((SQ_LDS_IDX_ACTIVE / $denom)) - unit: (Cycles + $normUnit) - tips: - Atomic Cycles: - avg: AVG((SQ_LDS_ATOMIC_RETURN / $denom)) - min: MIN((SQ_LDS_ATOMIC_RETURN / $denom)) - max: MAX((SQ_LDS_ATOMIC_RETURN / $denom)) - unit: (Cycles + $normUnit) - tips: - Bank Conflict: - avg: AVG((SQ_LDS_BANK_CONFLICT / $denom)) - min: MIN((SQ_LDS_BANK_CONFLICT / $denom)) - max: MAX((SQ_LDS_BANK_CONFLICT / $denom)) - unit: (Cycles + $normUnit) - tips: - Addr Conflict: - avg: AVG((SQ_LDS_ADDR_CONFLICT / $denom)) - min: MIN((SQ_LDS_ADDR_CONFLICT / $denom)) - max: MAX((SQ_LDS_ADDR_CONFLICT / $denom)) - unit: (Cycles + $normUnit) - tips: - Unaligned Stall: - avg: AVG((SQ_LDS_UNALIGNED_STALL / $denom)) - min: MIN((SQ_LDS_UNALIGNED_STALL / $denom)) - max: MAX((SQ_LDS_UNALIGNED_STALL / $denom)) - unit: (Cycles + $normUnit) - tips: - Mem Violations: - avg: AVG((SQ_LDS_MEM_VIOLATIONS / $denom)) - min: MIN((SQ_LDS_MEM_VIOLATIONS / $denom)) - max: MAX((SQ_LDS_MEM_VIOLATIONS / $denom)) - unit: ( + $normUnit) - tips: - LDS Latency: - avg: AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) - min: MIN(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) - max: MAX(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) - unit: Cycles - coll_level: SQ_INST_LEVEL_LDS - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/1300_instruction-cache.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/1300_instruction-cache.yaml deleted file mode 100644 index 05dc759803..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/1300_instruction-cache.yaml +++ /dev/null @@ -1,79 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1300 - title: Instruction Cache - data source: - - metric_table: - id: 1301 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - Bandwidth: - value: AVG(((SQC_ICACHE_REQ * 100000) / (($sclk * $numSQC) - * (EndNs - BeginNs)))) - unit: Pct of Peak - tips: - Cache Hit: - value: AVG(((SQC_ICACHE_HITS * 100) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) - + SQC_ICACHE_MISSES_DUPLICATE))) - unit: Pct of Peak - tips: - - - metric_table: - id: 1302 - title: Instruction Cache Accesses - header: - metric: L1I Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Req: - avg: AVG((SQC_ICACHE_REQ / $denom)) - min: MIN((SQC_ICACHE_REQ / $denom)) - max: MAX((SQC_ICACHE_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Hits: - avg: AVG((SQC_ICACHE_HITS / $denom)) - min: MIN((SQC_ICACHE_HITS / $denom)) - max: MAX((SQC_ICACHE_HITS / $denom)) - unit: (Hits + $normUnit) - tips: - Misses - Non Duplicated: - avg: AVG((SQC_ICACHE_MISSES / $denom)) - min: MIN((SQC_ICACHE_MISSES / $denom)) - max: MAX((SQC_ICACHE_MISSES / $denom)) - unit: (Misses + $normUnit) - tips: - Misses - Duplicated: - avg: AVG((SQC_ICACHE_MISSES_DUPLICATE / $denom)) - min: MIN((SQC_ICACHE_MISSES_DUPLICATE / $denom)) - max: MAX((SQC_ICACHE_MISSES_DUPLICATE / $denom)) - unit: (Misses + $normUnit) - tips: - Cache Hit: - avg: AVG(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) - + SQC_ICACHE_MISSES_DUPLICATE))) - min: MIN(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + - SQC_ICACHE_MISSES_DUPLICATE))) - max: MAX(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + - SQC_ICACHE_MISSES_DUPLICATE))) - unit: pct - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/1400_constant-cache.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/1400_constant-cache.yaml deleted file mode 100644 index 563caad13f..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/1400_constant-cache.yaml +++ /dev/null @@ -1,164 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1400 - title: Scalar L1 Data Cache - data source: - - metric_table: - id: 1401 - title: Speed-of-Light - header: - mertic: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - Bandwidth: - value: AVG(((SQC_DCACHE_REQ * 100000) / (($sclk * $numSQC) - * (EndNs - BeginNs)))) - unit: Pct of Peak - tips: - Cache Hit: - value: - AVG((((SQC_DCACHE_HITS * 100) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES + SQC_DCACHE_MISSES_DUPLICATE)) - if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) - unit: Pct of Peak - tips: - - - metric_table: - id: 1402 - title: Scalar L1D Cache Accesses - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Req: - avg: AVG((SQC_DCACHE_REQ / $denom)) - min: MIN((SQC_DCACHE_REQ / $denom)) - max: MAX((SQC_DCACHE_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Hits: - avg: AVG((SQC_DCACHE_HITS / $denom)) - min: MIN((SQC_DCACHE_HITS / $denom)) - max: MAX((SQC_DCACHE_HITS / $denom)) - unit: (Req + $normUnit) - tips: - Misses - Non Duplicated: - avg: AVG((SQC_DCACHE_MISSES / $denom)) - min: MIN((SQC_DCACHE_MISSES / $denom)) - max: MAX((SQC_DCACHE_MISSES / $denom)) - unit: (Req + $normUnit) - tips: - Misses- Duplicated: - avg: AVG((SQC_DCACHE_MISSES_DUPLICATE / $denom)) - min: MIN((SQC_DCACHE_MISSES_DUPLICATE / $denom)) - max: MAX((SQC_DCACHE_MISSES_DUPLICATE / $denom)) - unit: (Req + $normUnit) - tips: - Cache Hit: - avg: AVG((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) - min: MIN((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) - max: MAX((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) - unit: pct - tips: - Read Req (Total): - avg: AVG((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) - + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) - min: MIN((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) - + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) - max: MAX((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) - + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) - unit: (Req + $normUnit) - tips: - Atomic Req: - avg: AVG((SQC_DCACHE_ATOMIC / $denom)) - min: MIN((SQC_DCACHE_ATOMIC / $denom)) - max: MAX((SQC_DCACHE_ATOMIC / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (1 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_1 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_1 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_1 / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (2 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_2 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_2 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_2 / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (4 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_4 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_4 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_4 / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (8 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_8 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_8 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_8 / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (16 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_16 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_16 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_16 / $denom)) - unit: (Req + $normUnit) - tips: - - - metric_table: - id: 1403 - title: Scalar L1D Cache - L2 Interface - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Read Req: - avg: AVG((SQC_TC_DATA_READ_REQ / $denom)) - min: MIN((SQC_TC_DATA_READ_REQ / $denom)) - max: MAX((SQC_TC_DATA_READ_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Write Req: - avg: AVG((SQC_TC_DATA_WRITE_REQ / $denom)) - min: MIN((SQC_TC_DATA_WRITE_REQ / $denom)) - max: MAX((SQC_TC_DATA_WRITE_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Atomic Req: - avg: AVG((SQC_TC_DATA_ATOMIC_REQ / $denom)) - min: MIN((SQC_TC_DATA_ATOMIC_REQ / $denom)) - max: MAX((SQC_TC_DATA_ATOMIC_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Stall: - avg: AVG((SQC_TC_STALL / $denom)) - min: MIN((SQC_TC_STALL / $denom)) - max: MAX((SQC_TC_STALL / $denom)) - unit: (Cycles + $normUnit) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/1500_TA_and_TD.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/1500_TA_and_TD.yaml deleted file mode 100644 index 8f71cedc99..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/1500_TA_and_TD.yaml +++ /dev/null @@ -1,174 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1500 - title: Texture Addresser and Texture Data (TA/TD) - data source: - - metric_table: - id: 1501 - title: TA - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - TA Busy: - avg: AVG(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - TC2TA Addr Stall: - avg: AVG(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - TC2TA Data Stall: - avg: AVG(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - TD2TA Addr Stall: - avg: AVG(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - Total Instructions: - avg: AVG((TA_TOTAL_WAVEFRONTS_sum / $denom)) - min: MIN((TA_TOTAL_WAVEFRONTS_sum / $denom)) - max: MAX((TA_TOTAL_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Flat Instr: - avg: AVG((TA_FLAT_WAVEFRONTS_sum / $denom)) - min: MIN((TA_FLAT_WAVEFRONTS_sum / $denom)) - max: MAX((TA_FLAT_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Flat Read Instr: - avg: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) - min: MIN((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) - max: MAX((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Flat Write Instr: - avg: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) - min: MIN((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) - max: MAX((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Flat Atomic Instr: - avg: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) - min: MIN((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) - max: MAX((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Instr: - avg: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom)) - min: MIN((TA_BUFFER_WAVEFRONTS_sum / $denom)) - max: MAX((TA_BUFFER_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Read Instr: - avg: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) - min: MIN((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) - max: MAX((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Write Instr: - avg: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) - min: MIN((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) - max: MAX((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Atomic Instr: - avg: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) - min: MIN((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) - max: MAX((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Total Cylces: - avg: AVG((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) - min: MIN((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) - max: MAX((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) - unit: (Cycles + $normUnit) - tips: - Buffer Coalesced Read: - avg: AVG((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) - min: MIN((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) - max: MAX((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) - unit: (Cycles + $normUnit) - tips: - Buffer Coalesced Write: - avg: AVG((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) - min: MIN((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) - max: MAX((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) - unit: (Cycles + $normUnit) - tips: - - - metric_table: - id: 1502 - title: TD - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - TD Busy: - avg: AVG(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - TC2TD Stall: - avg: AVG(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - SPI2TD Stall: - avg: # No perf counter - min: # No perf counter - max: # No perf counter - unit: pct - tips: - Coalescable Instr: - avg: AVG((TD_COALESCABLE_WAVEFRONT_sum / $denom)) - min: MIN((TD_COALESCABLE_WAVEFRONT_sum / $denom)) - max: MAX((TD_COALESCABLE_WAVEFRONT_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Load Instr: - avg: AVG((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) - / $denom)) - min: MIN((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) - / $denom)) - max: MAX((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) - / $denom)) - unit: (Instr + $normUnit) - tips: - Store Instr: - avg: AVG((TD_STORE_WAVEFRONT_sum / $denom)) - min: MIN((TD_STORE_WAVEFRONT_sum / $denom)) - max: MAX((TD_STORE_WAVEFRONT_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Atomic Instr: - avg: AVG((TD_ATOMIC_WAVEFRONT_sum / $denom)) - min: MIN((TD_ATOMIC_WAVEFRONT_sum / $denom)) - max: MAX((TD_ATOMIC_WAVEFRONT_sum / $denom)) - unit: (Instr + $normUnit) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/1600_L1_cache.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/1600_L1_cache.yaml deleted file mode 100644 index cac92b1f2b..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/1600_L1_cache.yaml +++ /dev/null @@ -1,404 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1600 - title: Vector L1 Data Cache - data source: - - metric_table: - id: 1601 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - Buffer Coalescing: - value: AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum - * 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else None)) - unit: Pct of Peak - tips: - Cache Util: - value: AVG((((TCP_GATE_EN2_sum * 100) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - unit: Pct of Peak - tips: - Cache BW: - value: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs)))) - / ((($sclk / 1000) * 64) * $numCU)) - unit: Pct of Peak - tips: - Cache Hit: - value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - unit: Pct of Peak - tips: - - - metric_table: - id: 1602 - title: L1D Cache Stalls - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Stalled on L2 Data: - avg: AVG((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - min: MIN((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - max: MAX((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - unit: pct - tips: - Stalled on L2 Req: - avg: AVG((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - min: MIN((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - max: MAX((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - unit: pct - tips: - Tag RAM Stall (Read): - avg: AVG((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - min: MIN((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - max: MAX((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - unit: pct - tips: - Tag RAM Stall (Write): - avg: AVG((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - min: MIN((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - max: MAX((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - unit: pct - tips: - Tag RAM Stall (Atomic): - avg: AVG((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - min: MIN((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - max: MAX((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - unit: pct - tips: - - - metric_table: - id: 1603 - title: L1D Cache Accesses - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Total Req: - avg: AVG((TCP_TOTAL_ACCESSES_sum / $denom)) - min: MIN((TCP_TOTAL_ACCESSES_sum / $denom)) - max: MAX((TCP_TOTAL_ACCESSES_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read Req: - avg: AVG((TCP_TOTAL_READ_sum / $denom)) - min: MIN((TCP_TOTAL_READ_sum / $denom)) - max: MAX((TCP_TOTAL_READ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write Req: - avg: AVG((TCP_TOTAL_WRITE_sum / $denom)) - min: MIN((TCP_TOTAL_WRITE_sum / $denom)) - max: MAX((TCP_TOTAL_WRITE_sum / $denom)) - unit: (Req + $normUnit) - tips: - Atomic Req: - avg: AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) - / $denom)) - min: MIN(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) - / $denom)) - max: MAX(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) - / $denom)) - unit: (Req + $normUnit) - tips: - Cache BW: - avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) - min: MIN(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) - max: MAX(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) - unit: GB/s - tips: - Cache Accesses: - avg: AVG((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) - min: MIN((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) - max: MAX((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) - unit: (Req + $normUnit) - tips: - Cache Hits: - avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / $denom)) - min: MIN(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / $denom)) - max: MAX(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / $denom)) - unit: (Req + $normUnit) - tips: - Cache Hit Rate: - avg: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + - TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / - TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - min: MIN(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + - TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / - TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - max: MAX(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + - TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / - TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - unit: pct - tips: - Invalidate: - avg: AVG((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) - min: MIN((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) - max: MAX((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) - unit: ( + $normUnit) - tips: - L1-L2 BW: - avg: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) - + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) - min: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) - + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) - max: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) - + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) - unit: (Bytes + $normUnit) - tips: - L1-L2 Read: - avg: AVG((TCP_TCC_READ_REQ_sum / $denom)) - min: MIN((TCP_TCC_READ_REQ_sum / $denom)) - max: MAX((TCP_TCC_READ_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - L1-L2 Write: - avg: AVG((TCP_TCC_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - L1-L2 Atomic: - avg: AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - / $denom)) - min: MIN(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - / $denom)) - max: MAX(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - / $denom)) - unit: (Req + $normUnit) - tips: - L1 Access Latency: - avg: AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum - != 0) else None)) - min: MIN(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum - != 0) else None)) - max: MAX(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum - != 0) else None)) - unit: Cycles - tips: - L1-L2 Read Latency: - avg: AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) - if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) - min: MIN(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) - if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) - max: MAX(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) - if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) - unit: Cycles - tips: - L1-L2 Write Latency: - avg: AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else - None)) - min: MIN(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else - None)) - max: MAX(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else - None)) - unit: Cycles - tips: - - - metric_table: - id: 1604 - title: L1D - L2 Transactions - header: - metric: Metric - xfer: Xfer - coherency: Coherency - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - style: - type: simple_multi_bar - metric: - NC - Read: - xfer: Read - coherency: NC - avg: AVG((TCP_TCC_NC_READ_REQ_sum / $denom)) - min: MIN((TCP_TCC_NC_READ_REQ_sum / $denom)) - max: MAX((TCP_TCC_NC_READ_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - UC - Read: - xfer: Read - coherency: UC - avg: AVG((TCP_TCC_UC_READ_REQ_sum / $denom)) - min: MIN((TCP_TCC_UC_READ_REQ_sum / $denom)) - max: MAX((TCP_TCC_UC_READ_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - CC - Read: - xfer: Read - coherency: CC - avg: AVG((TCP_TCC_CC_READ_REQ_sum / $denom)) - min: MIN((TCP_TCC_CC_READ_REQ_sum / $denom)) - max: MAX((TCP_TCC_CC_READ_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - RW - Read: - xfer: Read - coherency: RW - avg: AVG((TCP_TCC_RW_READ_REQ_sum / $denom)) - min: MIN((TCP_TCC_RW_READ_REQ_sum / $denom)) - max: MAX((TCP_TCC_RW_READ_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - RW - Write: - xfer: Write - coherency: RW - avg: AVG((TCP_TCC_RW_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_RW_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_RW_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - NC - Write: - xfer: Write - coherency: NC - avg: AVG((TCP_TCC_NC_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_NC_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_NC_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - UC - Write: - xfer: Write - coherency: UC - avg: AVG((TCP_TCC_UC_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_UC_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_UC_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - CC - Write: - xfer: Write - coherency: CC - avg: AVG((TCP_TCC_CC_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_CC_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_CC_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - NC - Atomic: - xfer: Atomic - coherency: NC - avg: AVG((TCP_TCC_NC_ATOMIC_REQ_sum / $denom)) - min: MIN((TCP_TCC_NC_ATOMIC_REQ_sum / $denom)) - max: MAX((TCP_TCC_NC_ATOMIC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - UC - Atomic: - xfer: Atomic - coherency: UC - avg: AVG((TCP_TCC_UC_ATOMIC_REQ_sum / $denom)) - min: MIN((TCP_TCC_UC_ATOMIC_REQ_sum / $denom)) - max: MAX((TCP_TCC_UC_ATOMIC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - CC - Atomic: - xfer: Atomic - coherency: CC - avg: AVG((TCP_TCC_CC_ATOMIC_REQ_sum / $denom)) - min: MIN((TCP_TCC_CC_ATOMIC_REQ_sum / $denom)) - max: MAX((TCP_TCC_CC_ATOMIC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - RW - Atomic: - xfer: Atomic - coherency: RW - avg: AVG((TCP_TCC_RW_ATOMIC_REQ_sum / $denom)) - min: MIN((TCP_TCC_RW_ATOMIC_REQ_sum / $denom)) - max: MAX((TCP_TCC_RW_ATOMIC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - - - metric_table: - id: 1605 - title: L1D Addr Translation - header: - metric: Metric - avg: Avg - min: Min - max: Max - units: Units - tips: Tips - metric: - Req: - avg: AVG((TCP_UTCL1_REQUEST_sum / $denom)) - min: MIN((TCP_UTCL1_REQUEST_sum / $denom)) - max: MAX((TCP_UTCL1_REQUEST_sum / $denom)) - units: (Req + $normUnit) - tips: - Hit Ratio: - avg: AVG((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if - (TCP_UTCL1_REQUEST_sum != 0) else None)) - min: MIN((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if - (TCP_UTCL1_REQUEST_sum != 0) else None)) - max: MAX((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if - (TCP_UTCL1_REQUEST_sum != 0) else None)) - units: pct - tips: - Hits: - avg: AVG((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) - min: MIN((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) - max: MAX((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) - units: (Hits + $normUnit) - tips: - Misses (Translation): - avg: AVG((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) - min: MIN((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) - max: MAX((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) - units: (Misses + $normUnit) - tips: - Misses (Permission): - avg: AVG((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) - min: MIN((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) - max: MAX((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) - units: (Misses + $normUnit) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/1700_L2_cache.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/1700_L2_cache.yaml deleted file mode 100644 index 0c7b03811a..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/1700_L2_cache.yaml +++ /dev/null @@ -1,364 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1700 - title: L2 Cache - data source: - - metric_table: - id: 1701 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - metric: - L2 Util: - value: AVG(((TCC_BUSY_sum * 100) / (TO_INT($L2Banks) * GRBM_GUI_ACTIVE))) - unit: pct - tips: - Cache Hit: - value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else 0)) - unit: pct - tips: - L2-EA Rd BW: - value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / (EndNs - BeginNs))) - unit: GB/s - tips: - L2-EA Wr BW: - value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / (EndNs - BeginNs))) - unit: GB/s - tips: - - - metric_table: - id: 1702 - title: L2 - Fabric Transactions - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Read BW: - avg: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / $denom)) - min: MIN((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / $denom)) - max: MAX((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / $denom)) - unit: (Bytes + $normUnit) - tips: - Write BW: - avg: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / $denom)) - min: MIN((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / $denom)) - max: MAX((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / $denom)) - unit: (Bytes + $normUnit) - tips: - Read (32B): - avg: AVG((TCC_EA_RDREQ_32B_sum / $denom)) - min: MIN((TCC_EA_RDREQ_32B_sum / $denom)) - max: MAX((TCC_EA_RDREQ_32B_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read (Uncached 32B): - avg: AVG((TCC_EA_RD_UNCACHED_32B_sum / $denom)) - min: MIN((TCC_EA_RD_UNCACHED_32B_sum / $denom)) - max: MAX((TCC_EA_RD_UNCACHED_32B_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read (64B): - avg: AVG(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) - min: MIN(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) - max: MAX(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) - unit: (Req + $normUnit) - tips: - HBM Read: - avg: AVG((TCC_EA_RDREQ_DRAM_sum / $denom)) - min: MIN((TCC_EA_RDREQ_DRAM_sum / $denom)) - max: MAX((TCC_EA_RDREQ_DRAM_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write (32B): - avg: AVG(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) - min: MIN(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) - max: MAX(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) - unit: (Req + $normUnit) - tips: - Write (Uncached 32B): - avg: AVG((TCC_EA_WR_UNCACHED_32B_sum / $denom)) - min: MIN((TCC_EA_WR_UNCACHED_32B_sum / $denom)) - max: MAX((TCC_EA_WR_UNCACHED_32B_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write (64B): - avg: AVG((TCC_EA_WRREQ_64B_sum / $denom)) - min: MIN((TCC_EA_WRREQ_64B_sum / $denom)) - max: MAX((TCC_EA_WRREQ_64B_sum / $denom)) - unit: (Req + $normUnit) - tips: - HBM Write: - avg: AVG((TCC_EA_WRREQ_DRAM_sum / $denom)) - min: MIN((TCC_EA_WRREQ_DRAM_sum / $denom)) - max: MAX((TCC_EA_WRREQ_DRAM_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read Latency: - avg: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != - 0) else None)) - min: MIN(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != - 0) else None)) - max: MAX(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != - 0) else None)) - unit: Cycles - tips: - Write Latency: - avg: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != - 0) else None)) - min: MIN(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != - 0) else None)) - max: MAX(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != - 0) else None)) - unit: Cycles - tips: - Atomic Latency: - avg: AVG(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum - != 0) else None)) - min: MIN(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum - != 0) else None)) - max: MAX(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum - != 0) else None)) - unit: Cycles - tips: - Read Stall: - avg: AVG((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - min: MIN((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - max: MAX((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - unit: pct - tips: - Write Stall: - avg: AVG((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - min: MIN((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - max: MAX((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - unit: pct - tips: - - - metric_table: - id: 1703 - title: L2 Cache Accesses - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Req: - avg: AVG((TCC_REQ_sum / $denom)) - min: MIN((TCC_REQ_sum / $denom)) - max: MAX((TCC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Streaming Req: - avg: AVG((TCC_STREAMING_REQ_sum / $denom)) - min: MIN((TCC_STREAMING_REQ_sum / $denom)) - max: MAX((TCC_STREAMING_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read Req: - avg: AVG((TCC_READ_sum / $denom)) - min: MIN((TCC_READ_sum / $denom)) - max: MAX((TCC_READ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write Req: - avg: AVG((TCC_WRITE_sum / $denom)) - min: MIN((TCC_WRITE_sum / $denom)) - max: MAX((TCC_WRITE_sum / $denom)) - unit: (Req + $normUnit) - tips: - Atomic Req: - avg: AVG((TCC_ATOMIC_sum / $denom)) - min: MIN((TCC_ATOMIC_sum / $denom)) - max: MAX((TCC_ATOMIC_sum / $denom)) - unit: (Req + $normUnit) - tips: - Probe Req: - avg: AVG((TCC_PROBE_sum / $denom)) - min: MIN((TCC_PROBE_sum / $denom)) - max: MAX((TCC_PROBE_sum / $denom)) - unit: (Req + $normUnit) - tips: - Hits: - avg: AVG((TCC_HIT_sum / $denom)) - min: MIN((TCC_HIT_sum / $denom)) - max: MAX((TCC_HIT_sum / $denom)) - unit: (Hits + $normUnit) - tips: - Misses: - avg: AVG((TCC_MISS_sum / $denom)) - min: MIN((TCC_MISS_sum / $denom)) - max: MAX((TCC_MISS_sum / $denom)) - unit: (Misses + $normUnit) - tips: - Cache Hit: - avg: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - min: MIN((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - max: MAX((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - unit: pct - tips: - Writeback: - avg: AVG((TCC_WRITEBACK_sum / $denom)) - min: MIN((TCC_WRITEBACK_sum / $denom)) - max: MAX((TCC_WRITEBACK_sum / $denom)) - unit: ( + $normUnit) - tips: - NC Req: - avg: AVG((TCC_NC_REQ_sum / $denom)) - min: MIN((TCC_NC_REQ_sum / $denom)) - max: MAX((TCC_NC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - UC Req: - avg: AVG((TCC_UC_REQ_sum / $denom)) - min: MIN((TCC_UC_REQ_sum / $denom)) - max: MAX((TCC_UC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - CC Req: - avg: AVG((TCC_CC_REQ_sum / $denom)) - min: MIN((TCC_CC_REQ_sum / $denom)) - max: MAX((TCC_CC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - RW Req: - avg: AVG((TCC_RW_REQ_sum / $denom)) - min: MIN((TCC_RW_REQ_sum / $denom)) - max: MAX((TCC_RW_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Writeback (Normal): - avg: AVG((TCC_NORMAL_WRITEBACK_sum / $denom)) - min: MIN((TCC_NORMAL_WRITEBACK_sum / $denom)) - max: MAX((TCC_NORMAL_WRITEBACK_sum / $denom)) - unit: ( + $normUnit) - tips: - Writeback (TC Req): - avg: AVG((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) - min: MIN((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) - max: MAX((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) - unit: ( + $normUnit) - tips: - Evict (Normal): - avg: AVG((TCC_NORMAL_EVICT_sum / $denom)) - min: MIN((TCC_NORMAL_EVICT_sum / $denom)) - max: MAX((TCC_NORMAL_EVICT_sum / $denom)) - unit: ( + $normUnit) - tips: - Evict (TC Req): - avg: AVG((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) - min: MIN((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) - max: MAX((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) - unit: ( + $normUnit) - tips: - - - metric_table: - id: 1704 - title: L2 - EA Interface Stalls - header: - metric: Metric - type: Type - transaction: Transaction - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - style: - type: simple_multi_bar - metric: - Read - Remote Socket Stall: - type: Remote Socket Stall - transaction: Read - avg: AVG((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read - Peer GCD Stall: - type: Peer GCD Stall - transaction: Read - avg: AVG((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read - HBM Stall: - type: HBM Stall - transaction: Read - avg: AVG((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write - Remote Socket Stall: - type: Remote Socket Stall - transaction: Write - avg: AVG((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write - Peer GCD Stall: - type: Peer GCD Stall - transaction: Write - avg: AVG((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write - HBM Stall: - type: HBM Stall - transaction: Write - avg: AVG((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write - Credit Starvation: - type: Credit Starvation - transaction: Write - avg: AVG((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) - min: MIN((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) - max: MAX((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/1800_L2_cache_per_channel.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/1800_L2_cache_per_channel.yaml deleted file mode 100644 index 45f8abb413..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/1800_L2_cache_per_channel.yaml +++ /dev/null @@ -1,2297 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1800 - title: L2 Cache (per Channel) - data source: - - metric_table: - id: 1801 - title: Aggregate Stats (All 32 channels) - header: - metric: Metric - avg: Avg - std dev: Std Dev - min: Min - max: Max - unit: Unit - tips: Tips - metric: - L2 Cache Hit Rate: - avg: AVG(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) - + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * - TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) - + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 - * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) - + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 - * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) - + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 - * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) - + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[29] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) - std dev: STD(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) - + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * - TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) - + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 - * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) - + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 - * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) - + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 - * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) - + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) - min: MIN(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) - + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * - TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) - + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 - * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) - + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 - * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) - + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 - * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) - + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) - max: MAX(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) - + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * - TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) - + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 - * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) - + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 - * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) - + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 - * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) - + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) - unit: pct - tips: - Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) - + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) - + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) - + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) - + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) - + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) - + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) - + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) - + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) - + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) - + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) - + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) - + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) - + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) - + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) - + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) - + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) - + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) - + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) - + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) - + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) - + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) - + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) - + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) - + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) - + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) - + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) - + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) - + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) - + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) - + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) - + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) - + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L1 - L2 Read Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) - + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) - + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) - + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + - TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) - + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + - TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) - + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + - TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) - + TO_INT(TCC_READ[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) - + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) - + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) - + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + - TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) - + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + - TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) - + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + - TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) - + TO_INT(TCC_READ[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) - + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) - + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) - + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + - TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) - + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + - TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) - + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + - TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) - + TO_INT(TCC_READ[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) - + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) - + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) - + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + - TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) - + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + - TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) - + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + - TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) - + TO_INT(TCC_READ[31])) / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L1 - L2 Write Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) - + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + - TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) - + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) - + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) - + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) - + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) - + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) - + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) - + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) - + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) - + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + - TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) - + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) - + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) - + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) - + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) - + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) - + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) - + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) - + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) - + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + - TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) - + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) - + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) - + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) - + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) - + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) - + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) - + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) - + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) - + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + - TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) - + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) - + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) - + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) - + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) - + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) - + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) - + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) - + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L1 - L2 Atomic Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) - + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) - + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) - + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) - + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) - + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) - + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) - + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) - + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) - + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) - + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) - / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) - + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) - + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) - + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) - + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) - + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) - + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) - + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) - + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) - + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) - + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) - / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) - + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) - + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) - + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) - + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) - + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) - + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) - + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) - + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) - + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) - + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) - / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) - + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) - + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) - + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) - + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) - + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) - + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) - + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) - + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) - + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) - + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) - / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L2 - EA Read Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) - + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) - + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) - + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) - + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) - + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) - + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) - + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) - + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) - + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) - + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) - / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) - + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) - + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) - + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) - + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) - + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) - + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) - + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) - + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) - + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) - + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) - / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) - + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) - + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) - + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) - + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) - + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) - + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) - + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) - + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) - + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) - + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) - / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) - + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) - + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) - + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) - + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) - + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) - + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) - + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) - + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) - + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) - + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) - / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L2 - EA Write Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) - + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) - + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) - + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) - + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) - + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) - + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) - + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) - + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) - + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) - + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) - / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) - + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) - + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) - + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) - + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) - + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) - + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) - + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) - + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) - + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) - + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) - / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) - + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) - + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) - + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) - + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) - + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) - + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) - + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) - + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) - + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) - + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) - / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) - + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) - + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) - + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) - + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) - + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) - + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) - + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) - + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) - + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) - + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) - / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L2 - EA Atomic Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) - + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) - + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) - + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) - + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) - + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) - + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) - + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) - + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) - + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) - + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) - / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) - + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) - + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) - + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) - + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) - + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) - + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) - + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) - + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) - + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) - + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) - / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) - + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) - + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) - + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) - + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) - + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) - + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) - + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) - + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) - + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) - + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) - / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) - + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) - + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) - + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) - + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) - + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) - + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) - + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) - + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) - + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) - + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) - / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L2 - EA Read Lat: - avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) - + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) - + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) - + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) - + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) - + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) - + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) - + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) - + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) - + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) - + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) - + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) - + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) - + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) - + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) - + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) - + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) - + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) - + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + - TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) - + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) - + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) - + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) - + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) - + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) - + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) - + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) - std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) - + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) - + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) - + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) - + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) - + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) - + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) - + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) - + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) - + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) - + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) - + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) - + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) - + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) - + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) - + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) - + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) - + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) - + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + - TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) - + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) - + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) - + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) - + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) - + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) - + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) - + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) - min: MIN((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) - + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) - + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) - + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) - + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) - + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) - + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) - + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) - + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) - + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) - + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) - + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) - + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) - + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) - + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) - + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) - + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) - + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) - + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + - TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) - + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) - + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) - + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) - + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) - + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) - + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) - + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) - max: MAX((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) - + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) - + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) - + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) - + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) - + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) - + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) - + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) - + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) - + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) - + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) - + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) - + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) - + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) - + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) - + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) - + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) - + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) - + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + - TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) - + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) - + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) - + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) - + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) - + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) - + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) - + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) - unit: Cycles - tips: - L2 - EA Write Lat: - avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) - + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) - + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) - + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) - + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) - + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) - + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) - + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) - + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) - + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) - + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) - + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) - + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) - + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) - + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) - + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) - + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) - + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) - + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + - TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) - + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) - + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) - + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) - + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) - + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) - + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) - + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) - std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) - + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) - + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) - + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) - + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) - + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) - + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) - + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) - + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) - + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) - + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) - + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) - + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) - + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) - + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) - + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) - + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) - + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) - + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + - TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) - + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) - + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) - + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) - + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) - + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) - + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) - + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) - min: MIN((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) - + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) - + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) - + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) - + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) - + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) - + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) - + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) - + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) - + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) - + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) - + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) - + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) - + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) - + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) - + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) - + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) - + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) - + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + - TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) - + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) - + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) - + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) - + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) - + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) - + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) - + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) - max: MAX((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) - + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) - + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) - + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) - + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) - + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) - + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) - + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) - + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) - + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) - + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) - + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) - + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) - + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) - + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) - + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) - + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) - + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) - + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + - TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) - + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) - + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) - + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) - + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) - + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) - + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) - + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) - unit: Cycles - tips: - L2 - EA Atomic Lat: - avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) - + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) - + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) - + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) - + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) - + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) - + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) - + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) - + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) - + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) - + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) - + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) - + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) - + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) - + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) - + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) - + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) - + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) - + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] - + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) - + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) - + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) - + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) - + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) - + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) - + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) - + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else - None)) - std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) - + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) - + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) - + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) - + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) - + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) - + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) - + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) - + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) - + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) - + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) - + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) - + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) - + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) - + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) - + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) - + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) - + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) - + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] - + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) - + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) - + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) - + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) - + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) - + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) - + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) - + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else - None)) - min: MIN((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) - + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) - + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) - + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) - + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) - + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) - + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) - + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) - + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) - + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) - + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) - + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) - + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) - + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) - + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) - + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) - + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) - + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) - + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] - + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) - + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) - + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) - + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) - + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) - + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) - + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) - + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else - None)) - max: MAX((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) - + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) - + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) - + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) - + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) - + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) - + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) - + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) - + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) - + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) - + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) - + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) - + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) - + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) - + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) - + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) - + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) - + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) - + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] - + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) - + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) - + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) - + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) - + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) - + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) - + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) - + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else - None)) - unit: Cycles - tips: - L2 - EA Read Stall (IO): - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - L2 - EA Read Stall (GMI): - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - L2 - EA Read Stall (DRAM): - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - L2 - EA Write Stall (IO): - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - L2 - EA Write Stall (GMI): - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - L2 - EA Write Stall (DRAM): - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - L2 - EA Write Starve: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - - metric_table: - id: 1802 - title: Channel 0-15 - columnwise: True - header: - channel: Channel - hit rate: L2 Cache Hit Rate (%) - req: Requests (Requests) - read req: L1-L2 Read (Requests) - write req: L1-L2 Write (Requests) - atomic req: L1-L2 Atomic (Requests) - ea read req: L2-EA Read (Requests) - ea write req: L2-EA Write (Requests) - ea atomic req: L2-EA Atomic (Requests) - ea read lat - cycles: L2-EA Read Latency (Cycles) - ea write lat - cycles: L2-EA Write Latency (Cycles) - ea atomic lat - cycles: L2-EA Atomic Latency (Cycles) - ea read stall - io: L2-EA Read Stall - IO (Cycles per) - ea read stall - gmi: L2-EA Read Stall - GMI (Cycles per) - ea read stall - dram: L2-EA Read Stall - DRAM (Cycles per) - ea write stall - io: L2-EA Write Stall - IO (Cycles per) - ea write stall - gmi: L2-EA Write Stall - GMI (Cycles per) - ea write stall - dram: L2-EA Write Stall - DRAM (Cycles per) - ea write stall - starve: L2-EA Write Stall - Starve (Cycles per) - tips: Tips - metric: - "0": - hit rate: - AVG((((100 * TCC_HIT[0]) / (TCC_HIT[0] + TCC_MISS[0])) if ((TCC_HIT[0] - + TCC_MISS[0]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[0]) / $denom)) - read req: AVG((TO_INT(TCC_READ[0]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[0]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[0]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[0]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[0]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[0]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[0] / TCC_EA_RDREQ[0]) if (TCC_EA_RDREQ[0] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[0] / TCC_EA_WRREQ[0]) if (TCC_EA_WRREQ[0] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[0] / TCC_EA_ATOMIC[0]) if - (TCC_EA_ATOMIC[0] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) / $denom)) - tips: - "1": - hit rate: - AVG((((100 * TCC_HIT[1]) / (TCC_HIT[1] + TCC_MISS[1])) if ((TCC_HIT[1] - + TCC_MISS[1]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[1]) / $denom)) - read req: AVG((TO_INT(TCC_READ[1]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[1]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[1]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[1]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[1]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[1]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[1] / TCC_EA_RDREQ[1]) if (TCC_EA_RDREQ[1] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[1] / TCC_EA_WRREQ[1]) if (TCC_EA_WRREQ[1] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[1] / TCC_EA_ATOMIC[1]) if - (TCC_EA_ATOMIC[1] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1]) / $denom)) - tips: - "2": - hit rate: - AVG((((100 * TCC_HIT[2]) / (TCC_HIT[2] + TCC_MISS[2])) if ((TCC_HIT[2] - + TCC_MISS[2]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[2]) / $denom)) - read req: AVG((TO_INT(TCC_READ[2]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[2]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[2]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[2]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[2]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[2]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[2] / TCC_EA_RDREQ[2]) if (TCC_EA_RDREQ[2] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[2] / TCC_EA_WRREQ[2]) if (TCC_EA_WRREQ[2] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[2] / TCC_EA_ATOMIC[2]) if - (TCC_EA_ATOMIC[2] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2]) / $denom)) - tips: - "3": - hit rate: - AVG((((100 * TCC_HIT[3]) / (TCC_HIT[3] + TCC_MISS[3])) if ((TCC_HIT[3] - + TCC_MISS[3]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[3]) / $denom)) - read req: AVG((TO_INT(TCC_READ[3]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[3]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[3]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[3]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[3]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[3]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[3] / TCC_EA_RDREQ[3]) if (TCC_EA_RDREQ[3] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[3] / TCC_EA_WRREQ[3]) if (TCC_EA_WRREQ[3] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[3] / TCC_EA_ATOMIC[3]) if - (TCC_EA_ATOMIC[3] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3]) / $denom)) - tips: - "4": - hit rate: - AVG((((100 * TCC_HIT[4]) / (TCC_HIT[4] + TCC_MISS[4])) if ((TCC_HIT[4] - + TCC_MISS[4]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[4]) / $denom)) - read req: AVG((TO_INT(TCC_READ[4]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[4]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[4]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[4]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[4]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[4]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[4] / TCC_EA_RDREQ[4]) if (TCC_EA_RDREQ[4] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[4] / TCC_EA_WRREQ[4]) if (TCC_EA_WRREQ[4] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[4] / TCC_EA_ATOMIC[4]) if - (TCC_EA_ATOMIC[4] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4]) / $denom)) - tips: - "5": - hit rate: - AVG((((100 * TCC_HIT[5]) / (TCC_HIT[5] + TCC_MISS[5])) if ((TCC_HIT[5] - + TCC_MISS[5]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[5]) / $denom)) - read req: AVG((TO_INT(TCC_READ[5]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[5]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[5]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[5]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[5]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[5]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[5] / TCC_EA_RDREQ[5]) if (TCC_EA_RDREQ[5] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[5] / TCC_EA_WRREQ[5]) if (TCC_EA_WRREQ[5] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[5] / TCC_EA_ATOMIC[5]) if - (TCC_EA_ATOMIC[5] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5]) / $denom)) - tips: - "6": - hit rate: - AVG((((100 * TCC_HIT[6]) / (TCC_HIT[6] + TCC_MISS[6])) if ((TCC_HIT[6] - + TCC_MISS[6]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[6]) / $denom)) - read req: AVG((TO_INT(TCC_READ[6]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[6]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[6]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[6]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[6]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[6]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[6] / TCC_EA_RDREQ[6]) if (TCC_EA_RDREQ[6] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[6] / TCC_EA_WRREQ[6]) if (TCC_EA_WRREQ[6] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[6] / TCC_EA_ATOMIC[6]) if - (TCC_EA_ATOMIC[6] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6]) / $denom)) - tips: - "7": - hit rate: - AVG((((100 * TCC_HIT[7]) / (TCC_HIT[7] + TCC_MISS[7])) if ((TCC_HIT[7] - + TCC_MISS[7]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[7]) / $denom)) - read req: AVG((TO_INT(TCC_READ[7]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[7]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[7]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[7]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[7]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[7]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[7] / TCC_EA_RDREQ[7]) if (TCC_EA_RDREQ[7] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[7] / TCC_EA_WRREQ[7]) if (TCC_EA_WRREQ[7] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[7] / TCC_EA_ATOMIC[7]) if - (TCC_EA_ATOMIC[7] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7]) / $denom)) - tips: - "8": - hit rate: - AVG((((100 * TCC_HIT[8]) / (TCC_HIT[8] + TCC_MISS[8])) if ((TCC_HIT[8] - + TCC_MISS[8]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[8]) / $denom)) - read req: AVG((TO_INT(TCC_READ[8]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[8]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[8]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[8]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[8]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[8]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[8] / TCC_EA_RDREQ[8]) if (TCC_EA_RDREQ[8] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[8] / TCC_EA_WRREQ[8]) if (TCC_EA_WRREQ[8] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[8] / TCC_EA_ATOMIC[8]) if - (TCC_EA_ATOMIC[8] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8]) / $denom)) - tips: - "9": - hit rate: - AVG((((100 * TCC_HIT[9]) / (TCC_HIT[9] + TCC_MISS[9])) if ((TCC_HIT[9] - + TCC_MISS[9]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[9]) / $denom)) - read req: AVG((TO_INT(TCC_READ[9]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[9]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[9]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[9]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[9]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[9]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[9] / TCC_EA_RDREQ[9]) if (TCC_EA_RDREQ[9] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[9] / TCC_EA_WRREQ[9]) if (TCC_EA_WRREQ[9] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[9] / TCC_EA_ATOMIC[9]) if - (TCC_EA_ATOMIC[9] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9]) / $denom)) - tips: - "10": - hit rate: - AVG((((100 * TCC_HIT[10]) / (TCC_HIT[10] + TCC_MISS[10])) if ((TCC_HIT[10] - + TCC_MISS[10]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[10]) / $denom)) - read req: AVG((TO_INT(TCC_READ[10]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[10]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[10]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[10]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[10]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[10]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[10] / TCC_EA_RDREQ[10]) if (TCC_EA_RDREQ[10] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[10] / TCC_EA_WRREQ[10]) if (TCC_EA_WRREQ[10] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[10] / TCC_EA_ATOMIC[10]) if - (TCC_EA_ATOMIC[10] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10]) / $denom)) - tips: - "11": - hit rate: - AVG((((100 * TCC_HIT[11]) / (TCC_HIT[11] + TCC_MISS[11])) if ((TCC_HIT[11] - + TCC_MISS[11]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[11]) / $denom)) - read req: AVG((TO_INT(TCC_READ[11]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[11]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[11]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[11]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[11]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[11]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[11] / TCC_EA_RDREQ[11]) if (TCC_EA_RDREQ[11] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[11] / TCC_EA_WRREQ[11]) if (TCC_EA_WRREQ[11] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[11] / TCC_EA_ATOMIC[11]) if - (TCC_EA_ATOMIC[11] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11]) / $denom)) - tips: - "12": - hit rate: - AVG((((100 * TCC_HIT[12]) / (TCC_HIT[12] + TCC_MISS[12])) if ((TCC_HIT[12] - + TCC_MISS[12]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[12]) / $denom)) - read req: AVG((TO_INT(TCC_READ[12]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[12]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[12]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[12]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[12]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[12]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[12] / TCC_EA_RDREQ[12]) if (TCC_EA_RDREQ[12] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[12] / TCC_EA_WRREQ[12]) if (TCC_EA_WRREQ[12] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[12] / TCC_EA_ATOMIC[12]) if - (TCC_EA_ATOMIC[12] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12]) / $denom)) - tips: - "13": - hit rate: - AVG((((100 * TCC_HIT[13]) / (TCC_HIT[13] + TCC_MISS[13])) if ((TCC_HIT[13] - + TCC_MISS[13]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[13]) / $denom)) - read req: AVG((TO_INT(TCC_READ[13]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[13]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[13]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[13]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[13]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[13]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[13] / TCC_EA_RDREQ[13]) if (TCC_EA_RDREQ[13] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[13] / TCC_EA_WRREQ[13]) if (TCC_EA_WRREQ[13] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[13] / TCC_EA_ATOMIC[13]) if - (TCC_EA_ATOMIC[13] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13]) / $denom)) - tips: - "14": - hit rate: - AVG((((100 * TCC_HIT[14]) / (TCC_HIT[14] + TCC_MISS[14])) if ((TCC_HIT[14] - + TCC_MISS[14]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[14]) / $denom)) - read req: AVG((TO_INT(TCC_READ[14]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[14]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[14]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[14]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[14]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[14]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[14] / TCC_EA_RDREQ[14]) if (TCC_EA_RDREQ[14] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[14] / TCC_EA_WRREQ[14]) if (TCC_EA_WRREQ[14] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[14] / TCC_EA_ATOMIC[14]) if - (TCC_EA_ATOMIC[14] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14]) / $denom)) - tips: - "15": - hit rate: - AVG((((100 * TCC_HIT[15]) / (TCC_HIT[15] + TCC_MISS[15])) if ((TCC_HIT[15] - + TCC_MISS[15]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[15]) / $denom)) - read req: AVG((TO_INT(TCC_READ[15]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[15]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[15]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[15]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[15]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[15]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[15] / TCC_EA_RDREQ[15]) if (TCC_EA_RDREQ[15] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[15] / TCC_EA_WRREQ[15]) if (TCC_EA_WRREQ[15] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[15] / TCC_EA_ATOMIC[15]) if - (TCC_EA_ATOMIC[15] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15]) / $denom)) - tips: - - - metric_table: - id: 1803 - title: Channel 16-31 - columnwise: True - header: - channel: Channel - hit rate: L2 Cache Hit Rate (%) - req: Requests (Requests) - read req: L1-L2 Read (Requests) - write req: L1-L2 Write (Requests) - atomic req: L1-L2 Atomic (Requests) - ea read req: L2-EA Read (Requests) - ea write req: L2-EA Write (Requests) - ea atomic req: L2-EA Atomic (Requests) - ea read lat - cycles: L2-EA Read Latency (Cycles) - ea write lat - cycles: L2-EA Write Latency (Cycles) - ea atomic lat - cycles: L2-EA Atomic Latency (Cycles) - ea read stall - io: L2-EA Read Stall - IO (Cycles per) - ea read stall - gmi: L2-EA Read Stall - GMI (Cycles per) - ea read stall - dram: L2-EA Read Stall - DRAM (Cycles per) - ea write stall - io: L2-EA Write Stall - IO (Cycles per) - ea write stall - gmi: L2-EA Write Stall - GMI (Cycles per) - ea write stall - dram: L2-EA Write Stall - DRAM (Cycles per) - ea write stall - starve: L2-EA Write Stall - Starve (Cycles per) - tips: Tips - metric: - "16": - hit rate: - AVG((((100 * TCC_HIT[16]) / (TCC_HIT[16] + TCC_MISS[16])) if ((TCC_HIT[16] - + TCC_MISS[16]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[16]) / $denom)) - read req: AVG((TO_INT(TCC_READ[16]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[16]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[16]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[16]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[16]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[16]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[16] / TCC_EA_RDREQ[16]) if (TCC_EA_RDREQ[16] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[16] / TCC_EA_WRREQ[16]) if (TCC_EA_WRREQ[16] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[16] / TCC_EA_ATOMIC[16]) if - (TCC_EA_ATOMIC[16] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16]) / $denom)) - tips: - "17": - hit rate: - AVG((((100 * TCC_HIT[17]) / (TCC_HIT[17] + TCC_MISS[17])) if ((TCC_HIT[17] - + TCC_MISS[17]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[17]) / $denom)) - read req: AVG((TO_INT(TCC_READ[17]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[17]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[17]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[17]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[17]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[17]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[17] / TCC_EA_RDREQ[17]) if (TCC_EA_RDREQ[17] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[17] / TCC_EA_WRREQ[17]) if (TCC_EA_WRREQ[17] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[17] / TCC_EA_ATOMIC[17]) if - (TCC_EA_ATOMIC[17] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17]) / $denom)) - tips: - "18": - hit rate: - AVG((((100 * TCC_HIT[18]) / (TCC_HIT[18] + TCC_MISS[18])) if ((TCC_HIT[18] - + TCC_MISS[18]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[18]) / $denom)) - read req: AVG((TO_INT(TCC_READ[18]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[18]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[18]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[18]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[18]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[18]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[18] / TCC_EA_RDREQ[18]) if (TCC_EA_RDREQ[18] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[18] / TCC_EA_WRREQ[18]) if (TCC_EA_WRREQ[18] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[18] / TCC_EA_ATOMIC[18]) if - (TCC_EA_ATOMIC[18] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18]) / $denom)) - tips: - "19": - hit rate: - AVG((((100 * TCC_HIT[19]) / (TCC_HIT[19] + TCC_MISS[19])) if ((TCC_HIT[19] - + TCC_MISS[19]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[19]) / $denom)) - read req: AVG((TO_INT(TCC_READ[19]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[19]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[19]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[19]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[19]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[19]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[19] / TCC_EA_RDREQ[19]) if (TCC_EA_RDREQ[19] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[19] / TCC_EA_WRREQ[19]) if (TCC_EA_WRREQ[19] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[19] / TCC_EA_ATOMIC[19]) if - (TCC_EA_ATOMIC[19] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19]) / $denom)) - tips: - "20": - hit rate: - AVG((((100 * TCC_HIT[20]) / (TCC_HIT[20] + TCC_MISS[20])) if ((TCC_HIT[20] - + TCC_MISS[20]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[20]) / $denom)) - read req: AVG((TO_INT(TCC_READ[20]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[20]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[20]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[20]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[20]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[20]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[20] / TCC_EA_RDREQ[20]) if (TCC_EA_RDREQ[20] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[20] / TCC_EA_WRREQ[20]) if (TCC_EA_WRREQ[20] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[20] / TCC_EA_ATOMIC[20]) if - (TCC_EA_ATOMIC[20] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20]) / $denom)) - tips: - "21": - hit rate: - AVG((((100 * TCC_HIT[21]) / (TCC_HIT[21] + TCC_MISS[21])) if ((TCC_HIT[21] - + TCC_MISS[21]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[21]) / $denom)) - read req: AVG((TO_INT(TCC_READ[21]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[21]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[21]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[21]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[21]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[21]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[21] / TCC_EA_RDREQ[21]) if (TCC_EA_RDREQ[21] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[21] / TCC_EA_WRREQ[21]) if (TCC_EA_WRREQ[21] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[21] / TCC_EA_ATOMIC[21]) if - (TCC_EA_ATOMIC[21] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21]) / $denom)) - tips: - "22": - hit rate: - AVG((((100 * TCC_HIT[22]) / (TCC_HIT[22] + TCC_MISS[22])) if ((TCC_HIT[22] - + TCC_MISS[22]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[22]) / $denom)) - read req: AVG((TO_INT(TCC_READ[22]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[22]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[22]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[22]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[22]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[22]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[22] / TCC_EA_RDREQ[22]) if (TCC_EA_RDREQ[22] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[22] / TCC_EA_WRREQ[22]) if (TCC_EA_WRREQ[22] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[22] / TCC_EA_ATOMIC[22]) if - (TCC_EA_ATOMIC[22] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22]) / $denom)) - tips: - "23": - hit rate: - AVG((((100 * TCC_HIT[23]) / (TCC_HIT[23] + TCC_MISS[23])) if ((TCC_HIT[23] - + TCC_MISS[23]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[23]) / $denom)) - read req: AVG((TO_INT(TCC_READ[23]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[23]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[23]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[23]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[23]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[23]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[23] / TCC_EA_RDREQ[23]) if (TCC_EA_RDREQ[23] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[23] / TCC_EA_WRREQ[23]) if (TCC_EA_WRREQ[23] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[23] / TCC_EA_ATOMIC[23]) if - (TCC_EA_ATOMIC[23] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23]) / $denom)) - tips: - "24": - hit rate: - AVG((((100 * TCC_HIT[24]) / (TCC_HIT[24] + TCC_MISS[24])) if ((TCC_HIT[24] - + TCC_MISS[24]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[24]) / $denom)) - read req: AVG((TO_INT(TCC_READ[24]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[24]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[24]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[24]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[24]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[24]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[24] / TCC_EA_RDREQ[24]) if (TCC_EA_RDREQ[24] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[24] / TCC_EA_WRREQ[24]) if (TCC_EA_WRREQ[24] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[24] / TCC_EA_ATOMIC[24]) if - (TCC_EA_ATOMIC[24] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24]) / $denom)) - tips: - "25": - hit rate: - AVG((((100 * TCC_HIT[25]) / (TCC_HIT[25] + TCC_MISS[25])) if ((TCC_HIT[25] - + TCC_MISS[25]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[25]) / $denom)) - read req: AVG((TO_INT(TCC_READ[25]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[25]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[25]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[25]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[25]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[25]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[25] / TCC_EA_RDREQ[25]) if (TCC_EA_RDREQ[25] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[25] / TCC_EA_WRREQ[25]) if (TCC_EA_WRREQ[25] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[25] / TCC_EA_ATOMIC[25]) if - (TCC_EA_ATOMIC[25] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25]) / $denom)) - tips: - "26": - hit rate: - AVG((((100 * TCC_HIT[26]) / (TCC_HIT[26] + TCC_MISS[26])) if ((TCC_HIT[26] - + TCC_MISS[26]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[26]) / $denom)) - read req: AVG((TO_INT(TCC_READ[26]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[26]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[26]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[26]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[26]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[26]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[26] / TCC_EA_RDREQ[26]) if (TCC_EA_RDREQ[26] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[26] / TCC_EA_WRREQ[26]) if (TCC_EA_WRREQ[26] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[26] / TCC_EA_ATOMIC[26]) if - (TCC_EA_ATOMIC[26] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26]) / $denom)) - tips: - "27": - hit rate: - AVG((((100 * TCC_HIT[27]) / (TCC_HIT[27] + TCC_MISS[27])) if ((TCC_HIT[27] - + TCC_MISS[27]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[27]) / $denom)) - read req: AVG((TO_INT(TCC_READ[27]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[27]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[27]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[27]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[27]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[27]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[27] / TCC_EA_RDREQ[27]) if (TCC_EA_RDREQ[27] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[27] / TCC_EA_WRREQ[27]) if (TCC_EA_WRREQ[27] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[27] / TCC_EA_ATOMIC[27]) if - (TCC_EA_ATOMIC[27] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27]) / $denom)) - tips: - "28": - hit rate: - AVG((((100 * TCC_HIT[28]) / (TCC_HIT[28] + TCC_MISS[28])) if ((TCC_HIT[28] - + TCC_MISS[28]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[28]) / $denom)) - read req: AVG((TO_INT(TCC_READ[28]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[28]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[28]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[28]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[28]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[28]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[28] / TCC_EA_RDREQ[28]) if (TCC_EA_RDREQ[28] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[28] / TCC_EA_WRREQ[28]) if (TCC_EA_WRREQ[28] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[28] / TCC_EA_ATOMIC[28]) if - (TCC_EA_ATOMIC[28] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28]) / $denom)) - tips: - "29": - hit rate: - AVG((((100 * TCC_HIT[29]) / (TCC_HIT[29] + TCC_MISS[29])) if ((TCC_HIT[29] - + TCC_MISS[29]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[29]) / $denom)) - read req: AVG((TO_INT(TCC_READ[29]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[29]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[29]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[29]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[29]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[29]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[29] / TCC_EA_RDREQ[29]) if (TCC_EA_RDREQ[29] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[29] / TCC_EA_WRREQ[29]) if (TCC_EA_WRREQ[29] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[29] / TCC_EA_ATOMIC[29]) if - (TCC_EA_ATOMIC[29] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29]) / $denom)) - tips: - "30": - hit rate: - AVG((((100 * TCC_HIT[30]) / (TCC_HIT[30] + TCC_MISS[30])) if ((TCC_HIT[30] - + TCC_MISS[30]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[30]) / $denom)) - read req: AVG((TO_INT(TCC_READ[30]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[30]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[30]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[30]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[30]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[30]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[30] / TCC_EA_RDREQ[30]) if (TCC_EA_RDREQ[30] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[30] / TCC_EA_WRREQ[30]) if (TCC_EA_WRREQ[30] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[30] / TCC_EA_ATOMIC[30]) if - (TCC_EA_ATOMIC[30] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30]) / $denom)) - tips: - "31": - hit rate: - AVG((((100 * TCC_HIT[31]) / (TCC_HIT[31] + TCC_MISS[31])) if ((TCC_HIT[31] - + TCC_MISS[31]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[31]) / $denom)) - read req: AVG((TO_INT(TCC_READ[31]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[31]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[31]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[31]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[31]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[31]) / $denom)) - ea read lat - cycles: - AVG(((TCC_EA_RDREQ_LEVEL[31] / TCC_EA_RDREQ[31]) if (TCC_EA_RDREQ[31] - != 0) else None)) - ea write lat - cycles: - AVG(((TCC_EA_WRREQ_LEVEL[31] / TCC_EA_WRREQ[31]) if (TCC_EA_WRREQ[31] - != 0) else None)) - ea atomic lat - cycles: - AVG(((TCC_EA_ATOMIC_LEVEL[31] / TCC_EA_ATOMIC[31]) if - (TCC_EA_ATOMIC[31] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31]) / $denom)) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/1900_memory_chart.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/1900_memory_chart.yaml deleted file mode 100644 index 3728934e2b..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/1900_memory_chart.yaml +++ /dev/null @@ -1,259 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1900 - title: Memory Chart Analysis - data source: - - metric_table: - id: 1901 - title: # subtitle for this table(optional) - header: - metric: Metric - value: Value - alias: Alias - tips: Tips - metric: - Wave Life: - value: ROUND(AVG(((4 * (SQ_WAVE_CYCLES / SQ_WAVES)) if (SQ_WAVES != 0) else - None)), 0) - alias: wave_life_ - tips: - Active CUs: - value: CONCAT(CONCAT($numActiveCUs, "/"), $numCU) - alias: active_cu_ - tips: - SALU: - value: ROUND(AVG((SQ_INSTS_SALU / $denom)), 0) - alias: salu_ - tips: - SMEM: - value: ROUND(AVG((SQ_INSTS_SMEM / $denom)), 0) - alias: smem_ - tips: - VALU: - value: ROUND(AVG((SQ_INSTS_VALU / $denom)), 0) - alias: valu_ - tips: - MFMA: - value: None # No perf counter - alias: mfma_ - tips: - VMEM: - value: ROUND(AVG((SQ_INSTS_VMEM / $denom)), 0) - alias: vmem_ - tips: - LDS: - value: ROUND(AVG((SQ_INSTS_LDS / $denom)), 0) - alias: lds_ - tips: - GWS: - value: ROUND(AVG((SQ_INSTS_GDS / $denom)), 0) - alias: gws_ - tips: - BR: - value: ROUND(AVG((SQ_INSTS_BRANCH / $denom)), 0) - alias: br_ - tips: - VGPR: - value: ROUND(AVG(vgpr), 0) - alias: vgpr_ - tips: - SGPR: - value: ROUND(AVG(sgpr), 0) - alias: sgpr_ - tips: - LDS Allocation: - value: ROUND(AVG(lds), 0) - alias: lds_alloc_ - tips: - Scratch Allocation: - value: ROUND(AVG(scr), 0) - alias: scratch_alloc_ - tips: - Wavefronts: - value: ROUND(AVG(SPI_CSN_WAVE), 0) - alias: wavefronts_ - tips: - Workgroups: - value: ROUND(AVG(SPI_CSN_NUM_THREADGROUPS), 0) - alias: workgroups_ - tips: - LDS Req: - value: ROUND(AVG((SQ_INSTS_LDS / $denom)), 0) - alias: lds_req_ - tips: - IL1 Fetch: - value: ROUND(AVG((SQC_ICACHE_REQ / $denom)), 0) - alias: il1_fetch_ - tips: - IL1 Hit: - value: ROUND((AVG((SQC_ICACHE_HITS / SQC_ICACHE_REQ)) * 100), 0) - alias: il1_hit_ - tips: - IL1_L2 Rd: - value: ROUND(AVG((SQC_TC_INST_REQ / $denom)), 0) - alias: il1_l2_req_ - tips: - vL1D Rd: - value: ROUND(AVG((SQC_DCACHE_REQ / $denom)), 0) - alias: sl1_rd_ - tips: - vL1D Hit: - value: ROUND((AVG(((SQC_DCACHE_HITS / SQC_DCACHE_REQ) if (SQC_DCACHE_REQ != - 0) else None)) * 100), 0) - alias: sl1_hit_ - tips: - vL1D_L2 Rd: - value: ROUND(AVG((SQC_TC_DATA_READ_REQ / $denom)), 0) - alias: sl1_l2_rd_ - tips: - vL1D_L2 Wr: - value: ROUND(AVG((SQC_TC_DATA_WRITE_REQ / $denom)), 0) - alias: sl1_l2_wr_ - tips: - vL1D_L2 Atomic: - value: ROUND(AVG((SQC_TC_DATA_ATOMIC_REQ / $denom)), 0) - alias: sl1_l2_atom_ - tips: - VL1 Rd: - value: ROUND(AVG((TCP_TOTAL_READ_sum / $denom)), 0) - alias: vl1_rd_ - tips: - VL1 Wr: - value: ROUND(AVG((TCP_TOTAL_WRITE_sum / $denom)), 0) - alias: vl1_wr_ - tips: - VL1 Atomic: - value: ROUND(AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) - / $denom)), 0) - alias: vl1_atom_ - tips: - VL1 Hit: - value: ROUND(AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)), 0) - alias: vl1_hit_ - tips: - VL1 Lat: - value: ROUND(AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum - != 0) else None)), 0) - alias: vl1_lat_ - tips: - VL1_L2 Rd: - value: ROUND(AVG((TCP_TCC_READ_REQ_sum / $denom)), 0) - alias: vl1_l2_rd_ - tips: - VL1_L2 Wr: - value: ROUND(AVG((TCP_TCC_WRITE_REQ_sum / $denom)), 0) - alias: vl1_l2_wr_ - tips: - vL1_L2 Atomic: - value: ROUND(AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - / $denom)), 0) - alias: vl1_l2_atom_ - tips: - L2 Rd: - value: ROUND(AVG((TCC_READ_sum / $denom)), 0) - alias: l2_rd_ - tips: - L2 Wr: - value: ROUND(AVG((TCC_WRITE_sum / $denom)), 0) - alias: l2_wr_ - tips: - L2 Atomic: - value: ROUND(AVG((TCC_ATOMIC_sum / $denom)), 0) - alias: l2_atom_ - tips: - L2 Hit: - value: ROUND(AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)), 0) - alias: l2_hit_ - tips: - L2 Rd Lat: - value: ROUND(AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) - if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)), - 0) - alias: l2_rd_lat_ - tips: - L2 Wr Lat: - value: ROUND(AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + - TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - != 0) else None)), 0) - alias: l2_wr_lat_ - tips: - Fabric Rd Lat: - value: ROUND(AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum - != 0) else None)), 0) - alias: fabric_rd_lat_ - tips: - Fabric Wr Lat: - value: ROUND(AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum - != 0) else None)), 0) - alias: fabric_wr_lat_ - tips: - Fabric Atomic Lat: - value: ROUND(AVG(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum - != 0) else None)), 0) - alias: fabric_atom_lat_ - tips: - Fabric_L2 Rd: - value: ROUND(AVG((TCC_EA_RDREQ_sum / $denom)), 0) - alias: l2_fabric_rd_ - tips: - Fabric_L2 Wr: - value: ROUND(AVG((TCC_EA_WRREQ_sum / $denom)), 0) - alias: l2_fabric_wr_ - tips: - Fabric_l2 Atomic: - value: ROUND(AVG((TCC_EA_ATOMIC_sum / $denom)), 0) - alias: l2_fabric_atom_ - tips: - HBM Rd: - value: ROUND(AVG((TCC_EA_RDREQ_DRAM_sum / $denom)), 0) - alias: hbm_rd_ - tips: - HBM Wr: - value: ROUND(AVG((TCC_EA_WRREQ_DRAM_sum / $denom)), 0) - alias: hbm_wr_ - tips: - LDS Util: - value: ROUND(AVG(((100 * SQ_LDS_IDX_ACTIVE) / (GRBM_GUI_ACTIVE * $numCU))), - 0) - alias: lds_util_ - tips: - VL1 Coalesce: - value: ROUND(AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum - * 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else 0)), 0) - alias: vl1_coales_ - tips: - VL1 Stall: - value: ROUND(AVG((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)), 0) - alias: vl1_stall_ - tips: - LDS Lat: - value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) - if (SQ_INSTS_LDS != 0) else None)), 0) - alias: lds_lat_ - coll_level: SQ_INST_LEVEL_LDS - tips: - vL1D Lat: - value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQC_DCACHE_REQ) - if (SQC_DCACHE_REQ != 0) else None)), 0) - alias: sl1_lat_ - tips: - IL1 Lat: - value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQC_ICACHE_REQ) - if (SQC_ICACHE_REQ != 0) else None)), 0) - alias: il1_lat_ - tips: - Wave Occupancy: - value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE) / $numActiveCUs)), 0) - alias: wave_occ_ - coll_level: SQ_LEVEL_WAVES - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx908/2000_kernels.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx908/2000_kernels.yaml deleted file mode 100644 index ed566f75a2..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx908/2000_kernels.yaml +++ /dev/null @@ -1,8 +0,0 @@ ---- -Panel Config: - id: 2000 - title: Kernels - data source: - - raw_csv_table: - id: 2001 - source: pmc_dispatch_info.csv diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/0000_top_stat.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/0000_top_stat.yaml deleted file mode 100644 index 077004080f..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/0000_top_stat.yaml +++ /dev/null @@ -1,8 +0,0 @@ ---- -Panel Config: - id: 000 - title: Top Stat - data source: - - raw_csv_table: - id: 001 - source: pmc_kernel_top.csv diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/0100_system_info.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/0100_system_info.yaml deleted file mode 100644 index b7ec29eaf9..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/0100_system_info.yaml +++ /dev/null @@ -1,9 +0,0 @@ ---- -Panel Config: - id: 100 - title: System Info - data source: - - raw_csv_table: - id: 101 - source: sysinfo.csv - columnwise: True diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/0200_system-speed-of-light.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/0200_system-speed-of-light.yaml deleted file mode 100644 index c197c0fc58..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/0200_system-speed-of-light.yaml +++ /dev/null @@ -1,247 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - SALU: &SALU_anchor Scalar Arithmetic Logic Unit - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 200 - title: System Speed-of-Light - data source: - - metric_table: - id: 201 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - peak: Peak - pop: PoP - tips: Tips - metric: - VALU FLOPs: - value: AVG(((((64 * (((SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16) + SQ_INSTS_VALU_TRANS_F16) - + (2 * SQ_INSTS_VALU_FMA_F16))) + (64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) - + SQ_INSTS_VALU_TRANS_F32) + (2 * SQ_INSTS_VALU_FMA_F32)))) + (64 * (((SQ_INSTS_VALU_ADD_F64 - + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) + (2 * SQ_INSTS_VALU_FMA_F64)))) - / (EndNs - BeginNs))) - unit: GFLOP - peak: (((($sclk * $numCU) * 64) * 2) / 1000) - pop: ((100 * AVG(((((64 * (((SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16) - + SQ_INSTS_VALU_TRANS_F16) + (2 * SQ_INSTS_VALU_FMA_F16))) + (64 * (((SQ_INSTS_VALU_ADD_F32 - + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32) + (2 * SQ_INSTS_VALU_FMA_F32)))) - + (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) - + (2 * SQ_INSTS_VALU_FMA_F64)))) / (EndNs - BeginNs)))) / (((($sclk - * $numCU) * 64) * 2) / 1000)) - tips: - VALU IOPs: - value: AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (EndNs - BeginNs))) - unit: GIOP - peak: (((($sclk * $numCU) * 64) * 2) / 1000) - pop: ((100 * AVG(((64 * (SQ_INSTS_VALU_INT32 + SQ_INSTS_VALU_INT64)) / (EndNs - - BeginNs)))) / (((($sclk * $numCU) * 64) * 2) / 1000)) - tips: - MFMA FLOPs (BF16): - value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (EndNs - BeginNs))) - unit: GFLOP - peak: ((($sclk * $numCU) * 1024) / 1000) - pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (EndNs - BeginNs)))) - / ((($sclk * $numCU) * 1024) / 1000)) - tips: - MFMA FLOPs (F16): - value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (EndNs - BeginNs))) - unit: GFLOP - peak: ((($sclk * $numCU) * 1024) / 1000) - pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (EndNs - BeginNs)))) - / ((($sclk * $numCU) * 1024) / 1000)) - tips: - MFMA FLOPs (F32): - value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (EndNs - BeginNs))) - unit: GFLOP - peak: ((($sclk * $numCU) * 256) / 1000) - pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (EndNs - BeginNs)))) - / ((($sclk * $numCU) * 256) / 1000)) - tips: - MFMA FLOPs (F64): - value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (EndNs - BeginNs))) - unit: GFLOP - peak: ((($sclk * $numCU) * 256) / 1000) - pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (EndNs - BeginNs)))) - / ((($sclk * $numCU) * 256) / 1000)) - tips: - MFMA IOPs (Int8): - value: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (EndNs - BeginNs))) - unit: GIOP - peak: ((($sclk * $numCU) * 1024) / 1000) - pop: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (EndNs - BeginNs)))) - / ((($sclk * $numCU) * 1024) / 1000)) - tips: - Active CUs: - value: $numActiveCUs - unit: CUs - peak: $numCU - pop: ((100 * $numActiveCUs) / $numCU) - tips: - SALU Util: - value: AVG(((100 * SQ_ACTIVE_INST_SCA) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - peak: 100 - pop: AVG(((100 * SQ_ACTIVE_INST_SCA) / (GRBM_GUI_ACTIVE * $numCU))) - tips: - VALU Util: - value: AVG(((100 * SQ_ACTIVE_INST_VALU) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - peak: 100 - pop: AVG(((100 * SQ_ACTIVE_INST_VALU) / (GRBM_GUI_ACTIVE * $numCU))) - tips: - MFMA Util: - value: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((GRBM_GUI_ACTIVE * $numCU) - * 4))) - unit: pct - peak: 100 - pop: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((GRBM_GUI_ACTIVE * $numCU) - * 4))) - tips: - VALU Active Threads/Wave: - value: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) - unit: Threads - peak: 64 - pop: (AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) * 1.5625) - tips: - IPC - Issue: - value: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY)) - unit: Instr/cycle - peak: 5 - pop: ((100 * AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY))) / 5) - tips: - LDS BW: - value: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / (EndNs - BeginNs))) - unit: GB/sec - peak: (($sclk * $numCU) * 0.128) - pop: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / (EndNs - BeginNs)) / (($sclk * $numCU) * 0.00128))) - tips: - LDS Bank Conflict: - value: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - unit: Conflicts/access - peak: 32 - pop: ((100 * AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None))) / 32) - tips: - Instr Cache Hit Rate: - value: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES))) - unit: pct - peak: 100 - pop: AVG(((100 * SQC_ICACHE_HITS) / (SQC_ICACHE_HITS + SQC_ICACHE_MISSES))) - tips: - Instr Cache BW: - value: AVG(((SQC_ICACHE_REQ / (EndNs - BeginNs)) * 64)) - unit: GB/s - peak: ((($sclk / 1000) * 64) * $numSQC) - pop: ((100 * AVG(((SQC_ICACHE_REQ / (EndNs - BeginNs)) * 64))) / ((($sclk - / 1000) * 64) * $numSQC)) - tips: - Scalar L1D Cache Hit Rate: - value: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES)) - if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None)) - unit: pct - peak: 100 - pop: AVG((((100 * SQC_DCACHE_HITS) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES)) - if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) != 0) else None)) - tips: - Scalar L1D Cache BW: - value: AVG(((SQC_DCACHE_REQ / (EndNs - BeginNs)) * 64)) - unit: GB/s - peak: ((($sclk / 1000) * 64) * $numSQC) - pop: ((100 * AVG(((SQC_DCACHE_REQ / (EndNs - BeginNs)) * 64))) / ((($sclk - / 1000) * 64) * $numSQC)) - tips: - Vector L1D Cache Hit Rate: - value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - unit: pct - peak: 100 - pop: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + - TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / - TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - tips: - Vector L1D Cache BW: - value: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) - unit: GB/s - peak: ((($sclk / 1000) * 64) * $numCU) - pop: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs)))) - / ((($sclk / 1000) * 64) * $numCU)) - tips: - L2 Cache Hit Rate: - value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - unit: pct - peak: 100 - pop: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - tips: - L2-Fabric Read BW: - value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / (EndNs - BeginNs))) - unit: GB/s - peak: $hbmBW - pop: ((100 * AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / (EndNs - BeginNs)))) / $hbmBW) - tips: - L2-Fabric Write BW: - value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / (EndNs - BeginNs))) - unit: GB/s - peak: $hbmBW - pop: ((100 * AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / (EndNs - BeginNs)))) / $hbmBW) - tips: - L2-Fabric Read Latency: - value: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum - != 0) else None)) - unit: Cycles - peak: '' - pop: '' - tips: - L2-Fabric Write Latency: - value: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum - != 0) else None)) - unit: Cycles - peak: '' - pop: '' - tips: - Wave Occupancy: - value: AVG((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) - unit: Wavefronts - peak: ($maxWavesPerCU * $numCU) - pop: (100 * AVG(((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE) / ($maxWavesPerCU - * $numCU)))) - coll_level: SQ_LEVEL_WAVES - tips: - Instr Fetch BW: - value: AVG(((SQ_IFETCH / (EndNs - BeginNs)) * 32)) - unit: GB/s - peak: ((($sclk / 1000) * 32) * $numSQC) - pop: ((100 * AVG(((SQ_IFETCH / (EndNs - BeginNs)) * 32))) / ($numSQC - * (($sclk / 1000) * 32))) - coll_level: SQ_IFETCH_LEVEL - tips: - Instr Fetch Latency: - value: AVG((SQ_ACCUM_PREV_HIRES / SQ_IFETCH)) - unit: Cycles - peak: '' - pop: '' - coll_level: SQ_IFETCH_LEVEL - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/0500_command-processor.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/0500_command-processor.yaml deleted file mode 100644 index d954f61625..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/0500_command-processor.yaml +++ /dev/null @@ -1,180 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 500 - title: Command Processor (CPC/CPF) - data source: - - metric_table: - id: 501 - title: Command Processor Fetcher - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - GPU Busy Cycles: - avg: AVG(GRBM_GUI_ACTIVE) - min: MIN(GRBM_GUI_ACTIVE) - max: MAX(GRBM_GUI_ACTIVE) - unit: Cycles/Kernel - tips: - CPF Busy: - avg: AVG(CPF_CPF_STAT_BUSY) - min: MIN(CPF_CPF_STAT_BUSY) - max: MAX(CPF_CPF_STAT_BUSY) - unit: Cycles/Kernel - tips: - CPF Util: - avg: AVG((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) - if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) - min: MIN((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) - if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) - max: MAX((((100 * CPF_CPF_STAT_BUSY) / (CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE)) - if ((CPF_CPF_STAT_BUSY + CPF_CPF_STAT_IDLE) != 0) else None)) - unit: pct - tips: - CPF Stall: - avg: AVG((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY - != 0) else None)) - min: MIN((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY - != 0) else None)) - max: MAX((((100 * CPF_CPF_STAT_STALL) / CPF_CPF_STAT_BUSY) if (CPF_CPF_STAT_BUSY - != 0) else None)) - unit: Cycles/Kernel - tips: - L2Cache Intf Busy: - avg: AVG(CPF_CPF_TCIU_BUSY) - min: MIN(CPF_CPF_TCIU_BUSY) - max: MAX(CPF_CPF_TCIU_BUSY) - unit: Cycles/Kernel - tips: - L2Cache Intf Util: - avg: AVG((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) - if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) - min: MIN((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) - if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) - max: MAX((((100 * CPF_CPF_TCIU_BUSY) / (CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE)) - if ((CPF_CPF_TCIU_BUSY + CPF_CPF_TCIU_IDLE) != 0) else None)) - unit: pct - tips: - L2Cache Intf Stall: - avg: AVG((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY - != 0) else None)) - min: MIN((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY - != 0) else None)) - max: MAX((((100 * CPF_CPF_TCIU_STALL) / CPF_CPF_TCIU_BUSY) if (CPF_CPF_TCIU_BUSY - != 0) else None)) - unit: pct - tips: - UTCL1 Stall: - avg: AVG(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) - min: MIN(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) - max: MAX(CPF_CMP_UTCL1_STALL_ON_TRANSLATION) - unit: Cycles/Kernel - tips: - - - metric_table: - id: 502 - title: Command Processor Compute - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - GPU Busy Cycles: - avg: AVG(GRBM_GUI_ACTIVE) - min: MIN(GRBM_GUI_ACTIVE) - max: MAX(GRBM_GUI_ACTIVE) - unit: Cycles - tips: - CPC Busy Cycles: - avg: AVG(CPC_CPC_STAT_BUSY) - min: MIN(CPC_CPC_STAT_BUSY) - max: MAX(CPC_CPC_STAT_BUSY) - unit: Cycles - tips: - CPC Util: - avg: AVG((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) - if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) - min: MIN((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) - if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) - max: MAX((((100 * CPC_CPC_STAT_BUSY) / (CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE)) - if ((CPC_CPC_STAT_BUSY + CPC_CPC_STAT_IDLE) != 0) else None)) - unit: pct - tips: - CPC Stall Cycles: - avg: AVG(CPC_CPC_STAT_STALL) - min: MIN(CPC_CPC_STAT_STALL) - max: MAX(CPC_CPC_STAT_STALL) - unit: Cycles - tips: - CPC Stall Rate: - avg: AVG((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - min: MIN((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - max: MAX((((100 * CPC_CPC_STAT_STALL) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - unit: pct - tips: - CPC Packet Decoding: - avg: AVG(CPC_ME1_BUSY_FOR_PACKET_DECODE) - min: MIN(CPC_ME1_BUSY_FOR_PACKET_DECODE) - max: MAX(CPC_ME1_BUSY_FOR_PACKET_DECODE) - unit: Cycles - tips: - SPI Intf Busy Cycles: - avg: AVG(CPC_ME1_DC0_SPI_BUSY) - min: MIN(CPC_ME1_DC0_SPI_BUSY) - max: MAX(CPC_ME1_DC0_SPI_BUSY) - unit: Cycles - tips: - SPI Intf Util: - avg: AVG((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - min: MIN((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - max: MAX((((100 * CPC_ME1_DC0_SPI_BUSY) / CPC_CPC_STAT_BUSY) if (CPC_CPC_STAT_BUSY - != 0) else None)) - unit: pct - tips: - L2Cache Intf Util: - avg: AVG((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) - if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) - min: MIN((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) - if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) - max: MAX((((100 * CPC_CPC_TCIU_BUSY) / (CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE)) - if ((CPC_CPC_TCIU_BUSY + CPC_CPC_TCIU_IDLE) != 0) else None)) - unit: pct - tips: - UTCL1 Stall Cycles: - avg: AVG(CPC_UTCL1_STALL_ON_TRANSLATION) - min: MIN(CPC_UTCL1_STALL_ON_TRANSLATION) - max: MAX(CPC_UTCL1_STALL_ON_TRANSLATION) - unit: Cycles - tips: - UTCL2 Intf Busy Cycles: - avg: AVG(CPC_CPC_UTCL2IU_BUSY) - min: MIN(CPC_CPC_UTCL2IU_BUSY) - max: MAX(CPC_CPC_UTCL2IU_BUSY) - unit: Cycles - tips: - UTCL2 Intf Util: - avg: AVG((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) - if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) - min: MIN((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) - if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) - max: MAX((((100 * CPC_CPC_UTCL2IU_BUSY) / (CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE)) - if ((CPC_CPC_UTCL2IU_BUSY + CPC_CPC_UTCL2IU_IDLE) != 0) else None)) - unit: pct - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/0600_shader-processor-input.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/0600_shader-processor-input.yaml deleted file mode 100644 index bab48700ac..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/0600_shader-processor-input.yaml +++ /dev/null @@ -1,174 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 600 - title: Shader Processor Input (SPI) - data source: - - metric_table: - id: 601 - title: SPI Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - GPU Busy: - avg: AVG(GRBM_GUI_ACTIVE) - min: MIN(GRBM_GUI_ACTIVE) - max: MAX(GRBM_GUI_ACTIVE) - unit: Cycles - tips: - CS Busy: - avg: AVG(SPI_CSN_BUSY) - min: MIN(SPI_CSN_BUSY) - max: MAX(SPI_CSN_BUSY) - unit: Cycles - tips: - SPI Busy: - avg: AVG(GRBM_SPI_BUSY) - min: MIN(GRBM_SPI_BUSY) - max: MAX(GRBM_SPI_BUSY) - unit: Cycles - tips: - SQ Busy: - avg: AVG(SQ_BUSY_CYCLES) - min: MIN(SQ_BUSY_CYCLES) - max: MAX(SQ_BUSY_CYCLES) - unit: Cycles - tips: - Dispatched Workgroups: - avg: AVG(SPI_CSN_NUM_THREADGROUPS) - min: MIN(SPI_CSN_NUM_THREADGROUPS) - max: MAX(SPI_CSN_NUM_THREADGROUPS) - unit: Workgroups - tips: - Dispatched Wavefronts: - avg: AVG(SPI_CSN_WAVE) - min: MIN(SPI_CSN_WAVE) - max: MAX(SPI_CSN_WAVE) - unit: Wavefronts - tips: - Wave Alloc Failed: - avg: AVG(SPI_RA_REQ_NO_ALLOC) - min: MIN(SPI_RA_REQ_NO_ALLOC) - max: MAX(SPI_RA_REQ_NO_ALLOC) - unit: Cycles - tips: - Wave Alloc Failed - CS: - avg: AVG(SPI_RA_REQ_NO_ALLOC_CSN) - min: MIN(SPI_RA_REQ_NO_ALLOC_CSN) - max: MAX(SPI_RA_REQ_NO_ALLOC_CSN) - unit: Cycles - tips: - - - metric_table: - id: 602 - title: SPI Resource Allocation - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Wave request Failed (CS): - avg: AVG(SPI_RA_REQ_NO_ALLOC_CSN) - min: MIN(SPI_RA_REQ_NO_ALLOC_CSN) - max: MAX(SPI_RA_REQ_NO_ALLOC_CSN) - unit: Cycles - tips: - CS Stall: - avg: AVG(SPI_RA_RES_STALL_CSN) - min: MIN(SPI_RA_RES_STALL_CSN) - max: MAX(SPI_RA_RES_STALL_CSN) - unit: Cycles - tips: - CS Stall Rate: - avg: AVG((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != - 0) else None)) - min: MIN((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != - 0) else None)) - max: MAX((((100 * SPI_RA_RES_STALL_CSN) / GRBM_SPI_BUSY) if (GRBM_SPI_BUSY != - 0) else None)) - unit: pct - tips: - Scratch Stall: - avg: AVG(SPI_RA_TMP_STALL_CSN) - min: MIN(SPI_RA_TMP_STALL_CSN) - max: MAX(SPI_RA_TMP_STALL_CSN) - unit: Cycles - tips: - Insufficient SIMD Waveslots: - avg: AVG(SPI_RA_WAVE_SIMD_FULL_CSN) - min: MIN(SPI_RA_WAVE_SIMD_FULL_CSN) - max: MAX(SPI_RA_WAVE_SIMD_FULL_CSN) - unit: SIMD - tips: - Insufficient SIMD VGPRs: - avg: AVG(SPI_RA_VGPR_SIMD_FULL_CSN) - min: MIN(SPI_RA_VGPR_SIMD_FULL_CSN) - max: MAX(SPI_RA_VGPR_SIMD_FULL_CSN) - unit: SIMD - tips: - Insufficient SIMD SGPRs: - avg: AVG(SPI_RA_SGPR_SIMD_FULL_CSN) - min: MIN(SPI_RA_SGPR_SIMD_FULL_CSN) - max: MAX(SPI_RA_SGPR_SIMD_FULL_CSN) - unit: SIMD - tips: - Insufficient CU LDS: - avg: AVG(SPI_RA_LDS_CU_FULL_CSN) - min: MIN(SPI_RA_LDS_CU_FULL_CSN) - max: MAX(SPI_RA_LDS_CU_FULL_CSN) - unit: CU - tips: - Insufficient CU Barries: - avg: AVG(SPI_RA_BAR_CU_FULL_CSN) - min: MIN(SPI_RA_BAR_CU_FULL_CSN) - max: MAX(SPI_RA_BAR_CU_FULL_CSN) - unit: CU - tips: - Insufficient Bulky Resource: - avg: AVG(SPI_RA_BULKY_CU_FULL_CSN) - min: MIN(SPI_RA_BULKY_CU_FULL_CSN) - max: MAX(SPI_RA_BULKY_CU_FULL_CSN) - unit: CU - tips: - Reach CU Threadgroups Limit: - avg: AVG(SPI_RA_TGLIM_CU_FULL_CSN) - min: MIN(SPI_RA_TGLIM_CU_FULL_CSN) - max: MAX(SPI_RA_TGLIM_CU_FULL_CSN) - unit: Cycles - tips: - Reach CU Wave Limit: - avg: AVG(SPI_RA_WVLIM_STALL_CSN) - min: MIN(SPI_RA_WVLIM_STALL_CSN) - max: MAX(SPI_RA_WVLIM_STALL_CSN) - unit: Cycles - tips: - VGPR Writes: - avg: AVG((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - min: MIN((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - max: MAX((((4 * SPI_VWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - unit: Cycles/wave - tips: - SGPR Writes: - avg: AVG((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - min: MIN((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - max: MAX((((1 * SPI_SWC_CSC_WR) / SPI_CSN_WAVE) if (SPI_CSN_WAVE != 0) else - None)) - unit: Cycles/wave - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/0700_wavefront-launch.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/0700_wavefront-launch.yaml deleted file mode 100644 index 13ba5b8e16..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/0700_wavefront-launch.yaml +++ /dev/null @@ -1,142 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 700 - title: Wavefront - data source: - - metric_table: - id: 701 - title: Wavefront Launch Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Grid Size: - avg: AVG(grd) - min: MIN(grd) - max: MAX(grd) - unit: Work Items - tips: - Workgroup Size: - avg: AVG(wgr) - min: MIN(wgr) - max: MAX(wgr) - unit: Work Items - tips: - Total Wavefronts: - avg: AVG(SPI_CSN_WAVE) - min: MIN(SPI_CSN_WAVE) - max: MAX(SPI_CSN_WAVE) - unit: Wavefronts - tips: - Saved Wavefronts: - avg: AVG(SQ_WAVES_SAVED) - min: MIN(SQ_WAVES_SAVED) - max: MAX(SQ_WAVES_SAVED) - unit: Wavefronts - tips: - Restored Wavefronts: - avg: AVG(SQ_WAVES_RESTORED) - min: MIN(SQ_WAVES_RESTORED) - max: MAX(SQ_WAVES_RESTORED) - unit: Wavefronts - tips: - VGPRs: - avg: AVG(arch_vgpr) - min: MIN(arch_vgpr) - max: MAX(arch_vgpr) - unit: Registers - tips: - AGPRs: - avg: AVG(accum_vgpr) - min: MIN(accum_vgpr) - max: MAX(accum_vgpr) - unit: Registers - tips: - SGPRs: - avg: AVG(sgpr) - min: MIN(sgpr) - max: MAX(sgpr) - unit: Registers - tips: - LDS Allocation: - avg: AVG(lds) - min: MIN(lds) - max: MAX(lds) - unit: Bytes - tips: - Scratch Allocation: - avg: AVG(scr) - min: MIN(scr) - max: MAX(scr) - unit: Bytes - tips: - - - metric_table: - id: 702 - title: Wavefront Runtime Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Kernel Time (Nanosec): - avg: AVG((EndNs - BeginNs)) - min: MIN((EndNs - BeginNs)) - max: MAX((EndNs - BeginNs)) - unit: ns - tips: - Kernel Time (Cycles): - avg: AVG(GRBM_GUI_ACTIVE) - min: MIN(GRBM_GUI_ACTIVE) - max: MAX(GRBM_GUI_ACTIVE) - unit: Cycle - tips: - Instr/wavefront: - avg: AVG((SQ_INSTS / SQ_WAVES)) - min: MIN((SQ_INSTS / SQ_WAVES)) - max: MAX((SQ_INSTS / SQ_WAVES)) - unit: Instr/wavefront - tips: - Wave Cycles: - avg: AVG(((4 * SQ_WAVE_CYCLES) / $denom)) - min: MIN(((4 * SQ_WAVE_CYCLES) / $denom)) - max: MAX(((4 * SQ_WAVE_CYCLES) / $denom)) - unit: (Cycles + $normUnit) - tips: - Dependency Wait Cycles: - avg: AVG(((4 * SQ_WAIT_ANY) / $denom)) - min: MIN(((4 * SQ_WAIT_ANY) / $denom)) - max: MAX(((4 * SQ_WAIT_ANY) / $denom)) - unit: (Cycles + $normUnit) - tips: - Issue Wait Cycles: - avg: AVG(((4 * SQ_WAIT_INST_ANY) / $denom)) - min: MIN(((4 * SQ_WAIT_INST_ANY) / $denom)) - max: MAX(((4 * SQ_WAIT_INST_ANY) / $denom)) - unit: (Cycles + $normUnit) - tips: - Active Cycles: - avg: AVG(((4 * SQ_ACTIVE_INST_ANY) / $denom)) - min: MIN(((4 * SQ_ACTIVE_INST_ANY) / $denom)) - max: MAX(((4 * SQ_ACTIVE_INST_ANY) / $denom)) - unit: (Cycles + $normUnit) - tips: - Wavefront Occupancy: - avg: AVG((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) - min: MIN((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) - max: MAX((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE)) - unit: Wavefronts - coll_level: SQ_LEVEL_WAVES - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1000_compute-unit-instruction-mix.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/1000_compute-unit-instruction-mix.yaml deleted file mode 100644 index 8ffd87d2c8..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1000_compute-unit-instruction-mix.yaml +++ /dev/null @@ -1,234 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1000 - title: Compute Units - Instruction Mix - data source: - - metric_table: - id: 1001 - title: Instruction Mix - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - style: - type: simple_bar - label_txt: (# of instr + $normUnit) - metric: - VALU - Vector: - avg: AVG(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom)) - min: MIN(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom)) - max: MAX(((SQ_INSTS_VALU - SQ_INSTS_MFMA) / $denom)) - unit: (instr + $normUnit) - tips: - VMEM: - avg: AVG(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom)) - min: MIN(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom)) - max: MAX(((SQ_INSTS_VMEM - SQ_INSTS_FLAT_LDS_ONLY) / $denom)) - unit: (instr + $normUnit) - tips: - LDS: - avg: AVG((SQ_INSTS_LDS / $denom)) - min: MIN((SQ_INSTS_LDS / $denom)) - max: MAX((SQ_INSTS_LDS / $denom)) - unit: (instr + $normUnit) - tips: - VALU - MFMA: - avg: AVG((SQ_INSTS_MFMA / $denom)) - min: MIN((SQ_INSTS_MFMA / $denom)) - max: MAX((SQ_INSTS_MFMA / $denom)) - unit: (instr + $normUnit) - tips: - SALU: - avg: AVG((SQ_INSTS_SALU / $denom)) - min: MIN((SQ_INSTS_SALU / $denom)) - max: MAX((SQ_INSTS_SALU / $denom)) - unit: (instr + $normUnit) - tips: - SMEM: - avg: AVG((SQ_INSTS_SMEM / $denom)) - min: MIN((SQ_INSTS_SMEM / $denom)) - max: MAX((SQ_INSTS_SMEM / $denom)) - unit: (instr + $normUnit) - tips: - Branch: - avg: AVG((SQ_INSTS_BRANCH / $denom)) - min: MIN((SQ_INSTS_BRANCH / $denom)) - max: MAX((SQ_INSTS_BRANCH / $denom)) - unit: (instr + $normUnit) - tips: - GDS: - avg: AVG((SQ_INSTS_GDS / $denom)) - min: MIN((SQ_INSTS_GDS / $denom)) - max: MAX((SQ_INSTS_GDS / $denom)) - unit: (instr + $normUnit) - tips: - - - metric_table: - id: 1002 - title: VALU Arithmetic Instr Mix - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - style: - type: simple_bar - label_txt: (# of instr + $normUnit) - metric: - INT32: - avg: AVG((SQ_INSTS_VALU_INT32 / $denom)) - min: MIN((SQ_INSTS_VALU_INT32 / $denom)) - max: MAX((SQ_INSTS_VALU_INT32 / $denom)) - unit: (instr + $normUnit) - tips: - INT64: - avg: AVG((SQ_INSTS_VALU_INT64 / $denom)) - min: MIN((SQ_INSTS_VALU_INT64 / $denom)) - max: MAX((SQ_INSTS_VALU_INT64 / $denom)) - unit: (instr + $normUnit) - tips: - F16-ADD: - avg: AVG((SQ_INSTS_VALU_ADD_F16 / $denom)) - min: MIN((SQ_INSTS_VALU_ADD_F16 / $denom)) - max: MAX((SQ_INSTS_VALU_ADD_F16 / $denom)) - unit: (instr + $normUnit) - tips: - F16-MUL: - avg: AVG((SQ_INSTS_VALU_MUL_F16 / $denom)) - min: MIN((SQ_INSTS_VALU_MUL_F16 / $denom)) - max: MAX((SQ_INSTS_VALU_MUL_F16 / $denom)) - unit: (instr + $normUnit) - tips: - F16-FMA: - avg: AVG((SQ_INSTS_VALU_FMA_F16 / $denom)) - min: MIN((SQ_INSTS_VALU_FMA_F16 / $denom)) - max: MAX((SQ_INSTS_VALU_FMA_F16 / $denom)) - unit: (instr + $normUnit) - tips: - F16-Trans: - avg: AVG((SQ_INSTS_VALU_TRANS_F16 / $denom)) - min: MIN((SQ_INSTS_VALU_TRANS_F16 / $denom)) - max: MAX((SQ_INSTS_VALU_TRANS_F16 / $denom)) - unit: (instr + $normUnit) - tips: - F32-ADD: - avg: AVG((SQ_INSTS_VALU_ADD_F32 / $denom)) - min: MIN((SQ_INSTS_VALU_ADD_F32 / $denom)) - max: MAX((SQ_INSTS_VALU_ADD_F32 / $denom)) - unit: (instr + $normUnit) - tips: - F32-MUL: - avg: AVG((SQ_INSTS_VALU_MUL_F32 / $denom)) - min: MIN((SQ_INSTS_VALU_MUL_F32 / $denom)) - max: MAX((SQ_INSTS_VALU_MUL_F32 / $denom)) - unit: (instr + $normUnit) - tips: - F32-FMA: - avg: AVG((SQ_INSTS_VALU_FMA_F32 / $denom)) - min: MIN((SQ_INSTS_VALU_FMA_F32 / $denom)) - max: MAX((SQ_INSTS_VALU_FMA_F32 / $denom)) - unit: (instr + $normUnit) - tips: - F32-Trans: - avg: AVG((SQ_INSTS_VALU_TRANS_F32 / $denom)) - min: MIN((SQ_INSTS_VALU_TRANS_F32 / $denom)) - max: MAX((SQ_INSTS_VALU_TRANS_F32 / $denom)) - unit: (instr + $normUnit) - tips: - F64-ADD: - avg: AVG((SQ_INSTS_VALU_ADD_F64 / $denom)) - min: MIN((SQ_INSTS_VALU_ADD_F64 / $denom)) - max: MAX((SQ_INSTS_VALU_ADD_F64 / $denom)) - unit: (instr + $normUnit) - tips: - F64-MUL: - avg: AVG((SQ_INSTS_VALU_MUL_F64 / $denom)) - min: MIN((SQ_INSTS_VALU_MUL_F64 / $denom)) - max: MAX((SQ_INSTS_VALU_MUL_F64 / $denom)) - unit: (instr + $normUnit) - tips: - F64-FMA: - avg: AVG((SQ_INSTS_VALU_FMA_F64 / $denom)) - min: MIN((SQ_INSTS_VALU_FMA_F64 / $denom)) - max: MAX((SQ_INSTS_VALU_FMA_F64 / $denom)) - unit: (instr + $normUnit) - tips: - F64-Trans: - avg: AVG((SQ_INSTS_VALU_TRANS_F64 / $denom)) - min: MIN((SQ_INSTS_VALU_TRANS_F64 / $denom)) - max: MAX((SQ_INSTS_VALU_TRANS_F64 / $denom)) - unit: (instr + $normUnit) - tips: - Conversion: - avg: AVG((SQ_INSTS_VALU_CVT / $denom)) - min: MIN((SQ_INSTS_VALU_CVT / $denom)) - max: MAX((SQ_INSTS_VALU_CVT / $denom)) - unit: (instr + $normUnit) - tips: - - - metric_table: - id: 1003 - title: VMEM Instr Mix - header: - type: type - count: Count - tips: Tips - metric: - Buffer Instr: - count: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom)) - tips: - Buffer Read: - count: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) - tips: - Buffer Write: - count: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) - tips: - Buffer Atomic: - count: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) - tips: - Flat Instr: - count: AVG((TA_FLAT_WAVEFRONTS_sum / $denom)) - tips: - Flat Read: - count: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) - tips: - Flat Write: - count: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) - tips: - Flat Atomic: - count: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) - tips: - - - metric_table: - id: 1004 - title: MFMA Arithmetic Instr Mix - header: - type: type - count: Count - tips: Tips - metric: - MFMA-I8: - count: AVG((SQ_INSTS_VALU_MFMA_I8 / $denom)) - tips: - MFMA-F16: - count: AVG((SQ_INSTS_VALU_MFMA_F16 / $denom)) - tips: - MFMA-BF16: - count: AVG((SQ_INSTS_VALU_MFMA_BF16 / $denom)) - tips: - MFMA-F32: - count: AVG((SQ_INSTS_VALU_MFMA_F32 / $denom)) - tips: - MFMA-F64: - count: AVG((SQ_INSTS_VALU_MFMA_F64 / $denom)) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1100_compute-unit-compute-pipeline.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/1100_compute-unit-compute-pipeline.yaml deleted file mode 100644 index 5767fe771a..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1100_compute-unit-compute-pipeline.yaml +++ /dev/null @@ -1,202 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1100 - title: Compute Units - Compute Pipeline - data source: - - metric_table: - id: 1101 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - valu_flops_pop: - value: ((100 * AVG(((((64 * (((SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16) - + SQ_INSTS_VALU_TRANS_F16) + (2 * SQ_INSTS_VALU_FMA_F16))) + (64 * (((SQ_INSTS_VALU_ADD_F32 - + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32) + (2 * SQ_INSTS_VALU_FMA_F32)))) - + (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) - + (2 * SQ_INSTS_VALU_FMA_F64)))) / (EndNs - BeginNs)))) / (((($sclk - * $numCU) * 64) * 2) / 1000)) - unit: Pct of Peak - tips: - mfma_flops_bf16_pop: - value: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_BF16 * 512) / (EndNs - BeginNs)))) - / ((($sclk * $numCU) * 512) / 1000)) - unit: Pct of Peak - tips: - mfma_flops_f16_pop: - value: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F16 * 512) / (EndNs - BeginNs)))) - / ((($sclk * $numCU) * 1024) / 1000)) - unit: Pct of Peak - tips: - mfma_flops_f32_pop: - value: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F32 * 512) / (EndNs - BeginNs)))) - / ((($sclk * $numCU) * 256) / 1000)) - unit: Pct of Peak - tips: - mfma_flops_f64_pop: - value: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_F64 * 512) / (EndNs - BeginNs)))) - / ((($sclk * $numCU) * 256) / 1000)) - unit: Pct of Peak - tips: - mfma_flops_i8_pop: - value: ((100 * AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / (EndNs - BeginNs)))) - / ((($sclk * $numCU) * 1024) / 1000)) - unit: Pct of Peak - tips: - - - metric_table: - id: 1102 - title: Pipeline Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - IPC (Avg): - avg: AVG((SQ_INSTS / SQ_BUSY_CU_CYCLES)) - min: MIN((SQ_INSTS / SQ_BUSY_CU_CYCLES)) - max: MAX((SQ_INSTS / SQ_BUSY_CU_CYCLES)) - unit: Instr/cycle - tips: - IPC (Issue): - avg: AVG(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY)) - min: MIN(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY)) - max: MAX(((((((((SQ_INSTS_VALU + SQ_INSTS_VMEM) + SQ_INSTS_SALU) + SQ_INSTS_SMEM) - + SQ_INSTS_GDS) + SQ_INSTS_BRANCH) + SQ_INSTS_SENDMSG) + SQ_INSTS_VSKIPPED) - / SQ_ACTIVE_INST_ANY)) - unit: Instr/cycle - tips: - SALU Util: - avg: AVG((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) - min: MIN((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) - max: MAX((((100 * SQ_ACTIVE_INST_SCA) / GRBM_GUI_ACTIVE) / $numCU)) - unit: pct - tips: - VALU Util: - avg: AVG((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) - min: MIN((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) - max: MAX((((100 * SQ_ACTIVE_INST_VALU) / GRBM_GUI_ACTIVE) / $numCU)) - unit: pct - tips: - VALU Active Threads: - avg: AVG(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) - min: MIN(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) - max: MAX(((SQ_THREAD_CYCLES_VALU / SQ_ACTIVE_INST_VALU) if (SQ_ACTIVE_INST_VALU - != 0) else None)) - unit: Threads - tips: - MFMA Util: - avg: AVG(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $numCU) * GRBM_GUI_ACTIVE))) - min: MIN(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $numCU) * GRBM_GUI_ACTIVE))) - max: MAX(((100 * SQ_VALU_MFMA_BUSY_CYCLES) / ((4 * $numCU) * GRBM_GUI_ACTIVE))) - unit: pct - tips: - MFMA Instr Cycles: - avg: AVG(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0) - else None)) - min: MIN(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0) - else None)) - max: MAX(((SQ_VALU_MFMA_BUSY_CYCLES / SQ_INSTS_MFMA) if (SQ_INSTS_MFMA != 0) - else None)) - unit: cycles/instr - tips: - - - metric_table: - id: 1103 - title: Arithmetic Operations - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - FLOPs (Total): - avg: AVG((((((((64 * (((SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16) + SQ_INSTS_VALU_TRANS_F16) - + (SQ_INSTS_VALU_FMA_F16 * 2))) + ((512 * SQ_INSTS_VALU_MFMA_MOPS_F16) + (512 - * SQ_INSTS_VALU_MFMA_MOPS_BF16))) + (64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) - + SQ_INSTS_VALU_TRANS_F32) + (SQ_INSTS_VALU_FMA_F32 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) - + (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) - + (SQ_INSTS_VALU_FMA_F64 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / - $denom)) - min: MIN((((((((64 * (((SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16) + SQ_INSTS_VALU_TRANS_F16) - + (SQ_INSTS_VALU_FMA_F16 * 2))) + ((512 * SQ_INSTS_VALU_MFMA_MOPS_F16) + (512 - * SQ_INSTS_VALU_MFMA_MOPS_BF16))) + (64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) - + SQ_INSTS_VALU_TRANS_F32) + (SQ_INSTS_VALU_FMA_F32 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) - + (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) - + (SQ_INSTS_VALU_FMA_F64 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / - $denom)) - max: MAX((((((((64 * (((SQ_INSTS_VALU_ADD_F16 + SQ_INSTS_VALU_MUL_F16) + SQ_INSTS_VALU_TRANS_F16) - + (SQ_INSTS_VALU_FMA_F16 * 2))) + ((512 * SQ_INSTS_VALU_MFMA_MOPS_F16) + (512 - * SQ_INSTS_VALU_MFMA_MOPS_BF16))) + (64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) - + SQ_INSTS_VALU_TRANS_F32) + (SQ_INSTS_VALU_FMA_F32 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) - + (64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) - + (SQ_INSTS_VALU_FMA_F64 * 2)))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / - $denom)) - unit: (OPs + $normUnit) - tips: - INT8 OPs: - avg: AVG(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom)) - min: MIN(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom)) - max: MAX(((SQ_INSTS_VALU_MFMA_MOPS_I8 * 512) / $denom)) - unit: (OPs + $normUnit) - tips: - F16 OPs: - avg: AVG(((((((64 * SQ_INSTS_VALU_ADD_F16) + (64 * SQ_INSTS_VALU_MUL_F16)) + - (64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 * - SQ_INSTS_VALU_MFMA_MOPS_F16)) / $denom)) - min: MIN(((((((64 * SQ_INSTS_VALU_ADD_F16) + (64 * SQ_INSTS_VALU_MUL_F16)) + - (64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 * - SQ_INSTS_VALU_MFMA_MOPS_F16)) / $denom)) - max: MAX(((((((64 * SQ_INSTS_VALU_ADD_F16) + (64 * SQ_INSTS_VALU_MUL_F16)) + - (64 * SQ_INSTS_VALU_TRANS_F16)) + (128 * SQ_INSTS_VALU_FMA_F16)) + (512 * - SQ_INSTS_VALU_MFMA_MOPS_F16)) / $denom)) - unit: (OPs + $normUnit) - tips: - BF16 OPs: - avg: AVG(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom)) - min: MIN(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom)) - max: MAX(((512 * SQ_INSTS_VALU_MFMA_MOPS_BF16) / $denom)) - unit: (OPs + $normUnit) - tips: - F32 OPs: - avg: AVG((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32) - + (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom)) - min: MIN((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32) - + (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom)) - max: MAX((((64 * (((SQ_INSTS_VALU_ADD_F32 + SQ_INSTS_VALU_MUL_F32) + SQ_INSTS_VALU_TRANS_F32) - + (SQ_INSTS_VALU_FMA_F32 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F32)) / $denom)) - unit: (OPs + $normUnit) - tips: - F64 OPs: - avg: AVG((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) - + (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom)) - min: MIN((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) - + (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom)) - max: MAX((((64 * (((SQ_INSTS_VALU_ADD_F64 + SQ_INSTS_VALU_MUL_F64) + SQ_INSTS_VALU_TRANS_F64) - + (SQ_INSTS_VALU_FMA_F64 * 2))) + (512 * SQ_INSTS_VALU_MFMA_MOPS_F64)) / $denom)) - unit: (OPs + $normUnit) - tips: \ No newline at end of file diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1200_lds.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/1200_lds.yaml deleted file mode 100644 index 3fd52c3b1b..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1200_lds.yaml +++ /dev/null @@ -1,121 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1200 - title: Local Data Share (LDS) - data source: - - metric_table: - id: 1201 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - Utilization: - value: AVG(((100 * SQ_LDS_IDX_ACTIVE) / (GRBM_GUI_ACTIVE * $numCU))) - unit: Pct of Peak - tips: - Access Rate: - value: AVG(((200 * SQ_ACTIVE_INST_LDS) / (GRBM_GUI_ACTIVE * $numCU))) - unit: Pct of Peak - tips: - Bandwidth (Pct-of-Peak): - value: AVG((((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / (EndNs - BeginNs)) / (($sclk * $numCU) * 0.00128))) - unit: Pct of Peak - tips: - Bank Conflict Rate: - value: AVG((((SQ_LDS_BANK_CONFLICT * 3.125) / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - unit: Pct of Peak - tips: - - - metric_table: - id: 1202 - title: LDS Stats - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - LDS Instrs: - avg: AVG((SQ_INSTS_LDS / $denom)) - min: MIN((SQ_INSTS_LDS / $denom)) - max: MAX((SQ_INSTS_LDS / $denom)) - unit: (Instr + $normUnit) - tips: - Bandwidth: - avg: AVG(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / $denom)) - min: MIN(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / $denom)) - max: MAX(((((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) * 4) * TO_INT($LDSBanks)) - / $denom)) - unit: (Bytes + $normUnit) - tips: - Bank Conficts/Access: - avg: AVG(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - min: MIN(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - max: MAX(((SQ_LDS_BANK_CONFLICT / (SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT)) - if ((SQ_LDS_IDX_ACTIVE - SQ_LDS_BANK_CONFLICT) != 0) else None)) - unit: Conflicts/Access - tips: - Index Accesses: - avg: AVG((SQ_LDS_IDX_ACTIVE / $denom)) - min: MIN((SQ_LDS_IDX_ACTIVE / $denom)) - max: MAX((SQ_LDS_IDX_ACTIVE / $denom)) - unit: (Cycles + $normUnit) - tips: - Atomic Cycles: - avg: AVG((SQ_LDS_ATOMIC_RETURN / $denom)) - min: MIN((SQ_LDS_ATOMIC_RETURN / $denom)) - max: MAX((SQ_LDS_ATOMIC_RETURN / $denom)) - unit: (Cycles + $normUnit) - tips: - Bank Conflict: - avg: AVG((SQ_LDS_BANK_CONFLICT / $denom)) - min: MIN((SQ_LDS_BANK_CONFLICT / $denom)) - max: MAX((SQ_LDS_BANK_CONFLICT / $denom)) - unit: (Cycles + $normUnit) - tips: - Addr Conflict: - avg: AVG((SQ_LDS_ADDR_CONFLICT / $denom)) - min: MIN((SQ_LDS_ADDR_CONFLICT / $denom)) - max: MAX((SQ_LDS_ADDR_CONFLICT / $denom)) - unit: (Cycles + $normUnit) - tips: - Unaligned Stall: - avg: AVG((SQ_LDS_UNALIGNED_STALL / $denom)) - min: MIN((SQ_LDS_UNALIGNED_STALL / $denom)) - max: MAX((SQ_LDS_UNALIGNED_STALL / $denom)) - unit: (Cycles + $normUnit) - tips: - Mem Violations: - avg: AVG((SQ_LDS_MEM_VIOLATIONS / $denom)) - min: MIN((SQ_LDS_MEM_VIOLATIONS / $denom)) - max: MAX((SQ_LDS_MEM_VIOLATIONS / $denom)) - unit: ( + $normUnit) - tips: - LDS Latency: - avg: AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) - min: MIN(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) - max: MAX(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) if (SQ_INSTS_LDS != 0) else None)) - unit: Cycles - coll_level: SQ_INST_LEVEL_LDS - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1300_instruction-cache.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/1300_instruction-cache.yaml deleted file mode 100644 index 329a7edbad..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1300_instruction-cache.yaml +++ /dev/null @@ -1,79 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1300 - title: Instruction Cache - data source: - - metric_table: - id: 1301 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - Bandwidth: - value: AVG(((SQC_ICACHE_REQ * 100000) / (($sclk * $numSQC) - * (EndNs - BeginNs)))) - unit: Pct of Peak - tips: - Cache Hit: - value: AVG(((SQC_ICACHE_HITS * 100) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) - + SQC_ICACHE_MISSES_DUPLICATE))) - unit: Pct of Peak - tips: - - - metric_table: - id: 1302 - title: Instruction Cache Accesses - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Req: - avg: AVG((SQC_ICACHE_REQ / $denom)) - min: MIN((SQC_ICACHE_REQ / $denom)) - max: MAX((SQC_ICACHE_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Hits: - avg: AVG((SQC_ICACHE_HITS / $denom)) - min: MIN((SQC_ICACHE_HITS / $denom)) - max: MAX((SQC_ICACHE_HITS / $denom)) - unit: (Hits + $normUnit) - tips: - Misses - Non Duplicated: - avg: AVG((SQC_ICACHE_MISSES / $denom)) - min: MIN((SQC_ICACHE_MISSES / $denom)) - max: MAX((SQC_ICACHE_MISSES / $denom)) - unit: (Misses + $normUnit) - tips: - Misses - Duplicated: - avg: AVG((SQC_ICACHE_MISSES_DUPLICATE / $denom)) - min: MIN((SQC_ICACHE_MISSES_DUPLICATE / $denom)) - max: MAX((SQC_ICACHE_MISSES_DUPLICATE / $denom)) - unit: (Misses + $normUnit) - tips: - Cache Hit: - avg: AVG(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) - + SQC_ICACHE_MISSES_DUPLICATE))) - min: MIN(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + - SQC_ICACHE_MISSES_DUPLICATE))) - max: MAX(((100 * SQC_ICACHE_HITS) / ((SQC_ICACHE_HITS + SQC_ICACHE_MISSES) + - SQC_ICACHE_MISSES_DUPLICATE))) - unit: pct - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1400_constant-cache.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/1400_constant-cache.yaml deleted file mode 100644 index 563caad13f..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1400_constant-cache.yaml +++ /dev/null @@ -1,164 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1400 - title: Scalar L1 Data Cache - data source: - - metric_table: - id: 1401 - title: Speed-of-Light - header: - mertic: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - Bandwidth: - value: AVG(((SQC_DCACHE_REQ * 100000) / (($sclk * $numSQC) - * (EndNs - BeginNs)))) - unit: Pct of Peak - tips: - Cache Hit: - value: - AVG((((SQC_DCACHE_HITS * 100) / (SQC_DCACHE_HITS + SQC_DCACHE_MISSES + SQC_DCACHE_MISSES_DUPLICATE)) - if ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) - unit: Pct of Peak - tips: - - - metric_table: - id: 1402 - title: Scalar L1D Cache Accesses - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Req: - avg: AVG((SQC_DCACHE_REQ / $denom)) - min: MIN((SQC_DCACHE_REQ / $denom)) - max: MAX((SQC_DCACHE_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Hits: - avg: AVG((SQC_DCACHE_HITS / $denom)) - min: MIN((SQC_DCACHE_HITS / $denom)) - max: MAX((SQC_DCACHE_HITS / $denom)) - unit: (Req + $normUnit) - tips: - Misses - Non Duplicated: - avg: AVG((SQC_DCACHE_MISSES / $denom)) - min: MIN((SQC_DCACHE_MISSES / $denom)) - max: MAX((SQC_DCACHE_MISSES / $denom)) - unit: (Req + $normUnit) - tips: - Misses- Duplicated: - avg: AVG((SQC_DCACHE_MISSES_DUPLICATE / $denom)) - min: MIN((SQC_DCACHE_MISSES_DUPLICATE / $denom)) - max: MAX((SQC_DCACHE_MISSES_DUPLICATE / $denom)) - unit: (Req + $normUnit) - tips: - Cache Hit: - avg: AVG((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) - min: MIN((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) - max: MAX((((100 * SQC_DCACHE_HITS) / ((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE)) if (((SQC_DCACHE_HITS + SQC_DCACHE_MISSES) - + SQC_DCACHE_MISSES_DUPLICATE) != 0) else None)) - unit: pct - tips: - Read Req (Total): - avg: AVG((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) - + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) - min: MIN((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) - + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) - max: MAX((((((SQC_DCACHE_REQ_READ_1 + SQC_DCACHE_REQ_READ_2) + SQC_DCACHE_REQ_READ_4) - + SQC_DCACHE_REQ_READ_8) + SQC_DCACHE_REQ_READ_16) / $denom)) - unit: (Req + $normUnit) - tips: - Atomic Req: - avg: AVG((SQC_DCACHE_ATOMIC / $denom)) - min: MIN((SQC_DCACHE_ATOMIC / $denom)) - max: MAX((SQC_DCACHE_ATOMIC / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (1 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_1 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_1 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_1 / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (2 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_2 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_2 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_2 / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (4 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_4 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_4 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_4 / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (8 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_8 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_8 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_8 / $denom)) - unit: (Req + $normUnit) - tips: - Read Req (16 DWord): - avg: AVG((SQC_DCACHE_REQ_READ_16 / $denom)) - min: MIN((SQC_DCACHE_REQ_READ_16 / $denom)) - max: MAX((SQC_DCACHE_REQ_READ_16 / $denom)) - unit: (Req + $normUnit) - tips: - - - metric_table: - id: 1403 - title: Scalar L1D Cache - L2 Interface - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Read Req: - avg: AVG((SQC_TC_DATA_READ_REQ / $denom)) - min: MIN((SQC_TC_DATA_READ_REQ / $denom)) - max: MAX((SQC_TC_DATA_READ_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Write Req: - avg: AVG((SQC_TC_DATA_WRITE_REQ / $denom)) - min: MIN((SQC_TC_DATA_WRITE_REQ / $denom)) - max: MAX((SQC_TC_DATA_WRITE_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Atomic Req: - avg: AVG((SQC_TC_DATA_ATOMIC_REQ / $denom)) - min: MIN((SQC_TC_DATA_ATOMIC_REQ / $denom)) - max: MAX((SQC_TC_DATA_ATOMIC_REQ / $denom)) - unit: (Req + $normUnit) - tips: - Stall: - avg: AVG((SQC_TC_STALL / $denom)) - min: MIN((SQC_TC_STALL / $denom)) - max: MAX((SQC_TC_STALL / $denom)) - unit: (Cycles + $normUnit) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1500_TA_and_TD.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/1500_TA_and_TD.yaml deleted file mode 100644 index 03af854976..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1500_TA_and_TD.yaml +++ /dev/null @@ -1,174 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1500 - title: Texture Addresser and Texture Data (TA/TD) - data source: - - metric_table: - id: 1501 - title: TA - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - TA Busy: - avg: AVG(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TA_TA_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - TC2TA Addr Stall: - avg: AVG(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TA_ADDR_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - TC2TA Data Stall: - avg: AVG(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TA_DATA_STALLED_BY_TC_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - TD2TA Addr Stall: - avg: AVG(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TA_ADDR_STALLED_BY_TD_CYCLES_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - Total Instructions: - avg: AVG((TA_TOTAL_WAVEFRONTS_sum / $denom)) - min: MIN((TA_TOTAL_WAVEFRONTS_sum / $denom)) - max: MAX((TA_TOTAL_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Flat Instr: - avg: AVG((TA_FLAT_WAVEFRONTS_sum / $denom)) - min: MIN((TA_FLAT_WAVEFRONTS_sum / $denom)) - max: MAX((TA_FLAT_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Flat Read Instr: - avg: AVG((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) - min: MIN((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) - max: MAX((TA_FLAT_READ_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Flat Write Instr: - avg: AVG((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) - min: MIN((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) - max: MAX((TA_FLAT_WRITE_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Flat Atomic Instr: - avg: AVG((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) - min: MIN((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) - max: MAX((TA_FLAT_ATOMIC_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Instr: - avg: AVG((TA_BUFFER_WAVEFRONTS_sum / $denom)) - min: MIN((TA_BUFFER_WAVEFRONTS_sum / $denom)) - max: MAX((TA_BUFFER_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Read Instr: - avg: AVG((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) - min: MIN((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) - max: MAX((TA_BUFFER_READ_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Write Instr: - avg: AVG((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) - min: MIN((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) - max: MAX((TA_BUFFER_WRITE_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Atomic Instr: - avg: AVG((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) - min: MIN((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) - max: MAX((TA_BUFFER_ATOMIC_WAVEFRONTS_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Buffer Total Cylces: - avg: AVG((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) - min: MIN((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) - max: MAX((TA_BUFFER_TOTAL_CYCLES_sum / $denom)) - unit: (Cycles + $normUnit) - tips: - Buffer Coalesced Read: - avg: AVG((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) - min: MIN((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) - max: MAX((TA_BUFFER_COALESCED_READ_CYCLES_sum / $denom)) - unit: (Cycles + $normUnit) - tips: - Buffer Coalesced Write: - avg: AVG((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) - min: MIN((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) - max: MAX((TA_BUFFER_COALESCED_WRITE_CYCLES_sum / $denom)) - unit: (Cycles + $normUnit) - tips: - - - metric_table: - id: 1502 - title: TD - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - TD Busy: - avg: AVG(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TD_TD_BUSY_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - TC2TD Stall: - avg: AVG(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TD_TC_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - SPI2TD Stall: - avg: AVG(((100 * TD_SPI_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) - min: MIN(((100 * TD_SPI_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) - max: MAX(((100 * TD_SPI_STALL_sum) / (GRBM_GUI_ACTIVE * $numCU))) - unit: pct - tips: - Coalescable Instr: - avg: AVG((TD_COALESCABLE_WAVEFRONT_sum / $denom)) - min: MIN((TD_COALESCABLE_WAVEFRONT_sum / $denom)) - max: MAX((TD_COALESCABLE_WAVEFRONT_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Load Instr: - avg: AVG((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) - / $denom)) - min: MIN((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) - / $denom)) - max: MAX((((TD_LOAD_WAVEFRONT_sum - TD_STORE_WAVEFRONT_sum) - TD_ATOMIC_WAVEFRONT_sum) - / $denom)) - unit: (Instr + $normUnit) - tips: - Store Instr: - avg: AVG((TD_STORE_WAVEFRONT_sum / $denom)) - min: MIN((TD_STORE_WAVEFRONT_sum / $denom)) - max: MAX((TD_STORE_WAVEFRONT_sum / $denom)) - unit: (Instr + $normUnit) - tips: - Atomic Instr: - avg: AVG((TD_ATOMIC_WAVEFRONT_sum / $denom)) - min: MIN((TD_ATOMIC_WAVEFRONT_sum / $denom)) - max: MAX((TD_ATOMIC_WAVEFRONT_sum / $denom)) - unit: (Instr + $normUnit) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1600_L1_cache.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/1600_L1_cache.yaml deleted file mode 100644 index d9291de21d..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1600_L1_cache.yaml +++ /dev/null @@ -1,404 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1600 - title: Vector L1 Data Cache - data source: - - metric_table: - id: 1601 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - range_color: [1, 100] - label_txt: (%) - xrange: [0, 110] - metric: - Buffer Coalescing: - value: AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum - * 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else None)) - unit: Pct of Peak - tips: - Cache Util: - value: AVG((((TCP_GATE_EN2_sum * 100) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - unit: Pct of Peak - tips: - Cache BW: - value: ((100 * AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs)))) - / ((($sclk / 1000) * 64) * $numCU)) - unit: Pct of Peak - tips: - Cache Hit: - value: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - unit: Pct of Peak - tips: - - - metric_table: - id: 1602 - title: L1D Cache Stalls - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: unit - tips: Tips - metric: - Stalled on L2 Data: - avg: AVG((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - min: MIN((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - max: MAX((((100 * TCP_PENDING_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - unit: pct - tips: - Stalled on L2 Req: - avg: AVG((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - min: MIN((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - max: MAX((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) if (TCP_GATE_EN1_sum - != 0) else None)) - unit: pct - tips: - Tag RAM Stall (Read): - avg: AVG((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - min: MIN((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - max: MAX((((100 * TCP_READ_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - unit: pct - tips: - Tag RAM Stall (Write): - avg: AVG((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - min: MIN((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - max: MAX((((100 * TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - unit: pct - tips: - Tag RAM Stall (Atomic): - avg: AVG((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - min: MIN((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - max: MAX((((100 * TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)) - unit: pct - tips: - - - metric_table: - id: 1603 - title: L1D Cache Accesses - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Total Req: - avg: AVG((TCP_TOTAL_ACCESSES_sum / $denom)) - min: MIN((TCP_TOTAL_ACCESSES_sum / $denom)) - max: MAX((TCP_TOTAL_ACCESSES_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read Req: - avg: AVG((TCP_TOTAL_READ_sum / $denom)) - min: MIN((TCP_TOTAL_READ_sum / $denom)) - max: MAX((TCP_TOTAL_READ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write Req: - avg: AVG((TCP_TOTAL_WRITE_sum / $denom)) - min: MIN((TCP_TOTAL_WRITE_sum / $denom)) - max: MAX((TCP_TOTAL_WRITE_sum / $denom)) - unit: (Req + $normUnit) - tips: - Atomic Req: - avg: AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) - / $denom)) - min: MIN(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) - / $denom)) - max: MAX(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) - / $denom)) - unit: (Req + $normUnit) - tips: - Cache BW: - avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) - min: MIN(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) - max: MAX(((TCP_TOTAL_CACHE_ACCESSES_sum * 64) / (EndNs - BeginNs))) - unit: GB/s - tips: - Cache Accesses: - avg: AVG((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) - min: MIN((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) - max: MAX((TCP_TOTAL_CACHE_ACCESSES_sum / $denom)) - unit: (Req + $normUnit) - tips: - Cache Hits: - avg: AVG(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / $denom)) - min: MIN(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / $denom)) - max: MAX(((TCP_TOTAL_CACHE_ACCESSES_sum - (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / $denom)) - unit: (Req + $normUnit) - tips: - Cache Hit Rate: - avg: AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + - TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / - TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - min: MIN(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + - TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / - TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - max: MAX(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + - TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / - TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)) - unit: pct - tips: - Invalidate: - avg: AVG((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) - min: MIN((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) - max: MAX((TCP_TOTAL_WRITEBACK_INVALIDATES_sum / $denom)) - unit: (Req + $normUnit) - tips: - L1-L2 BW: - avg: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) - + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) - min: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) - + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) - max: AVG(((64 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) - + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) / $denom)) - unit: (Bytes + $normUnit) - tips: - L1-L2 Read: - avg: AVG((TCP_TCC_READ_REQ_sum / $denom)) - min: MIN((TCP_TCC_READ_REQ_sum / $denom)) - max: MAX((TCP_TCC_READ_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - L1-L2 Write: - avg: AVG((TCP_TCC_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - L1-L2 Atomic: - avg: AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - / $denom)) - min: MIN(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - / $denom)) - max: MAX(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - / $denom)) - unit: (Req + $normUnit) - tips: - L1 Access Latency: - avg: AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum - != 0) else None)) - min: MIN(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum - != 0) else None)) - max: MAX(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum - != 0) else None)) - unit: Cycles - tips: - L1-L2 Read Latency: - avg: AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) - if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) - min: MIN(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) - if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) - max: MAX(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) - if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)) - unit: Cycles - tips: - L1-L2 Write Latency: - avg: AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else - None)) - min: MIN(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else - None)) - max: MAX(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) != 0) else - None)) - unit: Cycles - tips: - - - metric_table: - id: 1604 - title: L1D - L2 Transactions - header: - metric: Metric - xfer: Xfer - coherency: Coherency - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - style: - type: simple_multi_bar - metric: - NC - Read: - xfer: Read - coherency: NC - avg: AVG((TCP_TCC_NC_READ_REQ_sum / $denom)) - min: MIN((TCP_TCC_NC_READ_REQ_sum / $denom)) - max: MAX((TCP_TCC_NC_READ_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - UC - Read: - xfer: Read - coherency: UC - avg: AVG((TCP_TCC_UC_READ_REQ_sum / $denom)) - min: MIN((TCP_TCC_UC_READ_REQ_sum / $denom)) - max: MAX((TCP_TCC_UC_READ_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - CC - Read: - xfer: Read - coherency: CC - avg: AVG((TCP_TCC_CC_READ_REQ_sum / $denom)) - min: MIN((TCP_TCC_CC_READ_REQ_sum / $denom)) - max: MAX((TCP_TCC_CC_READ_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - RW - Read: - xfer: Read - coherency: RW - avg: AVG((TCP_TCC_RW_READ_REQ_sum / $denom)) - min: MIN((TCP_TCC_RW_READ_REQ_sum / $denom)) - max: MAX((TCP_TCC_RW_READ_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - RW - Write: - xfer: Write - coherency: RW - avg: AVG((TCP_TCC_RW_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_RW_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_RW_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - NC - Write: - xfer: Write - coherency: NC - avg: AVG((TCP_TCC_NC_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_NC_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_NC_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - UC - Write: - xfer: Write - coherency: UC - avg: AVG((TCP_TCC_UC_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_UC_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_UC_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - CC - Write: - xfer: Write - coherency: CC - avg: AVG((TCP_TCC_CC_WRITE_REQ_sum / $denom)) - min: MIN((TCP_TCC_CC_WRITE_REQ_sum / $denom)) - max: MAX((TCP_TCC_CC_WRITE_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - NC - Atomic: - xfer: Atomic - coherency: NC - avg: AVG((TCP_TCC_NC_ATOMIC_REQ_sum / $denom)) - min: MIN((TCP_TCC_NC_ATOMIC_REQ_sum / $denom)) - max: MAX((TCP_TCC_NC_ATOMIC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - UC - Atomic: - xfer: Atomic - coherency: UC - avg: AVG((TCP_TCC_UC_ATOMIC_REQ_sum / $denom)) - min: MIN((TCP_TCC_UC_ATOMIC_REQ_sum / $denom)) - max: MAX((TCP_TCC_UC_ATOMIC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - CC - Atomic: - xfer: Atomic - coherency: CC - avg: AVG((TCP_TCC_CC_ATOMIC_REQ_sum / $denom)) - min: MIN((TCP_TCC_CC_ATOMIC_REQ_sum / $denom)) - max: MAX((TCP_TCC_CC_ATOMIC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - RW - Atomic: - xfer: Atomic - coherency: RW - avg: AVG((TCP_TCC_RW_ATOMIC_REQ_sum / $denom)) - min: MIN((TCP_TCC_RW_ATOMIC_REQ_sum / $denom)) - max: MAX((TCP_TCC_RW_ATOMIC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - - - metric_table: - id: 1605 - title: L1D Addr Translation - header: - metric: Metric - avg: Avg - min: Min - max: Max - units: Units - tips: Tips - metric: - Req: - avg: AVG((TCP_UTCL1_REQUEST_sum / $denom)) - min: MIN((TCP_UTCL1_REQUEST_sum / $denom)) - max: MAX((TCP_UTCL1_REQUEST_sum / $denom)) - units: (Req + $normUnit) - tips: - Hit Ratio: - avg: AVG((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if - (TCP_UTCL1_REQUEST_sum != 0) else None)) - min: MIN((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if - (TCP_UTCL1_REQUEST_sum != 0) else None)) - max: MAX((((100 * TCP_UTCL1_TRANSLATION_HIT_sum) / TCP_UTCL1_REQUEST_sum) if - (TCP_UTCL1_REQUEST_sum != 0) else None)) - units: pct - tips: - Hits: - avg: AVG((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) - min: MIN((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) - max: MAX((TCP_UTCL1_TRANSLATION_HIT_sum / $denom)) - units: (Hits + $normUnit) - tips: - Misses (Translation): - avg: AVG((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) - min: MIN((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) - max: MAX((TCP_UTCL1_TRANSLATION_MISS_sum / $denom)) - units: (Misses + $normUnit) - tips: - Misses (Permission): - avg: AVG((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) - min: MIN((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) - max: MAX((TCP_UTCL1_PERMISSION_MISS_sum / $denom)) - units: (Misses + $normUnit) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1700_L2_cache.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/1700_L2_cache.yaml deleted file mode 100644 index ddbaf91554..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1700_L2_cache.yaml +++ /dev/null @@ -1,364 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1700 - title: L2 Cache - data source: - - metric_table: - id: 1701 - title: Speed-of-Light - header: - metric: Metric - value: Value - unit: Unit - tips: Tips - style: - type: simple_bar - metric: - L2 Util: - value: AVG(((TCC_BUSY_sum * 100) / (TO_INT($L2Banks) * GRBM_GUI_ACTIVE))) - unit: pct - tips: - Cache Hit: - value: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else 0)) - unit: pct - tips: - L2-EA Rd BW: - value: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / (EndNs - BeginNs))) - unit: GB/s - tips: - L2-EA Wr BW: - value: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / (EndNs - BeginNs))) - unit: GB/s - tips: - - - metric_table: - id: 1702 - title: L2 - Fabric Transactions - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Read BW: - avg: AVG((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / $denom)) - min: MIN((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / $denom)) - max: MAX((((TCC_EA_RDREQ_32B_sum * 32) + ((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) - * 64)) / $denom)) - unit: (Bytes + $normUnit) - tips: - Write BW: - avg: AVG((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / $denom)) - min: MIN((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / $denom)) - max: MAX((((TCC_EA_WRREQ_64B_sum * 64) + ((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) - * 32)) / $denom)) - unit: (Bytes + $normUnit) - tips: - Read (32B): - avg: AVG((TCC_EA_RDREQ_32B_sum / $denom)) - min: MIN((TCC_EA_RDREQ_32B_sum / $denom)) - max: MAX((TCC_EA_RDREQ_32B_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read (Uncached 32B): - avg: AVG((TCC_EA_RD_UNCACHED_32B_sum / $denom)) - min: MIN((TCC_EA_RD_UNCACHED_32B_sum / $denom)) - max: MAX((TCC_EA_RD_UNCACHED_32B_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read (64B): - avg: AVG(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) - min: MIN(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) - max: MAX(((TCC_EA_RDREQ_sum - TCC_EA_RDREQ_32B_sum) / $denom)) - unit: (Req + $normUnit) - tips: - HBM Read: - avg: AVG((TCC_EA_RDREQ_DRAM_sum / $denom)) - min: MIN((TCC_EA_RDREQ_DRAM_sum / $denom)) - max: MAX((TCC_EA_RDREQ_DRAM_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write (32B): - avg: AVG(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) - min: MIN(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) - max: MAX(((TCC_EA_WRREQ_sum - TCC_EA_WRREQ_64B_sum) / $denom)) - unit: (Req + $normUnit) - tips: - Write (Uncached 32B): - avg: AVG((TCC_EA_WR_UNCACHED_32B_sum / $denom)) - min: MIN((TCC_EA_WR_UNCACHED_32B_sum / $denom)) - max: MAX((TCC_EA_WR_UNCACHED_32B_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write (64B): - avg: AVG((TCC_EA_WRREQ_64B_sum / $denom)) - min: MIN((TCC_EA_WRREQ_64B_sum / $denom)) - max: MAX((TCC_EA_WRREQ_64B_sum / $denom)) - unit: (Req + $normUnit) - tips: - HBM Write: - avg: AVG((TCC_EA_WRREQ_DRAM_sum / $denom)) - min: MIN((TCC_EA_WRREQ_DRAM_sum / $denom)) - max: MAX((TCC_EA_WRREQ_DRAM_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read Latency: - avg: AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != - 0) else None)) - min: MIN(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != - 0) else None)) - max: MAX(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum != - 0) else None)) - unit: Cycles - tips: - Write Latency: - avg: AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != - 0) else None)) - min: MIN(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != - 0) else None)) - max: MAX(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum != - 0) else None)) - unit: Cycles - tips: - Atomic Latency: - avg: AVG(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum - != 0) else None)) - min: MIN(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum - != 0) else None)) - max: MAX(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum - != 0) else None)) - unit: Cycles - tips: - Read Stall: - avg: AVG((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - min: MIN((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - max: MAX((((100 * ((TCC_EA_RDREQ_IO_CREDIT_STALL_sum + TCC_EA_RDREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - unit: pct - tips: - Write Stall: - avg: AVG((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - min: MIN((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - max: MAX((((100 * ((TCC_EA_WRREQ_IO_CREDIT_STALL_sum + TCC_EA_WRREQ_GMI_CREDIT_STALL_sum) - + TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum)) / TCC_BUSY_sum) if (TCC_BUSY_sum != - 0) else None)) - unit: pct - tips: - - - metric_table: - id: 1703 - title: L2 Cache Accesses - header: - metric: Metric - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - metric: - Req: - avg: AVG((TCC_REQ_sum / $denom)) - min: MIN((TCC_REQ_sum / $denom)) - max: MAX((TCC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Streaming Req: - avg: AVG((TCC_STREAMING_REQ_sum / $denom)) - min: MIN((TCC_STREAMING_REQ_sum / $denom)) - max: MAX((TCC_STREAMING_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read Req: - avg: AVG((TCC_READ_sum / $denom)) - min: MIN((TCC_READ_sum / $denom)) - max: MAX((TCC_READ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write Req: - avg: AVG((TCC_WRITE_sum / $denom)) - min: MIN((TCC_WRITE_sum / $denom)) - max: MAX((TCC_WRITE_sum / $denom)) - unit: (Req + $normUnit) - tips: - Atomic Req: - avg: AVG((TCC_ATOMIC_sum / $denom)) - min: MIN((TCC_ATOMIC_sum / $denom)) - max: MAX((TCC_ATOMIC_sum / $denom)) - unit: (Req + $normUnit) - tips: - Probe Req: - avg: AVG((TCC_PROBE_sum / $denom)) - min: MIN((TCC_PROBE_sum / $denom)) - max: MAX((TCC_PROBE_sum / $denom)) - unit: (Req + $normUnit) - tips: - Hits: - avg: AVG((TCC_HIT_sum / $denom)) - min: MIN((TCC_HIT_sum / $denom)) - max: MAX((TCC_HIT_sum / $denom)) - unit: (Hits + $normUnit) - tips: - Misses: - avg: AVG((TCC_MISS_sum / $denom)) - min: MIN((TCC_MISS_sum / $denom)) - max: MAX((TCC_MISS_sum / $denom)) - unit: (Misses + $normUnit) - tips: - Cache Hit: - avg: AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - min: MIN((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - max: MAX((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)) - unit: pct - tips: - Writeback: - avg: AVG((TCC_WRITEBACK_sum / $denom)) - min: MIN((TCC_WRITEBACK_sum / $denom)) - max: MAX((TCC_WRITEBACK_sum / $denom)) - unit: ( + $normUnit) - tips: - NC Req: - avg: AVG((TCC_NC_REQ_sum / $denom)) - min: MIN((TCC_NC_REQ_sum / $denom)) - max: MAX((TCC_NC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - UC Req: - avg: AVG((TCC_UC_REQ_sum / $denom)) - min: MIN((TCC_UC_REQ_sum / $denom)) - max: MAX((TCC_UC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - CC Req: - avg: AVG((TCC_CC_REQ_sum / $denom)) - min: MIN((TCC_CC_REQ_sum / $denom)) - max: MAX((TCC_CC_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - RW Req: - avg: AVG((TCC_RW_REQ_sum / $denom)) - min: MIN((TCC_RW_REQ_sum / $denom)) - max: MAX((TCC_RW_REQ_sum / $denom)) - unit: (Req + $normUnit) - tips: - Writeback (Normal): - avg: AVG((TCC_NORMAL_WRITEBACK_sum / $denom)) - min: MIN((TCC_NORMAL_WRITEBACK_sum / $denom)) - max: MAX((TCC_NORMAL_WRITEBACK_sum / $denom)) - unit: ( + $normUnit) - tips: - Writeback (TC Req): - avg: AVG((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) - min: MIN((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) - max: MAX((TCC_ALL_TC_OP_WB_WRITEBACK_sum / $denom)) - unit: ( + $normUnit) - tips: - Evict (Normal): - avg: AVG((TCC_NORMAL_EVICT_sum / $denom)) - min: MIN((TCC_NORMAL_EVICT_sum / $denom)) - max: MAX((TCC_NORMAL_EVICT_sum / $denom)) - unit: ( + $normUnit) - tips: - Evict (TC Req): - avg: AVG((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) - min: MIN((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) - max: MAX((TCC_ALL_TC_OP_INV_EVICT_sum / $denom)) - unit: ( + $normUnit) - tips: - - - metric_table: - id: 1704 - title: L2 - Fabric Interface Stalls - header: - metric: Metric - type: Type - transaction: Transaction - avg: Avg - min: Min - max: Max - unit: Unit - tips: Tips - style: - type: simple_multi_bar - metric: - Read - Remote Socket Stall: - type: Remote Socket Stall - transaction: Read - avg: AVG((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_RDREQ_IO_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read - Peer GCD Stall: - type: Peer GCD Stall - transaction: Read - avg: AVG((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_RDREQ_GMI_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Read - HBM Stall: - type: HBM Stall - transaction: Read - avg: AVG((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write - Remote Socket Stall: - type: Remote Socket Stall - transaction: Write - avg: AVG((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_WRREQ_IO_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write - Peer GCD Stall: - type: Peer GCD Stall - transaction: Write - avg: AVG((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_WRREQ_GMI_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write - HBM Stall: - type: HBM Stall - transaction: Write - avg: AVG((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) - min: MIN((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) - max: MAX((TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: - Write - Credit Starvation: - type: Credit Starvation - transaction: Write - avg: AVG((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) - min: MIN((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) - max: MAX((TCC_TOO_MANY_EA_WRREQS_STALL_sum / $denom)) - unit: (Req + $normUnit) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1800_L2_cache_per_channel.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/1800_L2_cache_per_channel.yaml deleted file mode 100644 index c6d93aa61b..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1800_L2_cache_per_channel.yaml +++ /dev/null @@ -1,2168 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1800 - title: L2 Cache (per Channel) - data source: - - metric_table: - id: 1801 - title: Aggregate Stats (All 32 channels) - header: - metric: Metric - avg: Avg - std dev: Std Dev - min: Min - max: Max - unit: Unit - tips: Tips - metric: - L2 Cache Hit Rate: - avg: AVG(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) - + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * - TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) - + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 - * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) - + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 - * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) - + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 - * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) - + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[29] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) - std dev: STD(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) - + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * - TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) - + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 - * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) - + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 - * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) - + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 - * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) - + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) - min: MIN(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) - + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * - TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) - + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 - * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) - + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 - * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) - + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 - * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) - + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) - max: MAX(((((((((((((((((((((((((((((((((((100 * TCC_HIT[0]) + (100 * TCC_HIT[1])) - + (100 * TCC_HIT[2])) + (100 * TCC_HIT[3])) + (100 * TCC_HIT[4])) + (100 * - TCC_HIT[5])) + (100 * TCC_HIT[6])) + (100 * TCC_HIT[7])) + (100 * TCC_HIT[8])) - + (100 * TCC_HIT[9])) + (100 * TCC_HIT[10])) + (100 * TCC_HIT[11])) + (100 - * TCC_HIT[12])) + (100 * TCC_HIT[13])) + (100 * TCC_HIT[14])) + (100 * TCC_HIT[15])) - + (100 * TCC_HIT[16])) + (100 * TCC_HIT[17])) + (100 * TCC_HIT[18])) + (100 - * TCC_HIT[19])) + (100 * TCC_HIT[20])) + (100 * TCC_HIT[21])) + (100 * TCC_HIT[22])) - + (100 * TCC_HIT[23])) + (100 * TCC_HIT[24])) + (100 * TCC_HIT[25])) + (100 - * TCC_HIT[26])) + (100 * TCC_HIT[27])) + (100 * TCC_HIT[28])) + (100 * TCC_HIT[29])) - + (100 * TCC_HIT[30])) + (100 * TCC_HIT[31])) / ((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31]))) if (((((((((((((((((((((((((((((((((TCC_MISS[0] - + TCC_HIT[0]) + (TCC_MISS[1] + TCC_HIT[1])) + (TCC_MISS[2] + TCC_HIT[2])) - + (TCC_MISS[3] + TCC_HIT[3])) + (TCC_MISS[4] + TCC_HIT[4])) + (TCC_MISS[5] - + TCC_HIT[5])) + (TCC_MISS[6] + TCC_HIT[6])) + (TCC_MISS[7] + TCC_HIT[7])) - + (TCC_MISS[8] + TCC_HIT[8])) + (TCC_MISS[9] + TCC_HIT[9])) + (TCC_MISS[10] - + TCC_HIT[10])) + (TCC_MISS[11] + TCC_HIT[11])) + (TCC_MISS[12] + TCC_HIT[12])) - + (TCC_MISS[13] + TCC_HIT[13])) + (TCC_MISS[14] + TCC_HIT[14])) + (TCC_MISS[15] - + TCC_HIT[15])) + (TCC_MISS[16] + TCC_HIT[16])) + (TCC_MISS[17] + TCC_HIT[17])) - + (TCC_MISS[18] + TCC_HIT[18])) + (TCC_MISS[19] + TCC_HIT[19])) + (TCC_MISS[20] - + TCC_HIT[20])) + (TCC_MISS[21] + TCC_HIT[21])) + (TCC_MISS[22] + TCC_HIT[22])) - + (TCC_MISS[23] + TCC_HIT[23])) + (TCC_MISS[24] + TCC_HIT[24])) + (TCC_MISS[25] - + TCC_HIT[25])) + (TCC_MISS[26] + TCC_HIT[26])) + (TCC_MISS[27] + TCC_HIT[27])) - + (TCC_MISS[28] + TCC_HIT[28])) + (TCC_MISS[28] + TCC_HIT[29])) + (TCC_MISS[30] - + TCC_HIT[30])) + (TCC_MISS[31] + TCC_HIT[31])) != 0) else None)) - unit: pct - tips: - Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) - + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) - + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) - + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) - + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) - + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) - + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) - + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) - + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) - + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) - + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) - + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) - + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) - + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) - + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) - + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) - + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) - + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) - + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) - + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) - + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) - + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) - + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) - + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) - + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_REQ[0]) + TO_INT(TCC_REQ[1])) - + TO_INT(TCC_REQ[2])) + TO_INT(TCC_REQ[3])) + TO_INT(TCC_REQ[4])) + TO_INT(TCC_REQ[5])) - + TO_INT(TCC_REQ[6])) + TO_INT(TCC_REQ[7])) + TO_INT(TCC_REQ[8])) + TO_INT(TCC_REQ[9])) - + TO_INT(TCC_REQ[10])) + TO_INT(TCC_REQ[11])) + TO_INT(TCC_REQ[12])) + TO_INT(TCC_REQ[13])) - + TO_INT(TCC_REQ[14])) + TO_INT(TCC_REQ[15])) + TO_INT(TCC_REQ[16])) + TO_INT(TCC_REQ[17])) - + TO_INT(TCC_REQ[18])) + TO_INT(TCC_REQ[19])) + TO_INT(TCC_REQ[20])) + TO_INT(TCC_REQ[21])) - + TO_INT(TCC_REQ[22])) + TO_INT(TCC_REQ[23])) + TO_INT(TCC_REQ[24])) + TO_INT(TCC_REQ[25])) - + TO_INT(TCC_REQ[26])) + TO_INT(TCC_REQ[27])) + TO_INT(TCC_REQ[28])) + TO_INT(TCC_REQ[29])) - + TO_INT(TCC_REQ[30])) + TO_INT(TCC_REQ[31])) / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L1 - L2 Read Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) - + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) - + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) - + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + - TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) - + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + - TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) - + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + - TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) - + TO_INT(TCC_READ[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) - + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) - + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) - + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + - TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) - + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + - TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) - + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + - TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) - + TO_INT(TCC_READ[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) - + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) - + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) - + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + - TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) - + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + - TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) - + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + - TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) - + TO_INT(TCC_READ[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_READ[0]) + TO_INT(TCC_READ[1])) - + TO_INT(TCC_READ[2])) + TO_INT(TCC_READ[3])) + TO_INT(TCC_READ[4])) + TO_INT(TCC_READ[5])) - + TO_INT(TCC_READ[6])) + TO_INT(TCC_READ[7])) + TO_INT(TCC_READ[8])) + TO_INT(TCC_READ[9])) - + TO_INT(TCC_READ[10])) + TO_INT(TCC_READ[11])) + TO_INT(TCC_READ[12])) + - TO_INT(TCC_READ[13])) + TO_INT(TCC_READ[14])) + TO_INT(TCC_READ[15])) + TO_INT(TCC_READ[16])) - + TO_INT(TCC_READ[17])) + TO_INT(TCC_READ[18])) + TO_INT(TCC_READ[19])) + - TO_INT(TCC_READ[20])) + TO_INT(TCC_READ[21])) + TO_INT(TCC_READ[22])) + TO_INT(TCC_READ[23])) - + TO_INT(TCC_READ[24])) + TO_INT(TCC_READ[25])) + TO_INT(TCC_READ[26])) + - TO_INT(TCC_READ[27])) + TO_INT(TCC_READ[28])) + TO_INT(TCC_READ[29])) + TO_INT(TCC_READ[30])) - + TO_INT(TCC_READ[31])) / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L1 - L2 Write Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) - + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + - TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) - + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) - + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) - + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) - + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) - + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) - + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) - + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) - + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) - + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + - TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) - + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) - + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) - + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) - + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) - + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) - + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) - + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) - + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) - + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + - TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) - + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) - + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) - + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) - + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) - + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) - + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) - + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) - + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_WRITE[0]) + TO_INT(TCC_WRITE[1])) - + TO_INT(TCC_WRITE[2])) + TO_INT(TCC_WRITE[3])) + TO_INT(TCC_WRITE[4])) + - TO_INT(TCC_WRITE[5])) + TO_INT(TCC_WRITE[6])) + TO_INT(TCC_WRITE[7])) + TO_INT(TCC_WRITE[8])) - + TO_INT(TCC_WRITE[9])) + TO_INT(TCC_WRITE[10])) + TO_INT(TCC_WRITE[11])) - + TO_INT(TCC_WRITE[12])) + TO_INT(TCC_WRITE[13])) + TO_INT(TCC_WRITE[14])) - + TO_INT(TCC_WRITE[15])) + TO_INT(TCC_WRITE[16])) + TO_INT(TCC_WRITE[17])) - + TO_INT(TCC_WRITE[18])) + TO_INT(TCC_WRITE[19])) + TO_INT(TCC_WRITE[20])) - + TO_INT(TCC_WRITE[21])) + TO_INT(TCC_WRITE[22])) + TO_INT(TCC_WRITE[23])) - + TO_INT(TCC_WRITE[24])) + TO_INT(TCC_WRITE[25])) + TO_INT(TCC_WRITE[26])) - + TO_INT(TCC_WRITE[27])) + TO_INT(TCC_WRITE[28])) + TO_INT(TCC_WRITE[29])) - + TO_INT(TCC_WRITE[30])) + TO_INT(TCC_WRITE[31])) / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L1 - L2 Atomic Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) - + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) - + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) - + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) - + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) - + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) - + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) - + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) - + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) - + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) - + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) - / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) - + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) - + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) - + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) - + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) - + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) - + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) - + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) - + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) - + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) - + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) - / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) - + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) - + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) - + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) - + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) - + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) - + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) - + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) - + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) - + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) - + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) - / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_ATOMIC[0]) + TO_INT(TCC_ATOMIC[1])) - + TO_INT(TCC_ATOMIC[2])) + TO_INT(TCC_ATOMIC[3])) + TO_INT(TCC_ATOMIC[4])) - + TO_INT(TCC_ATOMIC[5])) + TO_INT(TCC_ATOMIC[6])) + TO_INT(TCC_ATOMIC[7])) - + TO_INT(TCC_ATOMIC[8])) + TO_INT(TCC_ATOMIC[9])) + TO_INT(TCC_ATOMIC[10])) - + TO_INT(TCC_ATOMIC[11])) + TO_INT(TCC_ATOMIC[12])) + TO_INT(TCC_ATOMIC[13])) - + TO_INT(TCC_ATOMIC[14])) + TO_INT(TCC_ATOMIC[15])) + TO_INT(TCC_ATOMIC[16])) - + TO_INT(TCC_ATOMIC[17])) + TO_INT(TCC_ATOMIC[18])) + TO_INT(TCC_ATOMIC[19])) - + TO_INT(TCC_ATOMIC[20])) + TO_INT(TCC_ATOMIC[21])) + TO_INT(TCC_ATOMIC[22])) - + TO_INT(TCC_ATOMIC[23])) + TO_INT(TCC_ATOMIC[24])) + TO_INT(TCC_ATOMIC[25])) - + TO_INT(TCC_ATOMIC[26])) + TO_INT(TCC_ATOMIC[27])) + TO_INT(TCC_ATOMIC[28])) - + TO_INT(TCC_ATOMIC[29])) + TO_INT(TCC_ATOMIC[30])) + TO_INT(TCC_ATOMIC[31])) - / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L2 - EA Read Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) - + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) - + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) - + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) - + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) - + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) - + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) - + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) - + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) - + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) - + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) - / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) - + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) - + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) - + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) - + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) - + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) - + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) - + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) - + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) - + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) - + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) - / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) - + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) - + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) - + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) - + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) - + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) - + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) - + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) - + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) - + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) - + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) - / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ[0]) + TO_INT(TCC_EA_RDREQ[1])) - + TO_INT(TCC_EA_RDREQ[2])) + TO_INT(TCC_EA_RDREQ[3])) + TO_INT(TCC_EA_RDREQ[4])) - + TO_INT(TCC_EA_RDREQ[5])) + TO_INT(TCC_EA_RDREQ[6])) + TO_INT(TCC_EA_RDREQ[7])) - + TO_INT(TCC_EA_RDREQ[8])) + TO_INT(TCC_EA_RDREQ[9])) + TO_INT(TCC_EA_RDREQ[10])) - + TO_INT(TCC_EA_RDREQ[11])) + TO_INT(TCC_EA_RDREQ[12])) + TO_INT(TCC_EA_RDREQ[13])) - + TO_INT(TCC_EA_RDREQ[14])) + TO_INT(TCC_EA_RDREQ[15])) + TO_INT(TCC_EA_RDREQ[16])) - + TO_INT(TCC_EA_RDREQ[17])) + TO_INT(TCC_EA_RDREQ[18])) + TO_INT(TCC_EA_RDREQ[19])) - + TO_INT(TCC_EA_RDREQ[20])) + TO_INT(TCC_EA_RDREQ[21])) + TO_INT(TCC_EA_RDREQ[22])) - + TO_INT(TCC_EA_RDREQ[23])) + TO_INT(TCC_EA_RDREQ[24])) + TO_INT(TCC_EA_RDREQ[25])) - + TO_INT(TCC_EA_RDREQ[26])) + TO_INT(TCC_EA_RDREQ[27])) + TO_INT(TCC_EA_RDREQ[28])) - + TO_INT(TCC_EA_RDREQ[29])) + TO_INT(TCC_EA_RDREQ[30])) + TO_INT(TCC_EA_RDREQ[31])) - / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L2 - EA Write Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) - + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) - + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) - + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) - + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) - + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) - + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) - + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) - + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) - + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) - + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) - / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) - + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) - + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) - + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) - + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) - + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) - + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) - + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) - + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) - + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) - + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) - / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) - + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) - + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) - + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) - + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) - + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) - + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) - + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) - + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) - + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) - + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) - / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ[0]) + TO_INT(TCC_EA_WRREQ[1])) - + TO_INT(TCC_EA_WRREQ[2])) + TO_INT(TCC_EA_WRREQ[3])) + TO_INT(TCC_EA_WRREQ[4])) - + TO_INT(TCC_EA_WRREQ[5])) + TO_INT(TCC_EA_WRREQ[6])) + TO_INT(TCC_EA_WRREQ[7])) - + TO_INT(TCC_EA_WRREQ[8])) + TO_INT(TCC_EA_WRREQ[9])) + TO_INT(TCC_EA_WRREQ[10])) - + TO_INT(TCC_EA_WRREQ[11])) + TO_INT(TCC_EA_WRREQ[12])) + TO_INT(TCC_EA_WRREQ[13])) - + TO_INT(TCC_EA_WRREQ[14])) + TO_INT(TCC_EA_WRREQ[15])) + TO_INT(TCC_EA_WRREQ[16])) - + TO_INT(TCC_EA_WRREQ[17])) + TO_INT(TCC_EA_WRREQ[18])) + TO_INT(TCC_EA_WRREQ[19])) - + TO_INT(TCC_EA_WRREQ[20])) + TO_INT(TCC_EA_WRREQ[21])) + TO_INT(TCC_EA_WRREQ[22])) - + TO_INT(TCC_EA_WRREQ[23])) + TO_INT(TCC_EA_WRREQ[24])) + TO_INT(TCC_EA_WRREQ[25])) - + TO_INT(TCC_EA_WRREQ[26])) + TO_INT(TCC_EA_WRREQ[27])) + TO_INT(TCC_EA_WRREQ[28])) - + TO_INT(TCC_EA_WRREQ[29])) + TO_INT(TCC_EA_WRREQ[30])) + TO_INT(TCC_EA_WRREQ[31])) - / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L2 - EA Atomic Req: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) - + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) - + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) - + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) - + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) - + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) - + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) - + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) - + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) - + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) - + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) - / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) - + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) - + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) - + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) - + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) - + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) - + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) - + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) - + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) - + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) - + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) - / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) - + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) - + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) - + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) - + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) - + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) - + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) - + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) - + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) - + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) - + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) - / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_ATOMIC[0]) + TO_INT(TCC_EA_ATOMIC[1])) - + TO_INT(TCC_EA_ATOMIC[2])) + TO_INT(TCC_EA_ATOMIC[3])) + TO_INT(TCC_EA_ATOMIC[4])) - + TO_INT(TCC_EA_ATOMIC[5])) + TO_INT(TCC_EA_ATOMIC[6])) + TO_INT(TCC_EA_ATOMIC[7])) - + TO_INT(TCC_EA_ATOMIC[8])) + TO_INT(TCC_EA_ATOMIC[9])) + TO_INT(TCC_EA_ATOMIC[10])) - + TO_INT(TCC_EA_ATOMIC[11])) + TO_INT(TCC_EA_ATOMIC[12])) + TO_INT(TCC_EA_ATOMIC[13])) - + TO_INT(TCC_EA_ATOMIC[14])) + TO_INT(TCC_EA_ATOMIC[15])) + TO_INT(TCC_EA_ATOMIC[16])) - + TO_INT(TCC_EA_ATOMIC[17])) + TO_INT(TCC_EA_ATOMIC[18])) + TO_INT(TCC_EA_ATOMIC[19])) - + TO_INT(TCC_EA_ATOMIC[20])) + TO_INT(TCC_EA_ATOMIC[21])) + TO_INT(TCC_EA_ATOMIC[22])) - + TO_INT(TCC_EA_ATOMIC[23])) + TO_INT(TCC_EA_ATOMIC[24])) + TO_INT(TCC_EA_ATOMIC[25])) - + TO_INT(TCC_EA_ATOMIC[26])) + TO_INT(TCC_EA_ATOMIC[27])) + TO_INT(TCC_EA_ATOMIC[28])) - + TO_INT(TCC_EA_ATOMIC[29])) + TO_INT(TCC_EA_ATOMIC[30])) + TO_INT(TCC_EA_ATOMIC[31])) - / 32) / $denom)) - unit: (Req + $normUnit) - tips: - L2 - EA Read Lat: - avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) - + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) - + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) - + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) - + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) - + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) - + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) - + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) - + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) - + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) - + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) - + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) - + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) - + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) - + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) - + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) - + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) - + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) - + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + - TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) - + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) - + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) - + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) - + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) - + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) - + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) - + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) - std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) - + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) - + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) - + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) - + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) - + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) - + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) - + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) - + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) - + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) - + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) - + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) - + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) - + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) - + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) - + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) - + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) - + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) - + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + - TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) - + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) - + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) - + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) - + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) - + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) - + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) - + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) - min: MIN((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) - + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) - + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) - + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) - + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) - + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) - + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) - + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) - + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) - + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) - + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) - + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) - + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) - + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) - + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) - + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) - + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) - + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) - + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + - TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) - + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) - + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) - + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) - + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) - + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) - + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) - + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) - max: MAX((((((((((((((((((((((((((((((((((TCC_EA_RDREQ_LEVEL[0] + TCC_EA_RDREQ_LEVEL[1]) - + TCC_EA_RDREQ_LEVEL[2]) + TCC_EA_RDREQ_LEVEL[3]) + TCC_EA_RDREQ_LEVEL[4]) - + TCC_EA_RDREQ_LEVEL[5]) + TCC_EA_RDREQ_LEVEL[6]) + TCC_EA_RDREQ_LEVEL[7]) - + TCC_EA_RDREQ_LEVEL[8]) + TCC_EA_RDREQ_LEVEL[9]) + TCC_EA_RDREQ_LEVEL[10]) - + TCC_EA_RDREQ_LEVEL[11]) + TCC_EA_RDREQ_LEVEL[12]) + TCC_EA_RDREQ_LEVEL[13]) - + TCC_EA_RDREQ_LEVEL[14]) + TCC_EA_RDREQ_LEVEL[15]) + TCC_EA_RDREQ_LEVEL[16]) - + TCC_EA_RDREQ_LEVEL[17]) + TCC_EA_RDREQ_LEVEL[18]) + TCC_EA_RDREQ_LEVEL[19]) - + TCC_EA_RDREQ_LEVEL[20]) + TCC_EA_RDREQ_LEVEL[21]) + TCC_EA_RDREQ_LEVEL[22]) - + TCC_EA_RDREQ_LEVEL[23]) + TCC_EA_RDREQ_LEVEL[24]) + TCC_EA_RDREQ_LEVEL[25]) - + TCC_EA_RDREQ_LEVEL[26]) + TCC_EA_RDREQ_LEVEL[27]) + TCC_EA_RDREQ_LEVEL[28]) - + TCC_EA_RDREQ_LEVEL[29]) + TCC_EA_RDREQ_LEVEL[30]) + TCC_EA_RDREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) - + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) - + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) - + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) - + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) - + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) - + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) - + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) - + TCC_EA_RDREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_RDREQ[0] + - TCC_EA_RDREQ[1]) + TCC_EA_RDREQ[2]) + TCC_EA_RDREQ[3]) + TCC_EA_RDREQ[4]) - + TCC_EA_RDREQ[5]) + TCC_EA_RDREQ[6]) + TCC_EA_RDREQ[7]) + TCC_EA_RDREQ[8]) - + TCC_EA_RDREQ[9]) + TCC_EA_RDREQ[10]) + TCC_EA_RDREQ[11]) + TCC_EA_RDREQ[12]) - + TCC_EA_RDREQ[13]) + TCC_EA_RDREQ[14]) + TCC_EA_RDREQ[15]) + TCC_EA_RDREQ[16]) - + TCC_EA_RDREQ[17]) + TCC_EA_RDREQ[18]) + TCC_EA_RDREQ[19]) + TCC_EA_RDREQ[20]) - + TCC_EA_RDREQ[21]) + TCC_EA_RDREQ[22]) + TCC_EA_RDREQ[23]) + TCC_EA_RDREQ[24]) - + TCC_EA_RDREQ[25]) + TCC_EA_RDREQ[26]) + TCC_EA_RDREQ[27]) + TCC_EA_RDREQ[28]) - + TCC_EA_RDREQ[29]) + TCC_EA_RDREQ[30]) + TCC_EA_RDREQ[31]) != 0) else None)) - unit: Cycles - tips: - L2 - EA Write Lat: - avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) - + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) - + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) - + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) - + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) - + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) - + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) - + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) - + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) - + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) - + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) - + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) - + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) - + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) - + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) - + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) - + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) - + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) - + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + - TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) - + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) - + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) - + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) - + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) - + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) - + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) - + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) - std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) - + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) - + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) - + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) - + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) - + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) - + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) - + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) - + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) - + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) - + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) - + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) - + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) - + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) - + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) - + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) - + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) - + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) - + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + - TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) - + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) - + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) - + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) - + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) - + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) - + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) - + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) - min: MIN((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) - + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) - + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) - + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) - + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) - + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) - + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) - + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) - + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) - + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) - + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) - + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) - + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) - + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) - + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) - + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) - + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) - + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) - + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + - TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) - + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) - + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) - + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) - + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) - + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) - + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) - + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) - max: MAX((((((((((((((((((((((((((((((((((TCC_EA_WRREQ_LEVEL[0] + TCC_EA_WRREQ_LEVEL[1]) - + TCC_EA_WRREQ_LEVEL[2]) + TCC_EA_WRREQ_LEVEL[3]) + TCC_EA_WRREQ_LEVEL[4]) - + TCC_EA_WRREQ_LEVEL[5]) + TCC_EA_WRREQ_LEVEL[6]) + TCC_EA_WRREQ_LEVEL[7]) - + TCC_EA_WRREQ_LEVEL[8]) + TCC_EA_WRREQ_LEVEL[9]) + TCC_EA_WRREQ_LEVEL[10]) - + TCC_EA_WRREQ_LEVEL[11]) + TCC_EA_WRREQ_LEVEL[12]) + TCC_EA_WRREQ_LEVEL[13]) - + TCC_EA_WRREQ_LEVEL[14]) + TCC_EA_WRREQ_LEVEL[15]) + TCC_EA_WRREQ_LEVEL[16]) - + TCC_EA_WRREQ_LEVEL[17]) + TCC_EA_WRREQ_LEVEL[18]) + TCC_EA_WRREQ_LEVEL[19]) - + TCC_EA_WRREQ_LEVEL[20]) + TCC_EA_WRREQ_LEVEL[21]) + TCC_EA_WRREQ_LEVEL[22]) - + TCC_EA_WRREQ_LEVEL[23]) + TCC_EA_WRREQ_LEVEL[24]) + TCC_EA_WRREQ_LEVEL[25]) - + TCC_EA_WRREQ_LEVEL[26]) + TCC_EA_WRREQ_LEVEL[27]) + TCC_EA_WRREQ_LEVEL[28]) - + TCC_EA_WRREQ_LEVEL[29]) + TCC_EA_WRREQ_LEVEL[30]) + TCC_EA_WRREQ_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) - + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) - + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) - + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) - + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) - + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) - + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) - + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) - + TCC_EA_WRREQ[31])) if ((((((((((((((((((((((((((((((((TCC_EA_WRREQ[0] + - TCC_EA_WRREQ[1]) + TCC_EA_WRREQ[2]) + TCC_EA_WRREQ[3]) + TCC_EA_WRREQ[4]) - + TCC_EA_WRREQ[5]) + TCC_EA_WRREQ[6]) + TCC_EA_WRREQ[7]) + TCC_EA_WRREQ[8]) - + TCC_EA_WRREQ[9]) + TCC_EA_WRREQ[10]) + TCC_EA_WRREQ[11]) + TCC_EA_WRREQ[12]) - + TCC_EA_WRREQ[13]) + TCC_EA_WRREQ[14]) + TCC_EA_WRREQ[15]) + TCC_EA_WRREQ[16]) - + TCC_EA_WRREQ[17]) + TCC_EA_WRREQ[18]) + TCC_EA_WRREQ[19]) + TCC_EA_WRREQ[20]) - + TCC_EA_WRREQ[21]) + TCC_EA_WRREQ[22]) + TCC_EA_WRREQ[23]) + TCC_EA_WRREQ[24]) - + TCC_EA_WRREQ[25]) + TCC_EA_WRREQ[26]) + TCC_EA_WRREQ[27]) + TCC_EA_WRREQ[28]) - + TCC_EA_WRREQ[29]) + TCC_EA_WRREQ[30]) + TCC_EA_WRREQ[31]) != 0) else None)) - unit: Cycles - tips: - L2 - EA Atomic Lat: - avg: AVG((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) - + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) - + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) - + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) - + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) - + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) - + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) - + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) - + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) - + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) - + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) - + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) - + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) - + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) - + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) - + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) - + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) - + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) - + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] - + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) - + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) - + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) - + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) - + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) - + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) - + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) - + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else - None)) - std dev: STD((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) - + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) - + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) - + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) - + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) - + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) - + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) - + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) - + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) - + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) - + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) - + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) - + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) - + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) - + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) - + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) - + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) - + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) - + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] - + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) - + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) - + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) - + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) - + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) - + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) - + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) - + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else - None)) - min: MIN((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) - + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) - + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) - + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) - + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) - + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) - + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) - + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) - + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) - + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) - + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) - + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) - + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) - + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) - + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) - + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) - + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) - + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) - + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] - + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) - + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) - + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) - + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) - + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) - + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) - + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) - + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else - None)) - max: MAX((((((((((((((((((((((((((((((((((TCC_EA_ATOMIC_LEVEL[0] + TCC_EA_ATOMIC_LEVEL[1]) - + TCC_EA_ATOMIC_LEVEL[2]) + TCC_EA_ATOMIC_LEVEL[3]) + TCC_EA_ATOMIC_LEVEL[4]) - + TCC_EA_ATOMIC_LEVEL[5]) + TCC_EA_ATOMIC_LEVEL[6]) + TCC_EA_ATOMIC_LEVEL[7]) - + TCC_EA_ATOMIC_LEVEL[8]) + TCC_EA_ATOMIC_LEVEL[9]) + TCC_EA_ATOMIC_LEVEL[10]) - + TCC_EA_ATOMIC_LEVEL[11]) + TCC_EA_ATOMIC_LEVEL[12]) + TCC_EA_ATOMIC_LEVEL[13]) - + TCC_EA_ATOMIC_LEVEL[14]) + TCC_EA_ATOMIC_LEVEL[15]) + TCC_EA_ATOMIC_LEVEL[16]) - + TCC_EA_ATOMIC_LEVEL[17]) + TCC_EA_ATOMIC_LEVEL[18]) + TCC_EA_ATOMIC_LEVEL[19]) - + TCC_EA_ATOMIC_LEVEL[20]) + TCC_EA_ATOMIC_LEVEL[21]) + TCC_EA_ATOMIC_LEVEL[22]) - + TCC_EA_ATOMIC_LEVEL[23]) + TCC_EA_ATOMIC_LEVEL[24]) + TCC_EA_ATOMIC_LEVEL[25]) - + TCC_EA_ATOMIC_LEVEL[26]) + TCC_EA_ATOMIC_LEVEL[27]) + TCC_EA_ATOMIC_LEVEL[28]) - + TCC_EA_ATOMIC_LEVEL[29]) + TCC_EA_ATOMIC_LEVEL[30]) + TCC_EA_ATOMIC_LEVEL[31]) - / (((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) - + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) - + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) - + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) - + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) - + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) - + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) - + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) - + TCC_EA_ATOMIC[31])) if ((((((((((((((((((((((((((((((((TCC_EA_ATOMIC[0] - + TCC_EA_ATOMIC[1]) + TCC_EA_ATOMIC[2]) + TCC_EA_ATOMIC[3]) + TCC_EA_ATOMIC[4]) - + TCC_EA_ATOMIC[5]) + TCC_EA_ATOMIC[6]) + TCC_EA_ATOMIC[7]) + TCC_EA_ATOMIC[8]) - + TCC_EA_ATOMIC[9]) + TCC_EA_ATOMIC[10]) + TCC_EA_ATOMIC[11]) + TCC_EA_ATOMIC[12]) - + TCC_EA_ATOMIC[13]) + TCC_EA_ATOMIC[14]) + TCC_EA_ATOMIC[15]) + TCC_EA_ATOMIC[16]) - + TCC_EA_ATOMIC[17]) + TCC_EA_ATOMIC[18]) + TCC_EA_ATOMIC[19]) + TCC_EA_ATOMIC[20]) - + TCC_EA_ATOMIC[21]) + TCC_EA_ATOMIC[22]) + TCC_EA_ATOMIC[23]) + TCC_EA_ATOMIC[24]) - + TCC_EA_ATOMIC[25]) + TCC_EA_ATOMIC[26]) + TCC_EA_ATOMIC[27]) + TCC_EA_ATOMIC[28]) - + TCC_EA_ATOMIC[29]) + TCC_EA_ATOMIC[30]) + TCC_EA_ATOMIC[31]) != 0) else - None)) - unit: Cycles - tips: - L2 - EA Read Stall (IO): - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - L2 - EA Read Stall (GMI): - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - L2 - EA Read Stall (DRAM): - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - L2 - EA Write Stall (IO): - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - L2 - EA Write Stall (GMI): - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - L2 - EA Write Stall (DRAM): - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29])) + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30])) - + TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - L2 - EA Write Starve: - avg: AVG((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) - std dev: STD((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) - min: MIN((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) - max: MAX((((((((((((((((((((((((((((((((((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29])) + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30])) - + TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31])) / 32) / $denom)) - unit: (Cycles + $normUnit) - tips: - - metric_table: - id: 1802 - title: Channel 0-15 - columnwise: True - header: - channel: Channel - hit rate: L2 Cache Hit Rate (%) - req: Requests (Requests) - read req: L1-L2 Read (Requests) - write req: L1-L2 Write (Requests) - atomic req: L1-L2 Atomic (Requests) - ea read req: L2-EA Read (Requests) - ea write req: L2-EA Write (Requests) - ea atomic req: L2-EA Atomic (Requests) - ea read lat - cycles: L2-EA Read Latency (Cycles) - ea write lat - cycles: L2-EA Write Latency (Cycles) - ea atomic lat - cycles: L2-EA Atomic Latency (Cycles) - ea read stall - io: L2-EA Read Stall - IO (Cycles per) - ea read stall - gmi: L2-EA Read Stall - GMI (Cycles per) - ea read stall - dram: L2-EA Read Stall - DRAM (Cycles per) - ea write stall - io: L2-EA Write Stall - IO (Cycles per) - ea write stall - gmi: L2-EA Write Stall - GMI (Cycles per) - ea write stall - dram: L2-EA Write Stall - DRAM (Cycles per) - ea write stall - starve: L2-EA Write Stall - Starve (Cycles per) - tips: Tips - metric: - '0': - hit rate: AVG((((100 * TCC_HIT[0]) / (TCC_HIT[0] + TCC_MISS[0])) if ((TCC_HIT[0] - + TCC_MISS[0]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[0]) / $denom)) - read req: AVG((TO_INT(TCC_READ[0]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[0]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[0]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[0]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[0]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[0]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[0] / TCC_EA_RDREQ[0]) if (TCC_EA_RDREQ[0] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[0] / TCC_EA_WRREQ[0]) if (TCC_EA_WRREQ[0] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[0] / TCC_EA_ATOMIC[0]) if - (TCC_EA_ATOMIC[0] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[0]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[0]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[0]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[0]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[0]) / $denom)) - tips: - '1': - hit rate: AVG((((100 * TCC_HIT[1]) / (TCC_HIT[1] + TCC_MISS[1])) if ((TCC_HIT[1] - + TCC_MISS[1]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[1]) / $denom)) - read req: AVG((TO_INT(TCC_READ[1]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[1]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[1]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[1]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[1]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[1]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[1] / TCC_EA_RDREQ[1]) if (TCC_EA_RDREQ[1] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[1] / TCC_EA_WRREQ[1]) if (TCC_EA_WRREQ[1] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[1] / TCC_EA_ATOMIC[1]) if - (TCC_EA_ATOMIC[1] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[1]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[1]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[1]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[1]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[1]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[1]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[1]) / $denom)) - tips: - '2': - hit rate: AVG((((100 * TCC_HIT[2]) / (TCC_HIT[2] + TCC_MISS[2])) if ((TCC_HIT[2] - + TCC_MISS[2]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[2]) / $denom)) - read req: AVG((TO_INT(TCC_READ[2]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[2]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[2]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[2]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[2]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[2]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[2] / TCC_EA_RDREQ[2]) if (TCC_EA_RDREQ[2] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[2] / TCC_EA_WRREQ[2]) if (TCC_EA_WRREQ[2] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[2] / TCC_EA_ATOMIC[2]) if - (TCC_EA_ATOMIC[2] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[2]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[2]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[2]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[2]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[2]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[2]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[2]) / $denom)) - tips: - '3': - hit rate: AVG((((100 * TCC_HIT[3]) / (TCC_HIT[3] + TCC_MISS[3])) if ((TCC_HIT[3] - + TCC_MISS[3]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[3]) / $denom)) - read req: AVG((TO_INT(TCC_READ[3]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[3]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[3]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[3]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[3]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[3]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[3] / TCC_EA_RDREQ[3]) if (TCC_EA_RDREQ[3] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[3] / TCC_EA_WRREQ[3]) if (TCC_EA_WRREQ[3] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[3] / TCC_EA_ATOMIC[3]) if - (TCC_EA_ATOMIC[3] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[3]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[3]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[3]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[3]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[3]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[3]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[3]) / $denom)) - tips: - '4': - hit rate: AVG((((100 * TCC_HIT[4]) / (TCC_HIT[4] + TCC_MISS[4])) if ((TCC_HIT[4] - + TCC_MISS[4]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[4]) / $denom)) - read req: AVG((TO_INT(TCC_READ[4]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[4]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[4]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[4]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[4]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[4]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[4] / TCC_EA_RDREQ[4]) if (TCC_EA_RDREQ[4] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[4] / TCC_EA_WRREQ[4]) if (TCC_EA_WRREQ[4] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[4] / TCC_EA_ATOMIC[4]) if - (TCC_EA_ATOMIC[4] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[4]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[4]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[4]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[4]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[4]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[4]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[4]) / $denom)) - tips: - '5': - hit rate: AVG((((100 * TCC_HIT[5]) / (TCC_HIT[5] + TCC_MISS[5])) if ((TCC_HIT[5] - + TCC_MISS[5]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[5]) / $denom)) - read req: AVG((TO_INT(TCC_READ[5]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[5]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[5]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[5]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[5]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[5]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[5] / TCC_EA_RDREQ[5]) if (TCC_EA_RDREQ[5] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[5] / TCC_EA_WRREQ[5]) if (TCC_EA_WRREQ[5] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[5] / TCC_EA_ATOMIC[5]) if - (TCC_EA_ATOMIC[5] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[5]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[5]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[5]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[5]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[5]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[5]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[5]) / $denom)) - tips: - '6': - hit rate: AVG((((100 * TCC_HIT[6]) / (TCC_HIT[6] + TCC_MISS[6])) if ((TCC_HIT[6] - + TCC_MISS[6]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[6]) / $denom)) - read req: AVG((TO_INT(TCC_READ[6]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[6]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[6]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[6]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[6]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[6]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[6] / TCC_EA_RDREQ[6]) if (TCC_EA_RDREQ[6] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[6] / TCC_EA_WRREQ[6]) if (TCC_EA_WRREQ[6] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[6] / TCC_EA_ATOMIC[6]) if - (TCC_EA_ATOMIC[6] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[6]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[6]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[6]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[6]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[6]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[6]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[6]) / $denom)) - tips: - '7': - hit rate: AVG((((100 * TCC_HIT[7]) / (TCC_HIT[7] + TCC_MISS[7])) if ((TCC_HIT[7] - + TCC_MISS[7]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[7]) / $denom)) - read req: AVG((TO_INT(TCC_READ[7]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[7]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[7]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[7]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[7]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[7]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[7] / TCC_EA_RDREQ[7]) if (TCC_EA_RDREQ[7] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[7] / TCC_EA_WRREQ[7]) if (TCC_EA_WRREQ[7] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[7] / TCC_EA_ATOMIC[7]) if - (TCC_EA_ATOMIC[7] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[7]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[7]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[7]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[7]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[7]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[7]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[7]) / $denom)) - tips: - '8': - hit rate: AVG((((100 * TCC_HIT[8]) / (TCC_HIT[8] + TCC_MISS[8])) if ((TCC_HIT[8] - + TCC_MISS[8]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[8]) / $denom)) - read req: AVG((TO_INT(TCC_READ[8]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[8]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[8]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[8]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[8]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[8]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[8] / TCC_EA_RDREQ[8]) if (TCC_EA_RDREQ[8] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[8] / TCC_EA_WRREQ[8]) if (TCC_EA_WRREQ[8] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[8] / TCC_EA_ATOMIC[8]) if - (TCC_EA_ATOMIC[8] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[8]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[8]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[8]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[8]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[8]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[8]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[8]) / $denom)) - tips: - '9': - hit rate: AVG((((100 * TCC_HIT[9]) / (TCC_HIT[9] + TCC_MISS[9])) if ((TCC_HIT[9] - + TCC_MISS[9]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[9]) / $denom)) - read req: AVG((TO_INT(TCC_READ[9]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[9]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[9]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[9]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[9]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[9]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[9] / TCC_EA_RDREQ[9]) if (TCC_EA_RDREQ[9] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[9] / TCC_EA_WRREQ[9]) if (TCC_EA_WRREQ[9] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[9] / TCC_EA_ATOMIC[9]) if - (TCC_EA_ATOMIC[9] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[9]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[9]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[9]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[9]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[9]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[9]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[9]) / $denom)) - tips: - '10': - hit rate: AVG((((100 * TCC_HIT[10]) / (TCC_HIT[10] + TCC_MISS[10])) if ((TCC_HIT[10] - + TCC_MISS[10]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[10]) / $denom)) - read req: AVG((TO_INT(TCC_READ[10]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[10]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[10]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[10]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[10]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[10]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[10] / TCC_EA_RDREQ[10]) if (TCC_EA_RDREQ[10] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[10] / TCC_EA_WRREQ[10]) if (TCC_EA_WRREQ[10] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[10] / TCC_EA_ATOMIC[10]) if - (TCC_EA_ATOMIC[10] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[10]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[10]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[10]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[10]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[10]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[10]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[10]) / $denom)) - tips: - '11': - hit rate: AVG((((100 * TCC_HIT[11]) / (TCC_HIT[11] + TCC_MISS[11])) if ((TCC_HIT[11] - + TCC_MISS[11]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[11]) / $denom)) - read req: AVG((TO_INT(TCC_READ[11]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[11]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[11]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[11]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[11]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[11]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[11] / TCC_EA_RDREQ[11]) if (TCC_EA_RDREQ[11] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[11] / TCC_EA_WRREQ[11]) if (TCC_EA_WRREQ[11] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[11] / TCC_EA_ATOMIC[11]) if - (TCC_EA_ATOMIC[11] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[11]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[11]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[11]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[11]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[11]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[11]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[11]) / $denom)) - tips: - '12': - hit rate: AVG((((100 * TCC_HIT[12]) / (TCC_HIT[12] + TCC_MISS[12])) if ((TCC_HIT[12] - + TCC_MISS[12]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[12]) / $denom)) - read req: AVG((TO_INT(TCC_READ[12]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[12]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[12]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[12]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[12]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[12]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[12] / TCC_EA_RDREQ[12]) if (TCC_EA_RDREQ[12] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[12] / TCC_EA_WRREQ[12]) if (TCC_EA_WRREQ[12] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[12] / TCC_EA_ATOMIC[12]) if - (TCC_EA_ATOMIC[12] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[12]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[12]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[12]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[12]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[12]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[12]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[12]) / $denom)) - tips: - '13': - hit rate: AVG((((100 * TCC_HIT[13]) / (TCC_HIT[13] + TCC_MISS[13])) if ((TCC_HIT[13] - + TCC_MISS[13]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[13]) / $denom)) - read req: AVG((TO_INT(TCC_READ[13]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[13]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[13]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[13]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[13]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[13]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[13] / TCC_EA_RDREQ[13]) if (TCC_EA_RDREQ[13] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[13] / TCC_EA_WRREQ[13]) if (TCC_EA_WRREQ[13] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[13] / TCC_EA_ATOMIC[13]) if - (TCC_EA_ATOMIC[13] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[13]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[13]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[13]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[13]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[13]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[13]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[13]) / $denom)) - tips: - '14': - hit rate: AVG((((100 * TCC_HIT[14]) / (TCC_HIT[14] + TCC_MISS[14])) if ((TCC_HIT[14] - + TCC_MISS[14]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[14]) / $denom)) - read req: AVG((TO_INT(TCC_READ[14]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[14]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[14]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[14]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[14]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[14]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[14] / TCC_EA_RDREQ[14]) if (TCC_EA_RDREQ[14] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[14] / TCC_EA_WRREQ[14]) if (TCC_EA_WRREQ[14] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[14] / TCC_EA_ATOMIC[14]) if - (TCC_EA_ATOMIC[14] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[14]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[14]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[14]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[14]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[14]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[14]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[14]) / $denom)) - tips: - '15': - hit rate: AVG((((100 * TCC_HIT[15]) / (TCC_HIT[15] + TCC_MISS[15])) if ((TCC_HIT[15] - + TCC_MISS[15]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[15]) / $denom)) - read req: AVG((TO_INT(TCC_READ[15]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[15]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[15]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[15]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[15]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[15]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[15] / TCC_EA_RDREQ[15]) if (TCC_EA_RDREQ[15] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[15] / TCC_EA_WRREQ[15]) if (TCC_EA_WRREQ[15] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[15] / TCC_EA_ATOMIC[15]) if - (TCC_EA_ATOMIC[15] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[15]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[15]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[15]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[15]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[15]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[15]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[15]) / $denom)) - tips: - - metric_table: - id: 1803 - title: Channel 16-31 - columnwise: True - header: - channel: Channel - hit rate: L2 Cache Hit Rate (%) - req: Requests (Requests) - read req: L1-L2 Read (Requests) - write req: L1-L2 Write (Requests) - atomic req: L1-L2 Atomic (Requests) - ea read req: L2-EA Read (Requests) - ea write req: L2-EA Write (Requests) - ea atomic req: L2-EA Atomic (Requests) - ea read lat - cycles: L2-EA Read Latency (Cycles) - ea write lat - cycles: L2-EA Write Latency (Cycles) - ea atomic lat - cycles: L2-EA Atomic Latency (Cycles) - ea read stall - io: L2-EA Read Stall - IO (Cycles per) - ea read stall - gmi: L2-EA Read Stall - GMI (Cycles per) - ea read stall - dram: L2-EA Read Stall - DRAM (Cycles per) - ea write stall - io: L2-EA Write Stall - IO (Cycles per) - ea write stall - gmi: L2-EA Write Stall - GMI (Cycles per) - ea write stall - dram: L2-EA Write Stall - DRAM (Cycles per) - ea write stall - starve: L2-EA Write Stall - Starve (Cycles per) - tips: Tips - metric: - '16': - hit rate: AVG((((100 * TCC_HIT[16]) / (TCC_HIT[16] + TCC_MISS[16])) if ((TCC_HIT[16] - + TCC_MISS[16]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[16]) / $denom)) - read req: AVG((TO_INT(TCC_READ[16]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[16]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[16]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[16]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[16]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[16]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[16] / TCC_EA_RDREQ[16]) if (TCC_EA_RDREQ[16] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[16] / TCC_EA_WRREQ[16]) if (TCC_EA_WRREQ[16] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[16] / TCC_EA_ATOMIC[16]) if - (TCC_EA_ATOMIC[16] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[16]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[16]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[16]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[16]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[16]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[16]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[16]) / $denom)) - tips: - '17': - hit rate: AVG((((100 * TCC_HIT[17]) / (TCC_HIT[17] + TCC_MISS[17])) if ((TCC_HIT[17] - + TCC_MISS[17]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[17]) / $denom)) - read req: AVG((TO_INT(TCC_READ[17]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[17]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[17]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[17]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[17]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[17]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[17] / TCC_EA_RDREQ[17]) if (TCC_EA_RDREQ[17] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[17] / TCC_EA_WRREQ[17]) if (TCC_EA_WRREQ[17] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[17] / TCC_EA_ATOMIC[17]) if - (TCC_EA_ATOMIC[17] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[17]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[17]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[17]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[17]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[17]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[17]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[17]) / $denom)) - tips: - '18': - hit rate: AVG((((100 * TCC_HIT[18]) / (TCC_HIT[18] + TCC_MISS[18])) if ((TCC_HIT[18] - + TCC_MISS[18]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[18]) / $denom)) - read req: AVG((TO_INT(TCC_READ[18]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[18]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[18]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[18]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[18]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[18]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[18] / TCC_EA_RDREQ[18]) if (TCC_EA_RDREQ[18] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[18] / TCC_EA_WRREQ[18]) if (TCC_EA_WRREQ[18] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[18] / TCC_EA_ATOMIC[18]) if - (TCC_EA_ATOMIC[18] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[18]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[18]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[18]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[18]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[18]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[18]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[18]) / $denom)) - tips: - '19': - hit rate: AVG((((100 * TCC_HIT[19]) / (TCC_HIT[19] + TCC_MISS[19])) if ((TCC_HIT[19] - + TCC_MISS[19]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[19]) / $denom)) - read req: AVG((TO_INT(TCC_READ[19]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[19]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[19]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[19]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[19]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[19]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[19] / TCC_EA_RDREQ[19]) if (TCC_EA_RDREQ[19] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[19] / TCC_EA_WRREQ[19]) if (TCC_EA_WRREQ[19] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[19] / TCC_EA_ATOMIC[19]) if - (TCC_EA_ATOMIC[19] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[19]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[19]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[19]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[19]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[19]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[19]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[19]) / $denom)) - tips: - '20': - hit rate: AVG((((100 * TCC_HIT[20]) / (TCC_HIT[20] + TCC_MISS[20])) if ((TCC_HIT[20] - + TCC_MISS[20]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[20]) / $denom)) - read req: AVG((TO_INT(TCC_READ[20]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[20]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[20]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[20]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[20]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[20]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[20] / TCC_EA_RDREQ[20]) if (TCC_EA_RDREQ[20] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[20] / TCC_EA_WRREQ[20]) if (TCC_EA_WRREQ[20] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[20] / TCC_EA_ATOMIC[20]) if - (TCC_EA_ATOMIC[20] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[20]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[20]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[20]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[20]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[20]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[20]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[20]) / $denom)) - tips: - '21': - hit rate: AVG((((100 * TCC_HIT[21]) / (TCC_HIT[21] + TCC_MISS[21])) if ((TCC_HIT[21] - + TCC_MISS[21]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[21]) / $denom)) - read req: AVG((TO_INT(TCC_READ[21]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[21]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[21]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[21]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[21]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[21]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[21] / TCC_EA_RDREQ[21]) if (TCC_EA_RDREQ[21] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[21] / TCC_EA_WRREQ[21]) if (TCC_EA_WRREQ[21] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[21] / TCC_EA_ATOMIC[21]) if - (TCC_EA_ATOMIC[21] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[21]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[21]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[21]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[21]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[21]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[21]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[21]) / $denom)) - tips: - '22': - hit rate: AVG((((100 * TCC_HIT[22]) / (TCC_HIT[22] + TCC_MISS[22])) if ((TCC_HIT[22] - + TCC_MISS[22]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[22]) / $denom)) - read req: AVG((TO_INT(TCC_READ[22]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[22]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[22]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[22]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[22]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[22]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[22] / TCC_EA_RDREQ[22]) if (TCC_EA_RDREQ[22] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[22] / TCC_EA_WRREQ[22]) if (TCC_EA_WRREQ[22] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[22] / TCC_EA_ATOMIC[22]) if - (TCC_EA_ATOMIC[22] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[22]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[22]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[22]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[22]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[22]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[22]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[22]) / $denom)) - tips: - '23': - hit rate: AVG((((100 * TCC_HIT[23]) / (TCC_HIT[23] + TCC_MISS[23])) if ((TCC_HIT[23] - + TCC_MISS[23]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[23]) / $denom)) - read req: AVG((TO_INT(TCC_READ[23]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[23]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[23]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[23]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[23]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[23]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[23] / TCC_EA_RDREQ[23]) if (TCC_EA_RDREQ[23] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[23] / TCC_EA_WRREQ[23]) if (TCC_EA_WRREQ[23] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[23] / TCC_EA_ATOMIC[23]) if - (TCC_EA_ATOMIC[23] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[23]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[23]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[23]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[23]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[23]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[23]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[23]) / $denom)) - tips: - '24': - hit rate: AVG((((100 * TCC_HIT[24]) / (TCC_HIT[24] + TCC_MISS[24])) if ((TCC_HIT[24] - + TCC_MISS[24]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[24]) / $denom)) - read req: AVG((TO_INT(TCC_READ[24]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[24]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[24]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[24]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[24]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[24]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[24] / TCC_EA_RDREQ[24]) if (TCC_EA_RDREQ[24] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[24] / TCC_EA_WRREQ[24]) if (TCC_EA_WRREQ[24] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[24] / TCC_EA_ATOMIC[24]) if - (TCC_EA_ATOMIC[24] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[24]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[24]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[24]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[24]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[24]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[24]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[24]) / $denom)) - tips: - '25': - hit rate: AVG((((100 * TCC_HIT[25]) / (TCC_HIT[25] + TCC_MISS[25])) if ((TCC_HIT[25] - + TCC_MISS[25]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[25]) / $denom)) - read req: AVG((TO_INT(TCC_READ[25]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[25]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[25]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[25]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[25]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[25]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[25] / TCC_EA_RDREQ[25]) if (TCC_EA_RDREQ[25] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[25] / TCC_EA_WRREQ[25]) if (TCC_EA_WRREQ[25] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[25] / TCC_EA_ATOMIC[25]) if - (TCC_EA_ATOMIC[25] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[25]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[25]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[25]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[25]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[25]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[25]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[25]) / $denom)) - tips: - '26': - hit rate: AVG((((100 * TCC_HIT[26]) / (TCC_HIT[26] + TCC_MISS[26])) if ((TCC_HIT[26] - + TCC_MISS[26]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[26]) / $denom)) - read req: AVG((TO_INT(TCC_READ[26]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[26]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[26]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[26]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[26]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[26]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[26] / TCC_EA_RDREQ[26]) if (TCC_EA_RDREQ[26] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[26] / TCC_EA_WRREQ[26]) if (TCC_EA_WRREQ[26] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[26] / TCC_EA_ATOMIC[26]) if - (TCC_EA_ATOMIC[26] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[26]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[26]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[26]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[26]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[26]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[26]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[26]) / $denom)) - tips: - '27': - hit rate: AVG((((100 * TCC_HIT[27]) / (TCC_HIT[27] + TCC_MISS[27])) if ((TCC_HIT[27] - + TCC_MISS[27]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[27]) / $denom)) - read req: AVG((TO_INT(TCC_READ[27]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[27]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[27]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[27]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[27]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[27]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[27] / TCC_EA_RDREQ[27]) if (TCC_EA_RDREQ[27] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[27] / TCC_EA_WRREQ[27]) if (TCC_EA_WRREQ[27] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[27] / TCC_EA_ATOMIC[27]) if - (TCC_EA_ATOMIC[27] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[27]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[27]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[27]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[27]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[27]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[27]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[27]) / $denom)) - tips: - '28': - hit rate: AVG((((100 * TCC_HIT[28]) / (TCC_HIT[28] + TCC_MISS[28])) if ((TCC_HIT[28] - + TCC_MISS[28]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[28]) / $denom)) - read req: AVG((TO_INT(TCC_READ[28]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[28]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[28]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[28]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[28]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[28]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[28] / TCC_EA_RDREQ[28]) if (TCC_EA_RDREQ[28] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[28] / TCC_EA_WRREQ[28]) if (TCC_EA_WRREQ[28] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[28] / TCC_EA_ATOMIC[28]) if - (TCC_EA_ATOMIC[28] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[28]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[28]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[28]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[28]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[28]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[28]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[28]) / $denom)) - tips: - '29': - hit rate: AVG((((100 * TCC_HIT[29]) / (TCC_HIT[29] + TCC_MISS[29])) if ((TCC_HIT[29] - + TCC_MISS[29]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[29]) / $denom)) - read req: AVG((TO_INT(TCC_READ[29]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[29]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[29]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[29]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[29]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[29]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[29] / TCC_EA_RDREQ[29]) if (TCC_EA_RDREQ[29] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[29] / TCC_EA_WRREQ[29]) if (TCC_EA_WRREQ[29] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[29] / TCC_EA_ATOMIC[29]) if - (TCC_EA_ATOMIC[29] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[29]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[29]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[29]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[29]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[29]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[29]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[29]) / $denom)) - tips: - '30': - hit rate: AVG((((100 * TCC_HIT[30]) / (TCC_HIT[30] + TCC_MISS[30])) if ((TCC_HIT[30] - + TCC_MISS[30]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[30]) / $denom)) - read req: AVG((TO_INT(TCC_READ[30]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[30]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[30]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[30]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[30]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[30]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[30] / TCC_EA_RDREQ[30]) if (TCC_EA_RDREQ[30] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[30] / TCC_EA_WRREQ[30]) if (TCC_EA_WRREQ[30] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[30] / TCC_EA_ATOMIC[30]) if - (TCC_EA_ATOMIC[30] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[30]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[30]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[30]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[30]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[30]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[30]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[30]) / $denom)) - tips: - '31': - hit rate: AVG((((100 * TCC_HIT[31]) / (TCC_HIT[31] + TCC_MISS[31])) if ((TCC_HIT[31] - + TCC_MISS[31]) != 0) else None)) - req: AVG((TO_INT(TCC_REQ[31]) / $denom)) - read req: AVG((TO_INT(TCC_READ[31]) / $denom)) - write req: AVG((TO_INT(TCC_WRITE[31]) / $denom)) - atomic req: AVG((TO_INT(TCC_ATOMIC[31]) / $denom)) - ea read req: AVG((TO_INT(TCC_EA_RDREQ[31]) / $denom)) - ea write req: AVG((TO_INT(TCC_EA_WRREQ[31]) / $denom)) - ea atomic req: AVG((TO_INT(TCC_EA_ATOMIC[31]) / $denom)) - ea read lat - cycles: AVG(((TCC_EA_RDREQ_LEVEL[31] / TCC_EA_RDREQ[31]) if (TCC_EA_RDREQ[31] - != 0) else None)) - ea write lat - cycles: AVG(((TCC_EA_WRREQ_LEVEL[31] / TCC_EA_WRREQ[31]) if (TCC_EA_WRREQ[31] - != 0) else None)) - ea atomic lat - cycles: AVG(((TCC_EA_ATOMIC_LEVEL[31] / TCC_EA_ATOMIC[31]) if - (TCC_EA_ATOMIC[31] != 0) else None)) - ea read stall - io: AVG((TO_INT(TCC_EA_RDREQ_IO_CREDIT_STALL[31]) / $denom)) - ea read stall - gmi: AVG((TO_INT(TCC_EA_RDREQ_GMI_CREDIT_STALL[31]) / $denom)) - ea read stall - dram: AVG((TO_INT(TCC_EA_RDREQ_DRAM_CREDIT_STALL[31]) / $denom)) - ea write stall - io: AVG((TO_INT(TCC_EA_WRREQ_IO_CREDIT_STALL[31]) / $denom)) - ea write stall - gmi: AVG((TO_INT(TCC_EA_WRREQ_GMI_CREDIT_STALL[31]) / $denom)) - ea write stall - dram: AVG((TO_INT(TCC_EA_WRREQ_DRAM_CREDIT_STALL[31]) / $denom)) - ea write stall - starve: AVG((TO_INT(TCC_TOO_MANY_EA_WRREQS_STALL[31]) / $denom)) - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1900_memory_chart.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/1900_memory_chart.yaml deleted file mode 100644 index c0d086f121..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/1900_memory_chart.yaml +++ /dev/null @@ -1,259 +0,0 @@ ---- -# Add description/tips for each metric in this section. -# So it could be shown in hover. -Metric Description: - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 1900 - title: Memory Chart Analysis - data source: - - metric_table: - id: 1901 - title: # subtitle for this table(optional) - header: - metric: Metric - value: Value - alias: Alias - tips: Tips - metric: - Wave Life: - value: ROUND(AVG(((4 * (SQ_WAVE_CYCLES / SQ_WAVES)) if (SQ_WAVES != 0) else - None)), 0) - alias: wave_life_ - tips: - Active CUs: - value: CONCAT(CONCAT($numActiveCUs, "/"), $numCU) - alias: active_cu_ - tips: - SALU: - value: ROUND(AVG((SQ_INSTS_SALU / $denom)), 0) - alias: salu_ - tips: - SMEM: - value: ROUND(AVG((SQ_INSTS_SMEM / $denom)), 0) - alias: smem_ - tips: - VALU: - value: ROUND(AVG((SQ_INSTS_VALU / $denom)), 0) - alias: valu_ - tips: - MFMA: - value: ROUND(AVG((SQ_INSTS_MFMA / $denom)), 0) - alias: mfma_ - tips: - VMEM: - value: ROUND(AVG((SQ_INSTS_VMEM / $denom)), 0) - alias: vmem_ - tips: - LDS: - value: ROUND(AVG((SQ_INSTS_LDS / $denom)), 0) - alias: lds_ - tips: - GWS: - value: ROUND(AVG((SQ_INSTS_GDS / $denom)), 0) - alias: gws_ - tips: - BR: - value: ROUND(AVG((SQ_INSTS_BRANCH / $denom)), 0) - alias: br_ - tips: - VGPR: - value: ROUND(AVG(vgpr), 0) - alias: vgpr_ - tips: - SGPR: - value: ROUND(AVG(sgpr), 0) - alias: sgpr_ - tips: - LDS Allocation: - value: ROUND(AVG(lds), 0) - alias: lds_alloc_ - tips: - Scratch Allocation: - value: ROUND(AVG(scr), 0) - alias: scratch_alloc_ - tips: - Wavefronts: - value: ROUND(AVG(SPI_CSN_WAVE), 0) - alias: wavefronts_ - tips: - Workgroups: - value: ROUND(AVG(SPI_CSN_NUM_THREADGROUPS), 0) - alias: workgroups_ - tips: - LDS Req: - value: ROUND(AVG((SQ_INSTS_LDS / $denom)), 0) - alias: lds_req_ - tips: - IL1 Fetch: - value: ROUND(AVG((SQC_ICACHE_REQ / $denom)), 0) - alias: il1_fetch_ - tips: - IL1 Hit: - value: ROUND((AVG((SQC_ICACHE_HITS / SQC_ICACHE_REQ)) * 100), 0) - alias: il1_hit_ - tips: - IL1_L2 Rd: - value: ROUND(AVG((SQC_TC_INST_REQ / $denom)), 0) - alias: il1_l2_req_ - tips: - vL1D Rd: - value: ROUND(AVG((SQC_DCACHE_REQ / $denom)), 0) - alias: sl1_rd_ - tips: - vL1D Hit: - value: ROUND((AVG(((SQC_DCACHE_HITS / SQC_DCACHE_REQ) if (SQC_DCACHE_REQ != - 0) else None)) * 100), 0) - alias: sl1_hit_ - tips: - vL1D_L2 Rd: - value: ROUND(AVG((SQC_TC_DATA_READ_REQ / $denom)), 0) - alias: sl1_l2_rd_ - tips: - vL1D_L2 Wr: - value: ROUND(AVG((SQC_TC_DATA_WRITE_REQ / $denom)), 0) - alias: sl1_l2_wr_ - tips: - vL1D_L2 Atomic: - value: ROUND(AVG((SQC_TC_DATA_ATOMIC_REQ / $denom)), 0) - alias: sl1_l2_atom_ - tips: - VL1 Rd: - value: ROUND(AVG((TCP_TOTAL_READ_sum / $denom)), 0) - alias: vl1_rd_ - tips: - VL1 Wr: - value: ROUND(AVG((TCP_TOTAL_WRITE_sum / $denom)), 0) - alias: vl1_wr_ - tips: - VL1 Atomic: - value: ROUND(AVG(((TCP_TOTAL_ATOMIC_WITH_RET_sum + TCP_TOTAL_ATOMIC_WITHOUT_RET_sum) - / $denom)), 0) - alias: vl1_atom_ - tips: - VL1 Hit: - value: ROUND(AVG(((100 - ((100 * (((TCP_TCC_READ_REQ_sum + TCP_TCC_WRITE_REQ_sum) - + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) - / TCP_TOTAL_CACHE_ACCESSES_sum)) if (TCP_TOTAL_CACHE_ACCESSES_sum != 0) else - None)), 0) - alias: vl1_hit_ - tips: - VL1 Lat: - value: ROUND(AVG(((TCP_TCP_LATENCY_sum / TCP_TA_TCP_STATE_READ_sum) if (TCP_TA_TCP_STATE_READ_sum - != 0) else None)), 0) - alias: vl1_lat_ - tips: - VL1_L2 Rd: - value: ROUND(AVG((TCP_TCC_READ_REQ_sum / $denom)), 0) - alias: vl1_l2_rd_ - tips: - VL1_L2 Wr: - value: ROUND(AVG((TCP_TCC_WRITE_REQ_sum / $denom)), 0) - alias: vl1_l2_wr_ - tips: - vL1_L2 Atomic: - value: ROUND(AVG(((TCP_TCC_ATOMIC_WITH_RET_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - / $denom)), 0) - alias: vl1_l2_atom_ - tips: - L2 Rd: - value: ROUND(AVG((TCC_READ_sum / $denom)), 0) - alias: l2_rd_ - tips: - L2 Wr: - value: ROUND(AVG((TCC_WRITE_sum / $denom)), 0) - alias: l2_wr_ - tips: - L2 Atomic: - value: ROUND(AVG((TCC_ATOMIC_sum / $denom)), 0) - alias: l2_atom_ - tips: - L2 Hit: - value: ROUND(AVG((((100 * TCC_HIT_sum) / (TCC_HIT_sum + TCC_MISS_sum)) if ((TCC_HIT_sum - + TCC_MISS_sum) != 0) else None)), 0) - alias: l2_hit_ - tips: - L2 Rd Lat: - value: ROUND(AVG(((TCP_TCC_READ_REQ_LATENCY_sum / (TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum)) - if ((TCP_TCC_READ_REQ_sum + TCP_TCC_ATOMIC_WITH_RET_REQ_sum) != 0) else None)), - 0) - alias: l2_rd_lat_ - tips: - L2 Wr Lat: - value: ROUND(AVG(((TCP_TCC_WRITE_REQ_LATENCY_sum / (TCP_TCC_WRITE_REQ_sum + - TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum)) if ((TCP_TCC_WRITE_REQ_sum + TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum) - != 0) else None)), 0) - alias: l2_wr_lat_ - tips: - Fabric Rd Lat: - value: ROUND(AVG(((TCC_EA_RDREQ_LEVEL_sum / TCC_EA_RDREQ_sum) if (TCC_EA_RDREQ_sum - != 0) else None)), 0) - alias: fabric_rd_lat_ - tips: - Fabric Wr Lat: - value: ROUND(AVG(((TCC_EA_WRREQ_LEVEL_sum / TCC_EA_WRREQ_sum) if (TCC_EA_WRREQ_sum - != 0) else None)), 0) - alias: fabric_wr_lat_ - tips: - Fabric Atomic Lat: - value: ROUND(AVG(((TCC_EA_ATOMIC_LEVEL_sum / TCC_EA_ATOMIC_sum) if (TCC_EA_ATOMIC_sum - != 0) else None)), 0) - alias: fabric_atom_lat_ - tips: - Fabric_L2 Rd: - value: ROUND(AVG((TCC_EA_RDREQ_sum / $denom)), 0) - alias: l2_fabric_rd_ - tips: - Fabric_L2 Wr: - value: ROUND(AVG((TCC_EA_WRREQ_sum / $denom)), 0) - alias: l2_fabric_wr_ - tips: - Fabric_l2 Atomic: - value: ROUND(AVG((TCC_EA_ATOMIC_sum / $denom)), 0) - alias: l2_fabric_atom_ - tips: - HBM Rd: - value: ROUND(AVG((TCC_EA_RDREQ_DRAM_sum / $denom)), 0) - alias: hbm_rd_ - tips: - HBM Wr: - value: ROUND(AVG((TCC_EA_WRREQ_DRAM_sum / $denom)), 0) - alias: hbm_wr_ - tips: - LDS Util: - value: ROUND(AVG(((100 * SQ_LDS_IDX_ACTIVE) / (GRBM_GUI_ACTIVE * $numCU))), - 0) - alias: lds_util_ - tips: - VL1 Coalesce: - value: ROUND(AVG(((((TA_TOTAL_WAVEFRONTS_sum * 64) * 100) / (TCP_TOTAL_ACCESSES_sum - * 4)) if (TCP_TOTAL_ACCESSES_sum != 0) else 0)), 0) - alias: vl1_coales_ - tips: - VL1 Stall: - value: ROUND(AVG((((100 * TCP_TCR_TCP_STALL_CYCLES_sum) / TCP_GATE_EN1_sum) - if (TCP_GATE_EN1_sum != 0) else None)), 0) - alias: vl1_stall_ - tips: - LDS Lat: - value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQ_INSTS_LDS) - if (SQ_INSTS_LDS != 0) else None)), 0) - alias: lds_lat_ - coll_level: SQ_INST_LEVEL_LDS - tips: - vL1D Lat: - value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQC_DCACHE_REQ) - if (SQC_DCACHE_REQ != 0) else None)), 0) - alias: sl1_lat_ - tips: - IL1 Lat: - value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / SQC_ICACHE_REQ) - if (SQC_ICACHE_REQ != 0) else None)), 0) - alias: il1_lat_ - tips: - Wave Occupancy: - value: ROUND(AVG(((SQ_ACCUM_PREV_HIRES / GRBM_GUI_ACTIVE) / $numActiveCUs)), 0) - alias: wave_occ_ - coll_level: SQ_LEVEL_WAVES - tips: diff --git a/projects/rocprofiler-compute/src/metric_configs/gfx90a/2000_kernels.yaml b/projects/rocprofiler-compute/src/metric_configs/gfx90a/2000_kernels.yaml deleted file mode 100644 index ed566f75a2..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/gfx90a/2000_kernels.yaml +++ /dev/null @@ -1,8 +0,0 @@ ---- -Panel Config: - id: 2000 - title: Kernels - data source: - - raw_csv_table: - id: 2001 - source: pmc_dispatch_info.csv diff --git a/projects/rocprofiler-compute/src/metric_configs/panel_config_template.yaml b/projects/rocprofiler-compute/src/metric_configs/panel_config_template.yaml deleted file mode 100644 index e241896b40..0000000000 --- a/projects/rocprofiler-compute/src/metric_configs/panel_config_template.yaml +++ /dev/null @@ -1,51 +0,0 @@ ---- -# -# Rules to define a panel and its data sources: -# - Each panel has its own yaml file. -# - Each yaml file has 2 sections: (1) Description Details. (2) Panel Config. -# - id for each panel/ data_source has to be unique. -# - The data source of panel support only: raw_csv_table and metric_table for now. -# - For raw_csv_table, data will be loaded from the specified csv file directly, -# and may be sorted. -# - For metric_table, the number of entries of each metric must match of -# the number of entries of table header. The metric can be raw pmc counters -# or an expression derived from them. The key keyword of the metric has to be -# one defined in parser.supported_field, i.e. "Value", "Min", "Max", "Avg" etc. -# - -Metric Description: - METRIC01: &METRIC01_anchor Scalar Arithmetic Logic Unit - -# Define the panel properties and properties of each metric in the panel. -Panel Config: - id: 800 - title: # define panel title to display - data source: - # Metric table sample - - metric_table: - id: 801 - title: # subtitle for this table(optional) - header: - metric: Metric - value: Value - unit: Unit - peak: Peak - pop: PoP - tips: Tips - metric: - METRIC01: - value: AVG(100 * SQ_ACTIVE_INST_SCA / ( GRBM_GUI_ACTIVE * $numCU )) - unit: pct - peak: 100 - pop: AVG(100* SQ_ACTIVE_INST_SCA/(GRBM_GUI_ACTIVE*$numCU)) - tips: *METRIC01_anchor - METRIC02: - value: AVG(100 * SQ_ACTIVE_INST_VALU / ( GRBM_GUI_ACTIVE * $numCU)) - unit: pct - peak: 100 - pop: AVG(100* SQ_ACTIVE_INST_VALU/(GRBM_GUI_ACTIVE*$numCU)) - tips: - # CSV table sample - - raw_csv_table: - id: 802 - source: abc.csv diff --git a/projects/rocprofiler-compute/src/omniperf_analyze/analysis_base.py b/projects/rocprofiler-compute/src/omniperf_analyze/analysis_base.py index fc8a0a976d..545372fb0e 100644 --- a/projects/rocprofiler-compute/src/omniperf_analyze/analysis_base.py +++ b/projects/rocprofiler-compute/src/omniperf_analyze/analysis_base.py @@ -37,13 +37,18 @@ from tabulate import tabulate class OmniAnalyze_Base(): def __init__(self,args,supported_archs): self.__args = args - self._runs = OrderedDict() #NB: I made this public so children can modify/add to obj properties - self._arch_configs = {} #NB: I made this public so children can modify/add to obj properties + self._runs = OrderedDict() + self._arch_configs = {} self.__supported_archs = supported_archs - self._output = None #NB: I made this public so children can modify/add to obj properties + self._output = None + self.__socs = None # available OmniSoC objs def get_args(self): return self.__args + def set_soc(self, omni_socs): + self.__socs = omni_socs + def get_socs(self): + return self.__socs @demarcate def generate_configs(self, arch, config_dir, list_kernels, filter_metrics): @@ -107,7 +112,7 @@ class OmniAnalyze_Base(): error("Error: the number of --filter-kernels doesn't match the number of --dir.") @demarcate - def initalize_runs(self, avail_socs, normalization_filter=None): + def initalize_runs(self, normalization_filter=None): if self.__args.list_metrics: self.list_metrics() @@ -127,7 +132,7 @@ class OmniAnalyze_Base(): arch = w.sys_info.iloc[0]["gpu_soc"] w.dfs = copy.deepcopy(self._arch_configs[arch].dfs) w.dfs_type = self._arch_configs[arch].dfs_type - w.soc_spec = avail_socs[arch].get_soc_param() + w.soc_spec = self.get_socs()[arch].get_soc_param() self._runs[d[0]] = w return self._runs @@ -162,7 +167,7 @@ class OmniAnalyze_Base(): self._output = open(self.__args.output_file, "w+") if self.__args.output_file else sys.stdout # initalize runs - self._runs = self.initalize_runs(omni_socs) + self._runs = self.initalize_runs() # set filters if self.__args.gpu_kernel: diff --git a/projects/rocprofiler-compute/src/omniperf_analyze/analysis_cli.py b/projects/rocprofiler-compute/src/omniperf_analyze/analysis_cli.py index cdc3b96e05..7015660462 100644 --- a/projects/rocprofiler-compute/src/omniperf_analyze/analysis_cli.py +++ b/projects/rocprofiler-compute/src/omniperf_analyze/analysis_cli.py @@ -36,7 +36,7 @@ class cli_analysis(OmniAnalyze_Base): def pre_processing(self, omni_soc): """Perform any pre-processing steps prior to analysis. """ - super().pre_processing(omni_soc) + super().pre_processing() if self.get_args().random_port: error("--gui flag is required to enable --random-port") for d in self.get_args().path: @@ -44,20 +44,23 @@ class cli_analysis(OmniAnalyze_Base): kernel_name_shortener(d[0], self.get_args().kernel_verbose) file_io.create_df_kernel_top_stats( - d[0], - self._runs[d[0]].filter_gpu_ids, - self._runs[d[0]].filter_dispatch_ids, - self.get_args().time_unit, - self.get_args().max_kernel_num + raw_data_dir=d[0], + filter_gpu_ids=self._runs[d[0]].filter_gpu_ids, + filter_dispatch_ids=self._runs[d[0]].filter_dispatch_ids, + time_unit=self.get_args().time_unit, + max_kerenel_num=self.get_args().max_kernel_num ) # create 'mega dataframe' self._runs[d[0]].raw_pmc = file_io.create_df_pmc( d[0], self.get_args().verbose ) - is_gui = False # create the loaded table parser.load_table_data( - self._runs[d[0]], d[0], is_gui, self.get_args().g, self.get_args().verbose + workload=self._runs[d[0]], + dir=d[0], + is_gui=False, + debug=self.get_args().debug, + verbose=self.get_args().verbose ) @@ -65,6 +68,7 @@ class cli_analysis(OmniAnalyze_Base): def run_analysis(self): """Run CLI analysis. """ + super().run_analysis() if self.get_args().list_kernels: tty.show_kernels( self.get_args(), diff --git a/projects/rocprofiler-compute/src/omniperf_analyze/analysis_webui.py b/projects/rocprofiler-compute/src/omniperf_analyze/analysis_webui.py index c145e62fcc..422927e3f1 100644 --- a/projects/rocprofiler-compute/src/omniperf_analyze/analysis_webui.py +++ b/projects/rocprofiler-compute/src/omniperf_analyze/analysis_webui.py @@ -22,11 +22,241 @@ # SOFTWARE. ##############################################################################el -import logging from omniperf_analyze.analysis_base import OmniAnalyze_Base from utils.utils import demarcate +from utils import file_io, parser +from utils.gui import build_bar_chart, build_table_chart + +import os +import logging +import random +import copy +import dash +import dash_bootstrap_components as dbc +from dash import html +from dash import dcc +from dash.dependencies import Input, Output, State + class webui_analysis(OmniAnalyze_Base): + def __init__(self, args, supported_archs): + super().__init__(args, supported_archs) + self.app = dash.Dash(__name__, external_stylesheets=[dbc.themes.CYBORG]) + self.dest_dir = os.path.abspath(args.path[0][0]) + self.arch = None + + self.__hidden_sections = ["Memory Chart Analysis", "Kernels"] + self.__hidden_columns = ["Tips", "coll_level"] + # define different types of bar charts + self.__barchart_elements = { + "instr_mix": [1001, 1002], + "multi_bar": [1604, 1704], + "sol": [1101, 1201, 1301, 1401, 1601, 1701], + "l2_cache_per_chan": [1802, 1803] + } + # define any elements which will have full width + self.__full_width_elements = {1801} + + + @demarcate + def build_layout( + self, + input_filters, + arch_configs + ): + """ + Build gui layout + """ + from utils.gui_components.header import get_header + from utils.gui_components.memchart import get_memchart + + comparable_columns = parser.build_comparable_columns(self.get_args().time_unit) + base_run, base_data = next(iter(self._runs.items())) + self.app.layout = html.Div(style={"backgroundColor": "rgb(50, 50, 50)"}) + + filt_kernel_names = [] + kernel_top_df = base_data.dfs[1] + for kernel_id in base_data.filter_kernel_ids: + filt_kernel_names.append(kernel_top_df.loc[kernel_id, "KernelName"]) + + self.app.layout.children = html.Div( + children=[ + dbc.Spinner( + children=[ + get_header(base_data.raw_pmc, input_filters, filt_kernel_names), + html.Div(id="container", children=[]), + ], + fullscreen=True, + color="primary", + spinner_style={"width": "6rem", "height": "6rem"}, + ) + ] + ) + + @self.app.callback( + Output("container", "children"), + [Input("disp-filt", "value")], + [Input("kernel-filt", "value")], + [Input("gcd-filt", "value")], + [Input("norm-filt", "value")], + [Input("top-n-filt", "value")], + [State("container", "children")], + ) + def generate_from_filter( + disp_filt, kernel_filter, gcd_filter, norm_filt, top_n_filt, div_children + ): + logging.debug("[analysis] gui normalization is ", norm_filt) + + base_data = self.initalize_runs() # Re-initalizes everything + panel_configs = copy.deepcopy(arch_configs.panel_configs) + # Generate original raw df + base_data[base_run].raw_pmc = file_io.create_df_pmc(self.dest_dir, self.get_args().verbose) + logging.debug("[analysis] gui dispatch filter is ", disp_filt) + logging.debug("[analysis] gui kernel filter is ", kernel_filter) + logging.debug("[analysis] gui gpu filter is ", gcd_filter) + logging.debug("[analysis] gui top-n filter is ", top_n_filt) + base_data[base_run].filter_kernel_ids = kernel_filter + base_data[base_run].filter_gpu_ids = gcd_filter + base_data[base_run].filter_dispatch_ids = disp_filt + base_data[base_run].filter_top_n = top_n_filt + + # Reload the pmc_kernel_top.csv for Top Stats panel + file_io.create_df_kernel_top_stats( + raw_data_dir=str(self.dest_dir), + filter_gpu_ids=base_data[base_run].filter_gpu_ids, + filter_dispatch_ids=base_data[base_run].filter_dispatch_ids, + time_unit=self.get_args().time_unit, + max_kernel_num=base_data[base_run].filter_top_n, + ) + # Only display basic metrics if no filters are applied + if not (disp_filt or kernel_filter or gcd_filter): + temp = {} + keep = [1, 201, 101, 1901] + for key in base_data[base_run].dfs: + if keep.count(key) != 0: + temp[key] = base_data[base_run].dfs[key] + + base_data[base_run].dfs = temp + temp = {} + keep = [0, 100, 200, 1900] + for key in panel_configs: + if keep.count(key) != 0: + temp[key] = panel_configs[key] + panel_configs = temp + # All filtering will occur here + parser.load_table_data( + workload=base_data[base_run], + dir=self.dest_dir, + is_gui=True, + debug=self.get_args().debug, + verbose=self.get_args().verbose, + ) + + # ~~~~~~~~~~~~~~~~~~~~~~~ + # Generate GUI content + # ~~~~~~~~~~~~~~~~~~~~~~~ + div_children = [] + + # Append memory chart and roofline + div_children.append( + get_memchart(panel_configs[1900]["data source"], base_data[base_run]) + ) + has_roofline = os.path.isfile(os.path.join(self.dest_dir, "roofline.csv")) + if has_roofline and hasattr(self.get_socs()[self.arch], "roofline_obj"): + # update roofline for visualization in GUI + self.get_socs()[self.arch].analysis_setup( + roofline_parameters={ + 'path_to_dir': self.dest_dir, + 'device_id': 0, + 'sort_type': 'kernels', + 'mem_level': 'ALL', + 'include_kernel_names': False, + 'is_standalone': False + } + ) + roof_obj = self.get_socs()[self.arch].roofline_obj + div_children.append( + roof_obj.empirical_roofline( + ret_df=parser.apply_filters(workload=base_data[base_run], is_gui=True, debug=self.get_args().debug) + ) + ) + + # Iterate over each section as defined in panel configs + for panel_id, panel in panel_configs.items(): + title = str(panel_id // 100) + ". " + panel["title"] + section_title = ( + panel["title"] + .replace("(", "") + .replace(")", "") + .replace("/", "") + .replace(" ", "_") + .lower() + ) + html_section = [] + + if panel["title"] not in self.__hidden_sections: + # Iterate over each table per section + for data_source in panel["data source"]: + for t_type, table_config in data_source.items(): + original_df = base_data[base_run].dfs[table_config["id"]] + # The sys info table need to add index back + if t_type == "raw_csv_table" and "Info" in original_df.keys(): + original_df.reset_index(inplace=True) + + content = determine_chart_type( + original_df=original_df, + table_config=table_config, + hidden_columns=self.__hidden_columns, + barchart_elements=self.__barchart_elements, + norm_filt=norm_filt, + comparable_columns=comparable_columns, + decimal=self.get_args().decimal + ) + + # Update content for this section + if table_config["id"] in self.__full_width_elements: + # Optionally override default (50%) width + html_section.append( + html.Div( + className="float-child", + children=content, + style={"width": "100%"}, + ) + ) + else: + html_section.append( + html.Div(className="float-child", children=content) + ) + + # Append the new section with all of it's contents + div_children.append( + html.Section( + id=section_title, + children=[ + html.H3( + children=title, + style={"color": "white"}, + ), + html.Div(className="float-container", children=html_section), + ], + ) + ) + + # Display pop-up message if no filters are applied + if not (disp_filt or kernel_filter or gcd_filter): + div_children.append( + html.Section( + id="popup", + children=[ + html.Div( + children="To dive deeper, use the top drop down menus to isolate particular kernel(s) or dispatch(s). You will then see the web page update with additional low-level metrics specific to the filter you've applied.", + ), + ], + ) + ) + + return div_children + #----------------------- # Required child methods @@ -35,10 +265,136 @@ class webui_analysis(OmniAnalyze_Base): def pre_processing(self): """Perform any pre-processing steps prior to analysis. """ - logging.debug("[analysis] prepping to do some analysis") + super().pre_processing() + if len(self._runs) == 1: + args = self.get_args() + file_io.create_df_kernel_top_stats( + raw_data_dir=self.dest_dir, + filter_gpu_ids=self._runs[self.dest_dir].filter_gpu_ids, + filter_dispatch_ids=self._runs[self.dest_dir].filter_dispatch_ids, + time_unit=args.time_unit, + max_kernel_num=args.max_kernel_num, + ) + # create 'mega dataframe' + self._runs[self.dest_dir].raw_pmc = file_io.create_df_pmc( + self.dest_dir, args.verbose + ) + # create the loaded kernel stats + parser.load_kernel_top(self._runs[self.dest_dir], self.dest_dir) + # set architecture + self.arch = self._runs[self.dest_dir].sys_info.iloc[0]['gpu_soc'] + + else: + self.error("Multiple runs not yet supported in GUI. Retry without --gui flag.") + @demarcate def run_analysis(self): """Run CLI analysis. """ - logging.debug("[analysis] would you like to check out a groovy profiling web site?") + super().run_analysis() + args = self.get_args() + input_filters = { + "kernel": self._runs[self.dest_dir].filter_kernel_ids, + "gpu": self._runs[self.dest_dir].filter_gpu_ids, + "dispatch": self._runs[self.dest_dir].filter_dispatch_ids, + "normalization": args.normal_unit, + "top_n": args.max_kernel_num, + } + + self.build_layout( + input_filters, + self._arch_configs[self.arch], + ) + if args.random_port: + self.app.run_server(debug=False, host="0.0.0.0", port=random.randint(1024, 49151)) + else: + self.app.run_server(debug=False, host="0.0.0.0", port=args.gui) + + +@demarcate +def determine_chart_type( + original_df, + table_config, + hidden_columns, + barchart_elements, + norm_filt, + comparable_columns, + decimal + ): + content = [] + + display_columns = original_df.columns.values.tolist().copy() + # Remove hidden columns. Better way to do it? + for col in hidden_columns: + if col in display_columns: + display_columns.remove(col) + display_df = original_df[display_columns] + + # Determine chart type: + # a) Barchart + if table_config["id"] in [ + x for i in barchart_elements.values() for x in i + ]: + d_figs = build_bar_chart(display_df, table_config, barchart_elements, norm_filt) + # Smaller formatting if barchart yeilds several graphs + if ( + len(d_figs) > 2 + and not table_config["id"] + in barchart_elements["l2_cache_per_chan"] + ): + temp_obj = [] + for fig in d_figs: + temp_obj.append( + html.Div( + className="float-child", + children=[ + dcc.Graph( + figure=fig, style={"margin": "2%"} + ) + ], + ) + ) + content.append( + html.Div( + className="float-container", children=temp_obj + ) + ) + # Normal formatting if < 2 graphs + else: + for fig in d_figs: + content.append( + dcc.Graph(figure=fig, style={"margin": "2%"}) + ) + # B) Tablechart + else: + d_figs = build_table_chart( + display_df, + table_config, + original_df, + display_columns, + comparable_columns, + decimal, + ) + for fig in d_figs: + content.append(html.Div([fig], style={"margin": "2%"})) + + # subtitle for each table in a panel if existing + if "title" in table_config and table_config["title"]: + subtitle = ( + str(table_config["id"] // 100) + + "." + + str(table_config["id"] % 100) + + " " + + table_config["title"] + + "\n" + ) + + content.insert( + 0, + html.H4( + children=subtitle, + style={"color": "white"}, + ), + ) + return content \ No newline at end of file diff --git a/projects/rocprofiler-compute/src/omniperf_analyze/assets/default.css b/projects/rocprofiler-compute/src/omniperf_analyze/assets/default.css new file mode 100644 index 0000000000..6949b0d958 --- /dev/null +++ b/projects/rocprofiler-compute/src/omniperf_analyze/assets/default.css @@ -0,0 +1,569 @@ +/* +===================================================================== +* Ceevee v1.0 Default Stylesheet +* url: styleshout.com +* license: https://www.styleshout.com/template-license/ +* 03-17-2014 +===================================================================== + +TOC: +a. Webfonts and Icon fonts +b. Reset +c. Default Styles + 1. Basic + 2. Typography + 3. Links + 4. Images + 5. Buttons + 6. Forms +d. Grid +e. Others + 1. Clearing + 2. Misc + +===================================================================== */ + +/* ------------------------------------------------------------------ */ +/* a. Webfonts and Icon fonts + ------------------------------------------------------------------ */ + +@import url("fonts.css"); +@import url("fontello/css/fontello.css"); +@import url("font-awesome/css/font-awesome.min.css"); + +/* ------------------------------------------------------------------ +/* b. Reset + Adapted from: + Normalize.css - https://github.com/necolas/normalize.css/ + HTML5 Doctor Reset - html5doctor.com/html-5-reset-stylesheet/ +/* ------------------------------------------------------------------ */ + +html, body, div, span, object, iframe, +h1, h2, h3, h4, h5, h6, p, blockquote, pre, +abbr, address, cite, code, +del, dfn, em, img, ins, kbd, q, samp, +small, strong, sub, sup, var, +b, i, +dl, dt, dd, ol, ul, li, +fieldset, form, label, legend, +table, caption, tbody, tfoot, thead, tr, th, td, +article, aside, canvas, details, figcaption, figure, +footer, header, hgroup, menu, nav, section, summary, +time, mark, audio, video { + margin: 0; + padding: 0; + border: 0; + outline: 0; + font-size: 100%; + vertical-align: baseline; + background: transparent; +} + +article,aside,details,figcaption,figure, +footer,header,hgroup,menu,nav,section { + display: block; +} + +audio, +canvas, +video { + display: inline-block; +} + +audio:not([controls]) { + display: none; + height: 0; +} + +[hidden] { display: none; } + +code, kbd, pre, samp { + font-family: monospace, serif; + font-size: 1em; +} + +pre { + white-space: pre; + white-space: pre-wrap; + word-wrap: break-word; +} + +blockquote, q { quotes: “ “ } + +blockquote:before, blockquote:after, +q:before, q:after { + content: ''; + content: none; +} + +ins { + background-color: #ff9; + color: #000; + text-decoration: none; +} + +mark { + background-color: #A7F4F6; + color: #555; +} + +del { text-decoration: line-through; } + +abbr[title], dfn[title] { + border-bottom: 1px dotted; + cursor: help; +} + +table { + border-collapse: collapse; + border-spacing: 0; +} + + +/* ------------------------------------------------------------------ */ +/* c. Default and Basic Styles + Adapted from: + Skeleton CSS Framework - http://www.getskeleton.com/ + Typeplate Typographic Starter Kit - http://typeplate.com/ + Typeplate License File - https://github.com/typeplate/starter-kit/blob/master/license.txt +/* ------------------------------------------------------------------ */ + +/* 1. Basic ------------------------------------------------------- */ + +*, +*:before, +*:after { + -moz-box-sizing: border-box; + -webkit-box-sizing: border-box; + box-sizing: border-box; +} + +html { + font-size: 62.5%; + -webkit-font-smoothing: antialiased; +} + +body { + background: #fff; + font-family: 'opensans-regular', sans-serif; + font-weight: normal; + font-size: 15px; + line-height: 30px; + color: #838C95; + + -webkit-font-smoothing: antialiased; /* Fix for webkit rendering */ + -webkit-text-size-adjust: 100%; +} + +/* 2. Typography + Vertical rhythm with leading derived from 6 +--------------------------------------------------------------------- */ + +h1, h2, h3, h4, h5, h6 { + color: #313131; + font-family: 'opensans-bold', sans-serif; + font-weight: normal; +} +h1 a, h2 a, h3 a, h4 a, h5 a, h6 a { font-weight: inherit; } +h1 { font-size: 38px; line-height: 42px; margin-bottom: 12px; letter-spacing: -1px; } +h2 { font-size: 28px; line-height: 36px; margin-bottom: 6px; } +h3 { font-size: 22px; line-height: 30px; margin-bottom: 12px; } +h4 { font-size: 20px; line-height: 30px; margin-bottom: 6px; } +h5 { font-size: 18px; line-height: 30px; } +h6 { font-size: 14px; line-height: 30px; } +.subheader { } + +p { margin: 0 0 30px 0; } +p img { margin: 0; } +p.lead { + font: 19px/36px 'opensans-light', sans-serif; + margin-bottom: 18px; +} + +/* for 'em' and 'strong' tags, font-size and line-height should be same with +the body tag due to rendering problems in some browsers */ +em { font: 15px/30px 'opensans-italic', sans-serif; } +strong, b { font: 15px/30px 'opensans-bold', sans-serif; } +small { font-size: 11px; line-height: inherit; } + +/* Blockquotes */ +blockquote { + margin: 30px 0px; + padding-left: 40px; + position: relative; +} +blockquote:before { + content: "\201C"; + opacity: 0.45; + font-size: 80px; + line-height: 0px; + margin: 0; + font-family: arial, sans-serif; + + position: absolute; + top: 30px; + left: 0; +} +blockquote p { + font-family: 'librebaskerville-italic', serif; + padding: 0; + font-size: 18px; + line-height: 36px; +} +blockquote cite { + display: block; + font-size: 12px; + font-style: normal; + line-height: 18px; +} +blockquote cite:before { content: "\2014 \0020"; } +blockquote cite a, +blockquote cite a:visited { color: #8B9798; border: none } + +/* --------------------------------------------------------------------- +/* Pull Quotes Markup +/* + +/* +/* --------------------------------------------------------------------- */ +.pull-quote { + position: relative; + padding: 18px 30px 18px 0px; +} +.pull-quote:before, +.pull-quote:after { + height: 1em; + opacity: 0.45; + position: absolute; + font-size: 80px; + font-family: Arial, Sans-Serif; +} +.pull-quote:before { + content: "\201C"; + top: 33px; + left: 0; +} +.pull-quote:after { + content: '\201D'; + bottom: -33px; + right: 0; +} +.pull-quote blockquote { + margin: 0; +} +.pull-quote blockquote:before { + content: none; +} + +/* Abbreviations */ +abbr { + font-family: 'opensans-bold', sans-serif; + font-variant: small-caps; + text-transform: lowercase; + letter-spacing: .5px; + color: gray; +} +abbr:hover { cursor: help; } + +/* drop cap */ +.drop-cap:first-letter { + float: left; + margin: 0; + padding: 14px 6px 0 0; + font-size: 84px; + font-family: /* Copperplate */ 'opensans-bold', sans-serif; + line-height: 60px; + text-indent: 0; + background: transparent; + color: inherit; +} + +hr { border: solid #E3E3E3; border-width: 1px 0 0; clear: both; margin: 11px 0 30px; height: 0; } + + +/* 3. Links ------------------------------------------------------- */ + +a, a:visited { + text-decoration: none; + outline: 0; + color: #11ABB0; + + -webkit-transition: color .3s ease-in-out; + -moz-transition: color .3s ease-in-out; + -o-transition: color .3s ease-in-out; + transition: color .3s ease-in-out; +} +a:hover, a:focus { color: #313131; } +p a, p a:visited { line-height: inherit; } + + +/* 4. List --------------------------------------------------------- */ + +ul, ol { margin-bottom: 24px; margin-top: 12px; } +ul { list-style: none outside; } +ol { list-style: decimal; } +ol, ul.square, ul.circle, ul.disc { margin-left: 30px; } +ul.square { list-style: square outside; } +ul.circle { list-style: circle outside; } +ul.disc { list-style: disc outside; } +ul ul, ul ol, +ol ol, ol ul { margin: 6px 0 6px 30px; } +ul ul li, ul ol li, +ol ol li, ol ul li { margin-bottom: 6px; } +li { line-height: 18px; margin-bottom: 12px; } +ul.large li { } +li p { } + +/* --------------------------------------------------------------------- +/* Stats Tab Markup + + + + Extend this object into your markup. +/* +/* --------------------------------------------------------------------- */ +.stats-tabs { + padding: 0; + margin: 24px 0; +} +.stats-tabs li { + display: inline-block; + margin: 0 10px 18px 0; + padding: 0 10px 0 0; + border-right: 1px solid #ccc; +} +.stats-tabs li:last-child { + margin: 0; + padding: 0; + border: none; +} +.stats-tabs li a { + display: inline-block; + font-size: 22px; + font-family: 'opensans-bold', sans-serif; + border: none; + color: #313131; +} +.stats-tabs li a:hover { + color:#11ABB0; +} +.stats-tabs li a b { + display: block; + margin: 6px 0 0 0; + font-size: 13px; + font-family: 'opensans-regular', sans-serif; + color: #8B9798; +} + +/* definition list */ +dl { margin: 12px 0; } +dt { margin: 0; color:#11ABB0; } +dd { margin: 0 0 0 20px; } + +/* Lining Definition Style Markup */ +.lining dt, +.lining dd { + display: inline; + margin: 0; +} +.lining dt + dt:before, +.lining dd + dt:before { + content: "\A"; + white-space: pre; +} +.lining dd + dd:before { + content: ", "; +} +.lining dd:before { + content: ": "; + margin-left: -0.2em; +} + +/* Dictionary Definition Style Markup */ +.dictionary-style dt { + display: inline; + counter-reset: definitions; +} +.dictionary-style dt + dt:before { + content: ", "; + margin-left: -0.2em; +} +.dictionary-style dd { + display: block; + counter-increment: definitions; +} +.dictionary-style dd:before { + content: counter(definitions, decimal) ". "; +} + +/* Pagination */ +.pagination { + margin: 36px auto; + text-align: center; +} +.pagination ul li { + display: inline-block; + margin: 0; + padding: 0; +} +.pagination .page-numbers { + font: 15px/18px 'opensans-bold', sans-serif; + display: inline-block; + padding: 6px 10px; + margin-right: 3px; + margin-bottom: 6px; + color: #6E757C; + background-color: #E6E8EB; + + -webkit-transition: all 200ms ease-in-out; + -moz-transition: all 200ms ease-in-out; + -o-transition: all 200ms ease-in-out; + -ms-transition: all 200ms ease-in-out; + transition: all 200ms ease-in-out; + + -moz-border-radius: 3px; + -webkit-border-radius: 3px; + -khtml-border-radius: 3px; + border-radius: 3px; +} +.pagination .page-numbers:hover { + background: #838A91; + color: #fff; +} +.pagination .current, +.pagination .current:hover { + background-color: #11ABB0; + color: #fff; +} +.pagination .inactive, +.pagination .inactive:hover { + background-color: #E6E8EB; + color: #A9ADB2; +} +.pagination .prev, .pagination .next {} + +/* 5. Images --------------------------------------------------------- */ + +img { + max-width: 100%; + height: auto; +} +img.pull-right { margin: 12px 0px 0px 18px; } +img.pull-left { margin: 12px 18px 0px 0px; } + + + +/* 7. Forms --------------------------------------------------------- */ + +form { margin-bottom: 24px; } +fieldset { margin-bottom: 24px; } + +input[type="text"], +input[type="password"], +input[type="email"], +textarea, +select { + display: block; + padding: 18px 15px; + margin: 0 0 24px 0; + border: 0; + outline: none; + vertical-align: middle; + min-width: 225px; + max-width: 100%; + font-size: 15px; + line-height: 24px; + color: #647373; + background: #D3D9D9; + +} + +/* select { padding: 0; + width: 220px; + } */ + +input[type="text"]:focus, +input[type="password"]:focus, +input[type="email"]:focus, +textarea:focus { + color: #B3B7BC; + background-color: #3d4145; +} + +textarea { min-height: 220px; } + +label, +legend { + font: 16px/24px 'opensans-bold', sans-serif; + margin: 12px 0; + color: #3d4145; + display: block; +} +label span, +legend span { + color: #8B9798; + font: 14px/24px 'opensans-regular', sans-serif; +} + +input[type="checkbox"], +input[type="radio"] { + font-size: 15px; + color: #737373; +} + +input[type="checkbox"] { display: inline; } + +/* ------------------------------------------------------------------ */ +/* d. Grid +--------------------------------------------------------------------- + gutter = 40px. +/* ------------------------------------------------------------------ */ + +/* default +--------------------------------------------------------------- */ + + +/* ------------------------------------------------------------------ */ +/* e. Others +/* ------------------------------------------------------------------ */ + +/* 1. Clearing + (http://nicolasgallagher.com/micro-clearfix-hack/ +--------------------------------------------------------------------- */ + +.cf:before, +.cf:after { + content: " "; + display: table; +} +.cf:after { + clear: both; +} + +/* 2. Misc -------------------------------------------------------- */ + +.remove-bottom { margin-bottom: 0 !important; } +.half-bottom { margin-bottom: 12px !important; } +.add-bottom { margin-bottom: 24px !important; } +.no-border { border: none; } + +.text-center { text-align: center !important; } +.text-left { text-align: left !important; } +.text-right { text-align: right !important; } +.pull-left { float: left !important; } +.pull-right { float: right !important; } +.align-center { + margin-left: auto !important; + margin-right: auto !important; + text-align: center !important; +} + + + + diff --git a/projects/rocprofiler-compute/src/omniperf_analyze/assets/font-awesome/css/font-awesome.css b/projects/rocprofiler-compute/src/omniperf_analyze/assets/font-awesome/css/font-awesome.css new file mode 100644 index 0000000000..048cff9739 --- /dev/null +++ b/projects/rocprofiler-compute/src/omniperf_analyze/assets/font-awesome/css/font-awesome.css @@ -0,0 +1,1338 @@ +/*! + * Font Awesome 4.0.3 by @davegandy - http://fontawesome.io - @fontawesome + * License - http://fontawesome.io/license (Font: SIL OFL 1.1, CSS: MIT License) + */ +/* FONT PATH + * -------------------------- */ +@font-face { + font-family: 'FontAwesome'; + src: url('../fonts/fontawesome-webfont.eot?v=4.0.3'); + src: url('../fonts/fontawesome-webfont.eot?#iefix&v=4.0.3') format('embedded-opentype'), url('../fonts/fontawesome-webfont.woff?v=4.0.3') format('woff'), url('../fonts/fontawesome-webfont.ttf?v=4.0.3') format('truetype'), url('../fonts/fontawesome-webfont.svg?v=4.0.3#fontawesomeregular') format('svg'); + font-weight: normal; + font-style: normal; +} +.fa { + display: inline-block; + font-family: FontAwesome; + font-style: normal; + font-weight: normal; + line-height: 1; + -webkit-font-smoothing: antialiased; + -moz-osx-font-smoothing: grayscale; +} +/* makes the font 33% larger relative to the icon container */ +.fa-lg { + font-size: 1.3333333333333333em; + line-height: 0.75em; + vertical-align: -15%; +} +.fa-2x { + font-size: 2em; +} +.fa-3x { + font-size: 3em; +} +.fa-4x { + font-size: 4em; +} +.fa-5x { + font-size: 5em; +} +.fa-fw { + width: 1.2857142857142858em; + text-align: center; +} +.fa-ul { + padding-left: 0; + margin-left: 2.142857142857143em; + list-style-type: none; +} +.fa-ul > li { + position: relative; +} +.fa-li { + position: absolute; + left: -2.142857142857143em; + width: 2.142857142857143em; + top: 0.14285714285714285em; + text-align: center; +} +.fa-li.fa-lg { + left: -1.8571428571428572em; +} +.fa-border { + padding: .2em .25em .15em; + border: solid 0.08em #eeeeee; + border-radius: .1em; +} +.pull-right { + float: right; +} +.pull-left { + float: left; +} +.fa.pull-left { + margin-right: .3em; +} +.fa.pull-right { + margin-left: .3em; +} +.fa-spin { + -webkit-animation: spin 2s infinite linear; + -moz-animation: spin 2s infinite linear; + -o-animation: spin 2s infinite linear; + animation: spin 2s infinite linear; +} +@-moz-keyframes spin { + 0% { + -moz-transform: rotate(0deg); + } + 100% { + -moz-transform: rotate(359deg); + } +} +@-webkit-keyframes spin { + 0% { + -webkit-transform: rotate(0deg); + } + 100% { + -webkit-transform: rotate(359deg); + } +} +@-o-keyframes spin { + 0% { + -o-transform: rotate(0deg); + } + 100% { + -o-transform: rotate(359deg); + } +} +@-ms-keyframes spin { + 0% { + -ms-transform: rotate(0deg); + } + 100% { + -ms-transform: rotate(359deg); + } +} +@keyframes spin { + 0% { + transform: rotate(0deg); + } + 100% { + transform: rotate(359deg); + } +} +.fa-rotate-90 { + filter: progid:DXImageTransform.Microsoft.BasicImage(rotation=1); + -webkit-transform: rotate(90deg); + -moz-transform: rotate(90deg); + -ms-transform: rotate(90deg); + -o-transform: rotate(90deg); + transform: rotate(90deg); +} +.fa-rotate-180 { + filter: progid:DXImageTransform.Microsoft.BasicImage(rotation=2); + -webkit-transform: rotate(180deg); + -moz-transform: rotate(180deg); + -ms-transform: rotate(180deg); + -o-transform: rotate(180deg); + transform: rotate(180deg); +} +.fa-rotate-270 { + filter: progid:DXImageTransform.Microsoft.BasicImage(rotation=3); + -webkit-transform: rotate(270deg); + -moz-transform: rotate(270deg); + -ms-transform: rotate(270deg); + -o-transform: rotate(270deg); + transform: rotate(270deg); +} +.fa-flip-horizontal { + filter: progid:DXImageTransform.Microsoft.BasicImage(rotation=0, mirror=1); + -webkit-transform: scale(-1, 1); + -moz-transform: scale(-1, 1); + -ms-transform: scale(-1, 1); + -o-transform: scale(-1, 1); + transform: scale(-1, 1); +} +.fa-flip-vertical { + filter: progid:DXImageTransform.Microsoft.BasicImage(rotation=2, mirror=1); + -webkit-transform: scale(1, -1); + -moz-transform: scale(1, -1); + -ms-transform: scale(1, -1); + -o-transform: scale(1, -1); + transform: scale(1, -1); +} +.fa-stack { + position: relative; + display: inline-block; + width: 2em; + height: 2em; + line-height: 2em; + vertical-align: middle; +} +.fa-stack-1x, +.fa-stack-2x { + position: absolute; + left: 0; + width: 100%; + text-align: center; +} +.fa-stack-1x { + line-height: inherit; +} +.fa-stack-2x { + font-size: 2em; +} +.fa-inverse { + color: #ffffff; +} +/* Font Awesome uses the Unicode Private Use Area (PUA) to ensure screen + readers do not read off random characters that represent icons */ +.fa-glass:before { + content: "\f000"; +} +.fa-music:before { + content: "\f001"; +} +.fa-search:before { + content: "\f002"; +} +.fa-envelope-o:before { + content: "\f003"; +} +.fa-heart:before { + content: "\f004"; +} +.fa-star:before { + content: "\f005"; +} +.fa-star-o:before { + content: "\f006"; +} +.fa-user:before { + content: "\f007"; +} +.fa-film:before { + content: "\f008"; +} +.fa-th-large:before { + content: "\f009"; +} +.fa-th:before { + content: "\f00a"; +} +.fa-th-list:before { + content: "\f00b"; +} +.fa-check:before { + content: "\f00c"; +} +.fa-times:before { + content: "\f00d"; +} +.fa-search-plus:before { + content: "\f00e"; +} +.fa-search-minus:before { + content: "\f010"; +} +.fa-power-off:before { + content: "\f011"; +} +.fa-signal:before { + content: "\f012"; +} +.fa-gear:before, +.fa-cog:before { + content: "\f013"; +} +.fa-trash-o:before { + content: "\f014"; +} +.fa-home:before { + content: "\f015"; +} +.fa-file-o:before { + content: "\f016"; +} +.fa-clock-o:before { + content: "\f017"; +} +.fa-road:before { + content: "\f018"; +} +.fa-download:before { + content: "\f019"; +} +.fa-arrow-circle-o-down:before { + content: "\f01a"; +} +.fa-arrow-circle-o-up:before { + content: "\f01b"; +} +.fa-inbox:before { + content: "\f01c"; +} +.fa-play-circle-o:before { + content: "\f01d"; +} +.fa-rotate-right:before, +.fa-repeat:before { + content: "\f01e"; +} +.fa-refresh:before { + content: "\f021"; +} +.fa-list-alt:before { + content: "\f022"; +} +.fa-lock:before { + content: "\f023"; +} +.fa-flag:before { + content: "\f024"; +} +.fa-headphones:before { + content: "\f025"; +} +.fa-volume-off:before { + content: "\f026"; +} +.fa-volume-down:before { + content: "\f027"; +} +.fa-volume-up:before { + content: "\f028"; +} +.fa-qrcode:before { + content: "\f029"; +} +.fa-barcode:before { + content: "\f02a"; +} +.fa-tag:before { + content: "\f02b"; +} +.fa-tags:before { + content: "\f02c"; +} +.fa-book:before { + content: "\f02d"; +} +.fa-bookmark:before { + content: "\f02e"; +} +.fa-print:before { + content: "\f02f"; +} +.fa-camera:before { + content: "\f030"; +} +.fa-font:before { + content: "\f031"; +} +.fa-bold:before { + content: "\f032"; +} +.fa-italic:before { + content: "\f033"; +} +.fa-text-height:before { + content: "\f034"; +} +.fa-text-width:before { + content: "\f035"; +} +.fa-align-left:before { + content: "\f036"; +} +.fa-align-center:before { + content: "\f037"; +} +.fa-align-right:before { + content: "\f038"; +} +.fa-align-justify:before { + content: "\f039"; +} +.fa-list:before { + content: "\f03a"; +} +.fa-dedent:before, +.fa-outdent:before { + content: "\f03b"; +} +.fa-indent:before { + content: "\f03c"; +} +.fa-video-camera:before { + content: "\f03d"; +} +.fa-picture-o:before { + content: "\f03e"; +} +.fa-pencil:before { + content: "\f040"; +} +.fa-map-marker:before { + content: "\f041"; +} +.fa-adjust:before { + content: "\f042"; +} +.fa-tint:before { + content: "\f043"; +} +.fa-edit:before, +.fa-pencil-square-o:before { + content: "\f044"; +} +.fa-share-square-o:before { + content: "\f045"; +} +.fa-check-square-o:before { + content: "\f046"; +} +.fa-arrows:before { + content: "\f047"; +} +.fa-step-backward:before { + content: "\f048"; +} +.fa-fast-backward:before { + content: "\f049"; +} +.fa-backward:before { + content: "\f04a"; +} +.fa-play:before { + content: "\f04b"; +} +.fa-pause:before { + content: "\f04c"; +} +.fa-stop:before { + content: "\f04d"; +} +.fa-forward:before { + content: "\f04e"; +} +.fa-fast-forward:before { + content: "\f050"; +} +.fa-step-forward:before { + content: "\f051"; +} +.fa-eject:before { + content: "\f052"; +} +.fa-chevron-left:before { + content: "\f053"; +} +.fa-chevron-right:before { + content: "\f054"; +} +.fa-plus-circle:before { + content: "\f055"; +} +.fa-minus-circle:before { + content: "\f056"; +} +.fa-times-circle:before { + content: "\f057"; +} +.fa-check-circle:before { + content: "\f058"; +} +.fa-question-circle:before { + content: "\f059"; +} +.fa-info-circle:before { + content: "\f05a"; +} +.fa-crosshairs:before { + content: "\f05b"; +} +.fa-times-circle-o:before { + content: "\f05c"; +} +.fa-check-circle-o:before { + content: "\f05d"; +} +.fa-ban:before { + content: "\f05e"; +} +.fa-arrow-left:before { + content: "\f060"; +} +.fa-arrow-right:before { + content: "\f061"; +} +.fa-arrow-up:before { + content: "\f062"; +} +.fa-arrow-down:before { + content: "\f063"; +} +.fa-mail-forward:before, +.fa-share:before { + content: "\f064"; +} +.fa-expand:before { + content: "\f065"; +} +.fa-compress:before { + content: "\f066"; +} +.fa-plus:before { + content: "\f067"; +} +.fa-minus:before { + content: "\f068"; +} +.fa-asterisk:before { + content: "\f069"; +} +.fa-exclamation-circle:before { + content: "\f06a"; +} +.fa-gift:before { + content: "\f06b"; +} +.fa-leaf:before { + content: "\f06c"; +} +.fa-fire:before { + content: "\f06d"; +} +.fa-eye:before { + content: "\f06e"; +} +.fa-eye-slash:before { + content: "\f070"; +} +.fa-warning:before, +.fa-exclamation-triangle:before { + content: "\f071"; +} +.fa-plane:before { + content: "\f072"; +} +.fa-calendar:before { + content: "\f073"; +} +.fa-random:before { + content: "\f074"; +} +.fa-comment:before { + content: "\f075"; +} +.fa-magnet:before { + content: "\f076"; +} +.fa-chevron-up:before { + content: "\f077"; +} +.fa-chevron-down:before { + content: "\f078"; +} +.fa-retweet:before { + content: "\f079"; +} +.fa-shopping-cart:before { + content: "\f07a"; +} +.fa-folder:before { + content: "\f07b"; +} +.fa-folder-open:before { + content: "\f07c"; +} +.fa-arrows-v:before { + content: "\f07d"; +} +.fa-arrows-h:before { + content: "\f07e"; +} +.fa-bar-chart-o:before { + content: "\f080"; +} +.fa-twitter-square:before { + content: "\f081"; +} +.fa-facebook-square:before { + content: "\f082"; +} +.fa-camera-retro:before { + content: "\f083"; +} +.fa-key:before { + content: "\f084"; +} +.fa-gears:before, +.fa-cogs:before { + content: "\f085"; +} +.fa-comments:before { + content: "\f086"; +} +.fa-thumbs-o-up:before { + content: "\f087"; +} +.fa-thumbs-o-down:before { + content: "\f088"; +} +.fa-star-half:before { + content: "\f089"; +} +.fa-heart-o:before { + content: "\f08a"; +} +.fa-sign-out:before { + content: "\f08b"; +} +.fa-linkedin-square:before { + content: "\f08c"; +} +.fa-thumb-tack:before { + content: "\f08d"; +} +.fa-external-link:before { + content: "\f08e"; +} +.fa-sign-in:before { + content: "\f090"; +} +.fa-trophy:before { + content: "\f091"; +} +.fa-github-square:before { + content: "\f092"; +} +.fa-upload:before { + content: "\f093"; +} +.fa-lemon-o:before { + content: "\f094"; +} +.fa-phone:before { + content: "\f095"; +} +.fa-square-o:before { + content: "\f096"; +} +.fa-bookmark-o:before { + content: "\f097"; +} +.fa-phone-square:before { + content: "\f098"; +} +.fa-twitter:before { + content: "\f099"; +} +.fa-facebook:before { + content: "\f09a"; +} +.fa-github:before { + content: "\f09b"; +} +.fa-unlock:before { + content: "\f09c"; +} +.fa-credit-card:before { + content: "\f09d"; +} +.fa-rss:before { + content: "\f09e"; +} +.fa-hdd-o:before { + content: "\f0a0"; +} +.fa-bullhorn:before { + content: "\f0a1"; +} +.fa-bell:before { + content: "\f0f3"; +} +.fa-certificate:before { + content: "\f0a3"; +} +.fa-hand-o-right:before { + content: "\f0a4"; +} +.fa-hand-o-left:before { + content: "\f0a5"; +} +.fa-hand-o-up:before { + content: "\f0a6"; +} +.fa-hand-o-down:before { + content: "\f0a7"; +} +.fa-arrow-circle-left:before { + content: "\f0a8"; +} +.fa-arrow-circle-right:before { + content: "\f0a9"; +} +.fa-arrow-circle-up:before { + content: "\f0aa"; +} +.fa-arrow-circle-down:before { + content: "\f0ab"; +} +.fa-globe:before { + content: "\f0ac"; +} +.fa-wrench:before { + content: "\f0ad"; +} +.fa-tasks:before { + content: "\f0ae"; +} +.fa-filter:before { + content: "\f0b0"; +} +.fa-briefcase:before { + content: "\f0b1"; +} +.fa-arrows-alt:before { + content: "\f0b2"; +} +.fa-group:before, +.fa-users:before { + content: "\f0c0"; +} +.fa-chain:before, +.fa-link:before { + content: "\f0c1"; +} +.fa-cloud:before { + content: "\f0c2"; +} +.fa-flask:before { + content: "\f0c3"; +} +.fa-cut:before, +.fa-scissors:before { + content: "\f0c4"; +} +.fa-copy:before, +.fa-files-o:before { + content: "\f0c5"; +} +.fa-paperclip:before { + content: "\f0c6"; +} +.fa-save:before, +.fa-floppy-o:before { + content: "\f0c7"; +} +.fa-square:before { + content: "\f0c8"; +} +.fa-bars:before { + content: "\f0c9"; +} +.fa-list-ul:before { + content: "\f0ca"; +} +.fa-list-ol:before { + content: "\f0cb"; +} +.fa-strikethrough:before { + content: "\f0cc"; +} +.fa-underline:before { + content: "\f0cd"; +} +.fa-table:before { + content: "\f0ce"; +} +.fa-magic:before { + content: "\f0d0"; +} +.fa-truck:before { + content: "\f0d1"; +} +.fa-pinterest:before { + content: "\f0d2"; +} +.fa-pinterest-square:before { + content: "\f0d3"; +} +.fa-google-plus-square:before { + content: "\f0d4"; +} +.fa-google-plus:before { + content: "\f0d5"; +} +.fa-money:before { + content: "\f0d6"; +} +.fa-caret-down:before { + content: "\f0d7"; +} +.fa-caret-up:before { + content: "\f0d8"; +} +.fa-caret-left:before { + content: "\f0d9"; +} +.fa-caret-right:before { + content: "\f0da"; +} +.fa-columns:before { + content: "\f0db"; +} +.fa-unsorted:before, +.fa-sort:before { + content: "\f0dc"; +} +.fa-sort-down:before, +.fa-sort-asc:before { + content: "\f0dd"; +} +.fa-sort-up:before, +.fa-sort-desc:before { + content: "\f0de"; +} +.fa-envelope:before { + content: "\f0e0"; +} +.fa-linkedin:before { + content: "\f0e1"; +} +.fa-rotate-left:before, +.fa-undo:before { + content: "\f0e2"; +} +.fa-legal:before, +.fa-gavel:before { + content: "\f0e3"; +} +.fa-dashboard:before, +.fa-tachometer:before { + content: "\f0e4"; +} +.fa-comment-o:before { + content: "\f0e5"; +} +.fa-comments-o:before { + content: "\f0e6"; +} +.fa-flash:before, +.fa-bolt:before { + content: "\f0e7"; +} +.fa-sitemap:before { + content: "\f0e8"; +} +.fa-umbrella:before { + content: "\f0e9"; +} +.fa-paste:before, +.fa-clipboard:before { + content: "\f0ea"; +} +.fa-lightbulb-o:before { + content: "\f0eb"; +} +.fa-exchange:before { + content: "\f0ec"; +} +.fa-cloud-download:before { + content: "\f0ed"; +} +.fa-cloud-upload:before { + content: "\f0ee"; +} +.fa-user-md:before { + content: "\f0f0"; +} +.fa-stethoscope:before { + content: "\f0f1"; +} +.fa-suitcase:before { + content: "\f0f2"; +} +.fa-bell-o:before { + content: "\f0a2"; +} +.fa-coffee:before { + content: "\f0f4"; +} +.fa-cutlery:before { + content: "\f0f5"; +} +.fa-file-text-o:before { + content: "\f0f6"; +} +.fa-building-o:before { + content: "\f0f7"; +} +.fa-hospital-o:before { + content: "\f0f8"; +} +.fa-ambulance:before { + content: "\f0f9"; +} +.fa-medkit:before { + content: "\f0fa"; +} +.fa-fighter-jet:before { + content: "\f0fb"; +} +.fa-beer:before { + content: "\f0fc"; +} +.fa-h-square:before { + content: "\f0fd"; +} +.fa-plus-square:before { + content: "\f0fe"; +} +.fa-angle-double-left:before { + content: "\f100"; +} +.fa-angle-double-right:before { + content: "\f101"; +} +.fa-angle-double-up:before { + content: "\f102"; +} +.fa-angle-double-down:before { + content: "\f103"; +} +.fa-angle-left:before { + content: "\f104"; +} +.fa-angle-right:before { + content: "\f105"; +} +.fa-angle-up:before { + content: "\f106"; +} +.fa-angle-down:before { + content: "\f107"; +} +.fa-desktop:before { + content: "\f108"; +} +.fa-laptop:before { + content: "\f109"; +} +.fa-tablet:before { + content: "\f10a"; +} +.fa-mobile-phone:before, +.fa-mobile:before { + content: "\f10b"; +} +.fa-circle-o:before { + content: "\f10c"; +} +.fa-quote-left:before { + content: "\f10d"; +} +.fa-quote-right:before { + content: "\f10e"; +} +.fa-spinner:before { + content: "\f110"; +} +.fa-circle:before { + content: "\f111"; +} +.fa-mail-reply:before, +.fa-reply:before { + content: "\f112"; +} +.fa-github-alt:before { + content: "\f113"; +} +.fa-folder-o:before { + content: "\f114"; +} +.fa-folder-open-o:before { + content: "\f115"; +} +.fa-smile-o:before { + content: "\f118"; +} +.fa-frown-o:before { + content: "\f119"; +} +.fa-meh-o:before { + content: "\f11a"; +} +.fa-gamepad:before { + content: "\f11b"; +} +.fa-keyboard-o:before { + content: "\f11c"; +} +.fa-flag-o:before { + content: "\f11d"; +} +.fa-flag-checkered:before { + content: "\f11e"; +} +.fa-terminal:before { + content: "\f120"; +} +.fa-code:before { + content: "\f121"; +} +.fa-reply-all:before { + content: "\f122"; +} +.fa-mail-reply-all:before { + content: "\f122"; +} +.fa-star-half-empty:before, +.fa-star-half-full:before, +.fa-star-half-o:before { + content: "\f123"; +} +.fa-location-arrow:before { + content: "\f124"; +} +.fa-crop:before { + content: "\f125"; +} +.fa-code-fork:before { + content: "\f126"; +} +.fa-unlink:before, +.fa-chain-broken:before { + content: "\f127"; +} +.fa-question:before { + content: "\f128"; +} +.fa-info:before { + content: "\f129"; +} +.fa-exclamation:before { + content: "\f12a"; +} +.fa-superscript:before { + content: "\f12b"; +} +.fa-subscript:before { + content: "\f12c"; +} +.fa-eraser:before { + content: "\f12d"; +} +.fa-puzzle-piece:before { + content: "\f12e"; +} +.fa-microphone:before { + content: "\f130"; +} +.fa-microphone-slash:before { + content: "\f131"; +} +.fa-shield:before { + content: "\f132"; +} +.fa-calendar-o:before { + content: "\f133"; +} +.fa-fire-extinguisher:before { + content: "\f134"; +} +.fa-rocket:before { + content: "\f135"; +} +.fa-maxcdn:before { + content: "\f136"; +} +.fa-chevron-circle-left:before { + content: "\f137"; +} +.fa-chevron-circle-right:before { + content: "\f138"; +} +.fa-chevron-circle-up:before { + content: "\f139"; +} +.fa-chevron-circle-down:before { + content: "\f13a"; +} +.fa-html5:before { + content: "\f13b"; +} +.fa-css3:before { + content: "\f13c"; +} +.fa-anchor:before { + content: "\f13d"; +} +.fa-unlock-alt:before { + content: "\f13e"; +} +.fa-bullseye:before { + content: "\f140"; +} +.fa-ellipsis-h:before { + content: "\f141"; +} +.fa-ellipsis-v:before { + content: "\f142"; +} +.fa-rss-square:before { + content: "\f143"; +} +.fa-play-circle:before { + content: "\f144"; +} +.fa-ticket:before { + content: "\f145"; +} +.fa-minus-square:before { + content: "\f146"; +} +.fa-minus-square-o:before { + content: "\f147"; +} +.fa-level-up:before { + content: "\f148"; +} +.fa-level-down:before { + content: "\f149"; +} +.fa-check-square:before { + content: "\f14a"; +} +.fa-pencil-square:before { + content: "\f14b"; +} +.fa-external-link-square:before { + content: "\f14c"; +} +.fa-share-square:before { + content: "\f14d"; +} +.fa-compass:before { + content: "\f14e"; +} +.fa-toggle-down:before, +.fa-caret-square-o-down:before { + content: "\f150"; +} +.fa-toggle-up:before, +.fa-caret-square-o-up:before { + content: "\f151"; +} +.fa-toggle-right:before, +.fa-caret-square-o-right:before { + content: "\f152"; +} +.fa-euro:before, +.fa-eur:before { + content: "\f153"; +} +.fa-gbp:before { + content: "\f154"; +} +.fa-dollar:before, +.fa-usd:before { + content: "\f155"; +} +.fa-rupee:before, +.fa-inr:before { + content: "\f156"; +} +.fa-cny:before, +.fa-rmb:before, +.fa-yen:before, +.fa-jpy:before { + content: "\f157"; +} +.fa-ruble:before, +.fa-rouble:before, +.fa-rub:before { + content: "\f158"; +} +.fa-won:before, +.fa-krw:before { + content: "\f159"; +} +.fa-bitcoin:before, +.fa-btc:before { + content: "\f15a"; +} +.fa-file:before { + content: "\f15b"; +} +.fa-file-text:before { + content: "\f15c"; +} +.fa-sort-alpha-asc:before { + content: "\f15d"; +} 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