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Update code object handling for GSL, PAL and ROCm

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- Correct GSL path to report targets using the TargetID syntax.

- Correct GSL path to check compatibility of code objects when
  loading.

- Add concept of an device isa and create a registery used by ROCm,
  PAL and GSL.

- Support XNACK and SRAMECC target features consistently for PAL and ROCm.

- Correct logic for NullDevices and asserts to avoid memory coruption.

- Allow all NullDevices to be created for HIP.

- Numerous other code improvements.

Change-Id: I40abf3d2b22249c1492d1af5919665f8184f4e0e
This commit is contained in:
Tony Tye
2021-01-10 12:17:06 +00:00
parent 4c16051f6d
commit c7e8d91e14
30 changed files with 1020 additions and 969 deletions
Download Patch File Download Diff File Expand all files Collapse all files
rocclr/device/device.cpp
+172 -1
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@@ -23,6 +23,11 @@
#include "utils/options.hpp"
#include "comgrctx.hpp"
#include <algorithm>
#include <array>
#include <cassert>
#include <cstring>
#if defined(WITH_HSA_DEVICE)
#include "device/rocm/rocdevice.hpp"
extern amd::AppProfile* rocCreateAppProfile();
@@ -65,6 +70,11 @@ extern void DeviceUnload();
#include <algorithm>
#include <numeric>
namespace {
constexpr char hsaIsaNamePrefix[] = "amdgcn-amd-amdhsa--";
} // namespace
namespace device {
extern const char* BlitSourceCode;
@@ -77,6 +87,166 @@ bool VirtualDevice::ActiveWait() const {
namespace amd {
std::pair<const Isa*, const Isa*> Isa::supportedIsas() {
constexpr amd::Isa::Feature NONE = amd::Isa::Feature::Unsupported;
constexpr amd::Isa::Feature ANY = amd::Isa::Feature::Any;
constexpr amd::Isa::Feature OFF = amd::Isa::Feature::Disabled;
constexpr amd::Isa::Feature ON = amd::Isa::Feature::Enabled;
static constexpr Isa supportedIsas_[] = {
// NOTE: Add new targets by adding rows for each permutation of the SRAMECC
// and XNACK target feature values. If the target does not support the
// feature then only NONE is used. If it supports the feature than include
// rows for ANY, OFF and ON (but not NONE).
//
// Use the Target ID syntax. This comprises the processor name, followed by
// the target feature settings in alphebetic order separated by ':'. If a
// target feature is omitted it means either it is not supported, or it has
// the ANY value. If the target feature is disabled then use a '-' suffix,
// and if enabled use a '+' suffix.
//
// If the HSAIL or AMD IL compilers do not support the target, then use
// nullptr for the ID.
//
// -------------------- Compiler -------------------- ------- Runtime ----- ---- IP ---- --- Target --- ---------- Target Properties ----------
// Supported Version Features Mem
// SIMD Channel LDS LDS
// SIMD/ SIMD Instr Bank Size/ Mem
// Target ID HSAIL ID AMD IL ID ROC PAL GSL Maj/Min/Stp SRAMECC XNACK CU Width Width Width CU Banks
{"gfx600", "Tahiti", "Tahiti", false, false, true, 6, 0, 0, NONE, NONE, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx601", "Pitcairn", "Pitcairn", false, false, true, 6, 0, 1, NONE, NONE, 4, 16, 1, 256, 64 * Ki, 32}, // Also Capeverde
{"gfx602", "Oland", "Oland", false, false, true, 6, 0, 2, NONE, NONE, 4, 16, 1, 256, 64 * Ki, 32}, // Also Hainan
{"gfx700", "Kaveri", "Kalindi", true, true, true, 7, 0, 0, NONE, NONE, 4, 16, 1, 256, 64 * Ki, 32}, // Also Spectre, Spooky, Kalindi
{"gfx701", "Hawaii", "Hawaii", true, true, true, 7, 0, 1, NONE, NONE, 4, 16, 1, 256, 64 * Ki, 32}, // Actually Hawaiipro
{"gfx702", nullptr, nullptr, true, true, true, 7, 0, 2, NONE, NONE, 4, 16, 1, 256, 64 * Ki, 32}, // Actually Hawaii (can execute Hawiipro code)
{"gfx703", nullptr, nullptr, false, false, false, 7, 0, 3, NONE, NONE, 4, 16, 1, 256, 64 * Ki, 32}, // Mullins
{"gfx704", "Bonaire", "Bonaire", false, true, true, 7, 0, 4, NONE, NONE, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx705", "Mullins", "Mullins", false, true, true, 7, 0, 5, NONE, NONE, 4, 16, 1, 256, 64 * Ki, 32}, // Actually Godavari
{"gfx801", nullptr, nullptr, true, false, false, 8, 0, 1, NONE, ANY, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx801:xnack-", "Carrizo", "Carrizo", true, true, true, 8, 0, 1, NONE, OFF, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx801:xnack+", nullptr, nullptr, true, false, false, 8, 0, 1, NONE, ON, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx802", "Tonga", "Tonga", true, true, true, 8, 0, 2, NONE, NONE, 4, 16, 1, 256, 64 * Ki, 32}, // Also Iceland
{"gfx803", "Fiji", "Fiji", true, true, true, 8, 0, 3, NONE, NONE, 4, 16, 1, 256, 64 * Ki, 32}, // Also Ellesmere/Polaris10, Baffin/Polaris11, Polaris12, Polaris22/VegaM
{"gfx805", nullptr, nullptr, true, false, false, 8, 0, 5, NONE, NONE, 4, 16, 1, 256, 64 * Ki, 32}, // Tongapro
{"gfx810", nullptr, nullptr, true, false, false, 8, 1, 0, NONE, ANY, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx810:xnack-", "Stoney", "Stoney", true, true, true, 8, 1, 0, NONE, OFF, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx810:xnack+", nullptr, nullptr, true, false, false, 8, 1, 0, NONE, ON, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx900", "gfx901", nullptr, true, true, false, 9, 0, 0, NONE, ANY, 4, 16, 1, 256, 64 * Ki, 32}, // Also Greenland
{"gfx900:xnack-", "gfx900", nullptr, true, true, !IS_BRAHMA, 9, 0, 0, NONE, OFF, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx900:xnack+", "gfx901", nullptr, true, true, false, 9, 0, 0, NONE, ON, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx902", "gfx903", nullptr, true, true, false, 9, 0, 2, NONE, ANY, 4, 16, 1, 256, 64 * Ki, 32}, // Also Raven
{"gfx902:xnack-", "gfx902", nullptr, true, true, !IS_BRAHMA, 9, 0, 2, NONE, OFF, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx902:xnack+", "gfx903", nullptr, true, true, false, 9, 0, 2, NONE, ON, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx904", "gfx905", nullptr, true, true, false, 9, 0, 4, NONE, ANY, 4, 16, 1, 256, 64 * Ki, 32}, // Also Vega12
{"gfx904:xnack-", "gfx904", nullptr, true, true, !IS_BRAHMA, 9, 0, 4, NONE, OFF, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx904:xnack+", "gfx905", nullptr, true, true, false, 9, 0, 4, NONE, ON, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx906", "gfx907", nullptr, true, true, false, 9, 0, 6, ANY, ANY, 4, 16, 1, 256, 64 * Ki, 32}, // Also Vega20
{"gfx906:sramecc-", "gfx907", nullptr, true, true, !IS_BRAHMA & false, 9, 0, 6, OFF, ANY, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx906:sramecc+", nullptr, nullptr, true, false, false, 9, 0, 6, ON, ANY, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx906:xnack-", "gfx906", nullptr, true, true, true, 9, 0, 6, ANY, OFF, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx906:xnack+", "gfx907", nullptr, true, true, false, 9, 0, 6, ANY, ON, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx906:sramecc-:xnack-", "gfx906", nullptr, true, true, true, 9, 0, 6, OFF, OFF, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx906:sramecc-:xnack+", "gfx907", nullptr, true, true, false, 9, 0, 6, OFF, ON, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx906:sramecc+:xnack-", nullptr, nullptr, true, false, false, 9, 0, 6, ON, OFF, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx906:sramecc+:xnack+", nullptr, nullptr, true, false, false, 9, 0, 6, ON, ON, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx908", nullptr, nullptr, true, false, false, 9, 0, 8, ANY, ANY, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx908:sramecc-", nullptr, nullptr, true, false, false, 9, 0, 8, OFF, ANY, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx908:sramecc+", nullptr, nullptr, true, false, false, 9, 0, 8, ON, ANY, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx908:xnack-", nullptr, nullptr, true, false, false, 9, 0, 8, ANY, OFF, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx908:xnack-", nullptr, nullptr, true, false, false, 9, 0, 8, ANY, ON, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx908:sramecc-:xnack-", nullptr, nullptr, true, false, false, 9, 0, 8, OFF, OFF, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx908:sramecc-:xnack+", nullptr, nullptr, true, false, false, 9, 0, 8, OFF, ON, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx908:sramecc+:xnack-", nullptr, nullptr, true, false, false, 9, 0, 8, ON, OFF, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx908:sramecc+:xnack+", nullptr, nullptr, true, false, false, 9, 0, 8, ON, ON, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx909", nullptr, nullptr, false, false, false, 9, 0, 9, NONE, ANY, 4, 16, 1, 256, 64 * Ki, 32}, // Also Raven2 (can execute Raven code)
{"gfx909:xnack-", nullptr, nullptr, false, false, !IS_BRAHMA & false, 9, 0, 9, NONE, OFF, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx909:xnack+", nullptr, nullptr, false, false, false, 9, 0, 9, NONE, ON, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx90c", nullptr, nullptr, false, false, false, 9, 0, 12, NONE, ANY, 4, 16, 1, 256, 64 * Ki, 32}, // Also Renoir
{"gfx90c:xnack-", nullptr, nullptr, false, false, !IS_BRAHMA & false, 9, 0, 12, NONE, OFF, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx90c:xnack+", nullptr, nullptr, false, false, false, 9, 0, 12, NONE, ON, 4, 16, 1, 256, 64 * Ki, 32},
{"gfx1010", nullptr, nullptr, true, false, false, 10, 1, 0, NONE, ANY, 2, 32, 1, 256, 64 * Ki, 32},
{"gfx1010:xnack-", "gfx1010", nullptr, true, true, false, 10, 1, 0, NONE, OFF, 2, 32, 1, 256, 64 * Ki, 32},
{"gfx1010:xnack+", nullptr, nullptr, true, false, false, 10, 1, 0, NONE, ON, 2, 32, 1, 256, 64 * Ki, 32},
{"gfx1011", nullptr, nullptr, true, false, false, 10, 1, 1, NONE, ANY, 2, 32, 1, 256, 64 * Ki, 32},
{"gfx1011:xnack-", "gfx1011", nullptr, true, true, false, 10, 1, 1, NONE, OFF, 2, 32, 1, 256, 64 * Ki, 32},
{"gfx1011:xnack+", nullptr, nullptr, true, false, false, 10, 1, 1, NONE, ON, 2, 32, 1, 256, 64 * Ki, 32},
{"gfx1012", nullptr, nullptr, true, false, false, 10, 1, 2, NONE, ANY, 2, 32, 1, 256, 64 * Ki, 32},
{"gfx1012:xnack-", "gfx1012", nullptr, true, true, false, 10, 1, 2, NONE, OFF, 2, 32, 1, 256, 64 * Ki, 32},
{"gfx1012:xnack+", nullptr, nullptr, true, false, false, 10, 1, 2, NONE, ON, 2, 32, 1, 256, 64 * Ki, 32},
{"gfx1030", nullptr, nullptr, true, false, false, 10, 3, 0, NONE, NONE, 2, 32, 1, 256, 64 * Ki, 32},
{"gfx1031", nullptr, nullptr, true, false, false, 10, 3, 1, NONE, NONE, 2, 32, 1, 256, 64 * Ki, 32},
{"gfx1032", nullptr, nullptr, true, false, false, 10, 3, 2, NONE, NONE, 2, 32, 1, 256, 64 * Ki, 32},
{"gfx1033", nullptr, nullptr, false, false, false, 10, 3, 3, NONE, NONE, 2, 32, 1, 256, 64 * Ki, 32}
};
return std::make_pair(std::begin(supportedIsas_), std::end(supportedIsas_));
}
std::string Isa::processorName() const {
std::string processor(targetId_);
return processor.substr(0, processor.find(':'));
}
std::string Isa::isaName() const {
return std::string(hsaIsaNamePrefix) + targetId();
}
bool Isa::isCompatible(const Isa &codeObjectIsa, const Isa &agentIsa) {
if (codeObjectIsa.versionMajor() != agentIsa.versionMajor() ||
codeObjectIsa.versionMinor() != agentIsa.versionMinor() ||
codeObjectIsa.versionStepping() != agentIsa.versionStepping())
return false;
assert(codeObjectIsa.isSrameccSupported() == agentIsa.isSrameccSupported() &&
agentIsa.sramecc() != Feature::Any);
if ((codeObjectIsa.sramecc() == Feature::Enabled ||
codeObjectIsa.sramecc() == Feature::Disabled) &&
codeObjectIsa.sramecc() != agentIsa.sramecc())
return false;
assert(codeObjectIsa.isXnackSupported() == agentIsa.isXnackSupported() &&
agentIsa.xnack() != Feature::Any);
if ((codeObjectIsa.xnack() == Feature::Enabled || codeObjectIsa.xnack() == Feature::Disabled) &&
codeObjectIsa.xnack() != agentIsa.xnack())
return false;
return true;
}
const Isa* Isa::findIsa(const char *isaName) {
if (!isaName)
return nullptr;
const char* prefix = std::strstr(isaName, hsaIsaNamePrefix);
if (prefix != isaName)
return nullptr;
const char *targetId = isaName + std::strlen(hsaIsaNamePrefix);
auto supportedIsas_ = supportedIsas();
auto isaIter = std::find_if(supportedIsas_.first, supportedIsas_.second, [&](const Isa& isa) {
return std::strcmp(targetId, isa.targetId_) == 0;
});
return isaIter == supportedIsas_.second ? nullptr : isaIter;
}
const Isa* Isa::findIsa(uint32_t versionMajor, uint32_t versionMinor, uint32_t versionStepping,
Isa::Feature sramecc, Isa::Feature xnack) {
auto supportedIsas_ = supportedIsas();
auto isaIter = std::find_if(supportedIsas_.first, supportedIsas_.second, [&](const Isa& isa) {
return versionMajor == isa.versionMajor_ && versionMinor == isa.versionMinor_ &&
versionStepping == isa.versionStepping_ &&
(isa.sramecc_ == amd::Isa::Feature::Unsupported || isa.sramecc_ == sramecc) &&
(isa.xnack_ == amd::Isa::Feature::Unsupported || isa.xnack_ == xnack);
});
return isaIter == supportedIsas_.second ? nullptr : isaIter;
}
const Isa* Isa::begin() {
return supportedIsas().first;
}
const Isa* Isa::end() {
return supportedIsas().second;
}
std::vector<Device*>* Device::devices_ = nullptr;
AppProfile Device::appProfile_;
@@ -300,8 +470,9 @@ bool Device::ValidateComgr() {
return true;
}
bool Device::create() {
bool Device::create(const Isa &isa) {
assert(!vaCacheAccess_ && !vaCacheMap_);
isa_ = &isa;
vaCacheAccess_ = new amd::Monitor("VA Cache Ops Lock", true);
if (nullptr == vaCacheAccess_) {
return false;