Update code object handling for GSL, PAL and ROCm
- Correct GSL path to report targets using the TargetID syntax. - Correct GSL path to check compatibility of code objects when loading. - Add concept of an device isa and create a registery used by ROCm, PAL and GSL. - Support XNACK and SRAMECC target features consistently for PAL and ROCm. - Correct logic for NullDevices and asserts to avoid memory coruption. - Allow all NullDevices to be created for HIP. - Numerous other code improvements. Change-Id: I40abf3d2b22249c1492d1af5919665f8184f4e0e
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@@ -117,7 +117,6 @@ class Program : public amd::HeapObject {
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int32_t buildStatus_; //!< build status.
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int32_t buildError_; //!< build error
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const char* machineTarget_; //!< Machine target for this program
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aclTargetInfo info_; //!< The info target for this binary.
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size_t globalVariableTotalSize_;
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amd::option::Options* programOptions_;
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@@ -233,9 +232,6 @@ class Program : public amd::HeapObject {
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const uint32_t codeObjectVer() const { return codeObjectVer_; }
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#endif
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//! Get the machine target for the program
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const char* machineTarget() const { return machineTarget_; }
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//! Check if program is HIP based
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const bool isHIP() const { return (isHIP_ == 1); }
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@@ -293,7 +289,7 @@ class Program : public amd::HeapObject {
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void releaseClBinary();
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//! return target info
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virtual const aclTargetInfo& info(const char* str = "") = 0;
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virtual const aclTargetInfo& info() = 0;
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virtual bool setKernels(
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amd::option::Options* options, void* binary, size_t binSize,
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