gda ionic: restore functionality of ionic gda in rocshmem (#269)

* Revamp findibverbs to find ionic again

* gda ionic: rename ionic_sq_buf ionic_cq_buf

Avoid duplicating member names used by mlx5 gda.

Signed-off-by: Allen Hubbe <allen.hubbe@amd.com>

* gda: move spin lock to util.hpp

Move spin lock out of ionic gda to util.hpp.

Signed-off-by: Allen Hubbe <allen.hubbe@amd.com>

* gda ionic: assume latest fwabi changes

There is no firmware abi compatibility in this ionic gda code yet, so
assume we are using the latest firmware abi as of now.

Signed-off-by: Allen Hubbe <allen.hubbe@amd.com>

* gda ionic: allow doorbell with incomplete wqes

Use spin lock to ensure doorbell is only written with an increasing
producer index.  Ring the doorbell after this wave has initialized its
wqes.  Wqes of other waves might not be fully initialized, but firmware
will not process them until the phase/color flag is updated in the
respecitve wqes.

Signed-off-by: Allen Hubbe <allen.hubbe@amd.com>

* gda ionic: poll cq for additional completions

Keep polling the cq for more than just the minimum number of completions
for this wave of threads to make progress, as long as the cq is not
empty.  A part of wave-optimized cq polling, at the expense of one wave
polling additional completions, it was observed that nearly all other
waves avoid taking the cq lock at all.

Signed-off-by: Allen Hubbe <allen.hubbe@amd.com>

* gda: max_rd_atomic in rts transition

In modify_qp(RTS), specify max_rd_atomic, not max_dest_rd_atomic.

By not speicfying max_rd_atomic (rather, max_rd_atomic=zero), the local
nic may get stuck transmitting the first read or atomic request.  One
read or atomic request is greater than the initiator depth of zero.

Signed-off-by: Allen Hubbe <allen.hubbe@amd.com>

* gda ionic: allow specifying traffic class

Allow specifying a traffic class.  The network might have a specific
traffic class configured as no-drop, for example.

Co-authored-by: Aurelien Bouteiller <aurelien.bouteiller@amd.com>
Signed-off-by: Allen Hubbe <allen.hubbe@amd.com>

* gda ionic: tweak uxdma assignment

The ideal arrangement will have an equal number of QPs active on each
uxdma pipeline.

Pre-rebase, the better arrangement for rocshmem funcitonal test
benchmarks was [0, 1], [1, 0], [0, 1], [1, 0], ...

Now, following changes that add 'ROCSHMEM_GDA_ALTERNATE_QP_PORTS=1' by
default, the better arrangement is [0, 1], [0, 1], [0, 1], [0, 1], ...

Signed-off-by: Allen Hubbe <allen.hubbe@amd.com>

---------

Signed-off-by: Allen Hubbe <allen.hubbe@amd.com>
Co-authored-by: Aurelien Bouteiller <abouteil@amd.com>
Co-authored-by: Aurelien Bouteiller <aurelien.bouteiller@amd.com>

src/gda/queue_pair.hpp

@@ -37,6 +37,7 @@
 #include "rocshmem_config.h"
 #include "endian.h"
 #include "constants.hpp"
+#include "util.hpp"
 
 #include "gda/ionic/provider_gda_ionic.hpp"
 #include "gda/mlx5/provider_gda_mlx5.hpp"
@@ -191,9 +192,6 @@ class QueuePair {
 #ifdef GDA_IONIC
   __device__ uint64_t get_same_qp_lane_mask();
 
-  __device__ bool cq_lock_try_acquire(uint64_t active_lane_mask);
-  __device__ void cq_lock_release(uint64_t active_lane_mask);
-
   /**
    * @brief Reserve space in the sq to post this many wqes.
    * @param my_tid my logical thread id.
@@ -210,7 +208,7 @@ class QueuePair {
    * @param wqe this thread's wqe.
    * @return doorbell producer index.
    */
-  __device__ uint32_t commit_sq(bool last, uint32_t my_sq_prod, uint32_t num_wqes, struct ionic_v1_wqe *wqe);
+  __device__ uint32_t commit_sq(uint64_t activemask, uint32_t my_sq_prod, uint32_t my_sq_pos, uint32_t num_wqes);
 
   /**
    * @brief Helper method to poll the next completion queue entry.
@@ -226,7 +224,7 @@ class QueuePair {
   uint64_t *cq_dbreg{nullptr};
   uint64_t cq_dbval{0};
   uint64_t cq_mask{0};
-  struct ionic_v1_cqe *cq_buf{nullptr};
+  struct ionic_v1_cqe *ionic_cq_buf{nullptr};
   uint32_t cq_lock{SPIN_LOCK_UNLOCKED};
   uint32_t cq_pos{0};
   uint32_t cq_dbpos{0};
@@ -234,7 +232,8 @@ class QueuePair {
   uint64_t *sq_dbreg{nullptr};
   uint64_t sq_dbval{0};
   uint64_t sq_mask{0};
-  struct ionic_v1_wqe *sq_buf{nullptr};
+  struct ionic_v1_wqe *ionic_sq_buf{nullptr};
+  uint32_t sq_lock{SPIN_LOCK_UNLOCKED};
   uint32_t sq_dbprod{0};
   uint32_t sq_prod{0};
   uint32_t sq_msn{0};
@@ -325,6 +324,7 @@ class QueuePair {
 
   uint32_t inline_threshold{0};
 
+  char dev_name[24];
   uint32_t qp_num{0};
   uint32_t rkey{0};
   uint32_t lkey{0};