[SWDEV-553416] Fix amdsmi_get_gpu_reg_table_info and amdsmi_get_gpu_pm_metrics_info(#787)
Signed-off-by: Narlo, Joseph <Joseph.Narlo@amd.com>
This commit is contained in:
@@ -281,7 +281,7 @@ class AmdSmiTemperatureType(IntEnum):
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GPUBOARD_NODE_OAM_X_04_HBM_D_VR = amdsmi_wrapper.AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_D_VR # OAM X 0.4V HBM D voltage regulator temperature
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GPUBOARD_NODE_LAST = amdsmi_wrapper.AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_LAST
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# GPU Board VR (Voltage Regulator) temperature
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# GPU Board VR (Voltage Regulator) temperature
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GPUBOARD_VDDCR_VDD0 = amdsmi_wrapper.AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD0 # VDDCR VDD0 voltage regulator temperature
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GPUBOARD_VDDCR_VDD1 = amdsmi_wrapper.AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD1 # VDDCR VDD1 voltage regulator temperature
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GPUBOARD_VDDCR_VDD2 = amdsmi_wrapper.AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD2 # VDDCR VDD2 voltage regulator temperature
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@@ -297,7 +297,7 @@ class AmdSmiTemperatureType(IntEnum):
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GPUBOARD_VDDIO_11_E32 = amdsmi_wrapper.AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_11_E32 # VDDIO 1.1V E32 voltage regulator temperature
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GPUBOARD_VR_LAST = amdsmi_wrapper.AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_LAST
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# Baseboard System temperature
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# Baseboard System temperature
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BASEBOARD_UBB_FPGA = amdsmi_wrapper.AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA # UBB FPGA temperature
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BASEBOARD_UBB_FRONT = amdsmi_wrapper.AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FRONT # UBB front temperature
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BASEBOARD_UBB_BACK = amdsmi_wrapper.AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_BACK # UBB back temperature
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@@ -2056,19 +2056,20 @@ def amdsmi_get_cpu_affinity_with_scope(
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socket_count = amdsmi_get_cpu_socket_count()
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sock_info = amdsmi_get_cpu_cores_per_socket(socket_count)
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core_count = sock_info['cores_per_socket']
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size = ctypes.c_uint32(0)
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size = (socket_count * core_count)/ (ctypes.sizeof(ctypes.c_uint64) * 8)
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size = int(math.ceil(size))
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size = ctypes.c_uint32(size)
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cpu_set = (ctypes.c_uint64 * size.value)()
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_check_res(
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amdsmi_wrapper.amdsmi_get_cpu_affinity_with_scope(
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processor_handle, size, cpu_set, scope)
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)
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return cpu_set
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def amdsmi_get_gpu_asic_info(
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processor_handle: processor_handle_t,
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) -> Dict[str, Any]:
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@@ -2176,6 +2177,67 @@ def amdsmi_get_power_cap_info(
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"max_power_cap": power_cap_info.max_power_cap}
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def _get_name_value(num, data) -> List[Dict[str, int]]:
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"""
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Extracts a list of name-value pairs from a ctypes array buffer.
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This function works around a ctypes array issue where direct field access
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to the `amdsmi_name_value_t` structure is unreliable. Instead, it uses
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memory operations to extract the 'name' (a 64-byte char array) and 'value'
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(a uint64) from each structure in the array.
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Parameters:
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num (ctypes.c_uint32): Number of elements in the array.
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data (ctypes.c_void_p): Pointer to the start of the array buffer containing
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`amdsmi_name_value_t` structures.
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Returns:
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List[Dict[str, int]]: A list of dictionaries, each with keys 'name' (str)
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and 'value' (int) extracted from the buffer.
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Workaround:
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Direct access to the fields of the ctypes array is broken, so the function
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uses memory alignment and pointer arithmetic to extract the fields manually.
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"""
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# Work around ctypes array issue by using memory access
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# Use 4 byte alignment for amdsmi_name_value_t.name char array, 64=256/4
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# Use 8 bytes for amdsmi_name_value_t.value uint64
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aligned_name_size = int(AMDSMI_MAX_STRING_LENGTH / 4)
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value_size_bytes = 8
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struct_alignment = aligned_name_size + value_size_bytes
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# Access name,value field using memory operations since direct access is broken
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struct_ptr = ctypes.cast(data, ctypes.POINTER(ctypes.c_char * struct_alignment))
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results = []
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for i in range(num.value):
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# Offset into structure array
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current_struct = struct_ptr[i]
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# Cast address for name member with max chars to read
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name_ptr = ctypes.cast(ctypes.addressof(current_struct), ctypes.POINTER(ctypes.c_char * AMDSMI_MAX_STRING_LENGTH))
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# Data buffer in bytes
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name_bytes = ctypes.string_at(name_ptr.contents)
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# Get string
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name_str = name_bytes.rstrip(b'\x00').decode('utf-8', errors='replace')
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# Address for value member
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addr_value = ctypes.addressof(current_struct) + struct_alignment
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# Cast data buffer to a uint64
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int64_ptr = ctypes.cast(addr_value, ctypes.POINTER(ctypes.c_uint64))
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# Get value
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value = int64_ptr.contents.value
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item = {
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'name': name_str,
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'value': value
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}
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results.append(item)
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return results
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def amdsmi_get_gpu_pm_metrics_info(
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processor_handle: processor_handle_t,
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) -> List[Dict[str, Any]]:
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@@ -2185,7 +2247,7 @@ def amdsmi_get_gpu_pm_metrics_info(
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)
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pm_metrics = POINTER(amdsmi_wrapper.amdsmi_name_value_t)()
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num_mets = ctypes.c_uint32()
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num_mets = ctypes.c_uint32(0)
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_check_res(
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amdsmi_wrapper.amdsmi_get_gpu_pm_metrics_info(
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@@ -2193,16 +2255,11 @@ def amdsmi_get_gpu_pm_metrics_info(
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)
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)
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results = []
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for i in range(num_mets.value):
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item = {
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'name': pm_metrics[i].name.decode('utf-8'),
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'value': pm_metrics[i].value
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}
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results.append(item)
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results = _get_name_value(num_mets, pm_metrics)
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# Free the allocated memory
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amdsmi_wrapper.amdsmi_free_name_value_pairs(pm_metrics)
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return results
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@@ -2219,18 +2276,15 @@ def amdsmi_get_gpu_reg_table_info(
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_check_res(
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amdsmi_wrapper.amdsmi_get_gpu_reg_table_info(
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processor_handle, reg_type, reg_metrics, ctypes.byref(num_regs)
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processor_handle, reg_type, ctypes.byref(reg_metrics), ctypes.byref(num_regs)
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)
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)
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results = []
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for i in range(num_regs.value):
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item = {
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'name': reg_metrics[i].name,
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'value': reg_metrics[i].value
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}
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results.append(item)
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results = _get_name_value(num_regs, reg_metrics)
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# Free the allocated memory
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amdsmi_wrapper.amdsmi_free_name_value_pairs(reg_metrics)
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return results
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@@ -5692,3 +5746,4 @@ def amdsmi_get_gpu_busy_percent(processor_handle: processor_handle_t):
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gpu_busy_percent = ctypes.c_uint32(0)
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_check_res(amdsmi_wrapper.amdsmi_get_gpu_busy_percent(processor_handle, ctypes.byref(gpu_busy_percent)))
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return gpu_busy_percent.value
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