Crusher hackathon updates (#164)
- improved error handling in dyninst
- improved error handling in omnitrace exe
- new logging facility for omnitrace exe
- improved backtraces
- disable concurrent kernels in rocprofiler
- updates `setup-env.sh` and modulefile
- set `omnitrace_ROOT`
- set `HSA_TOOLS_LIB` if roctracer or rocprofiler enabled
- set `ROCP_TOOL_LIB` if rocprofiler enabled
- closes #163
- No longer make setting `HSA_ENABLE_INTERRUPT=0` the default
- this has performance implications
- this was set to workaround a bug in ROCR which caused an ioctl call in
ROCm to hang when interrupted. But it was only interrupted when realtime
sampling was enabled since the CPU-clock doesn't increment when waiting
- This bug should be fixed in ROCm 5.3
- omnitrace no longer activates a realtime sampler by default when
sampling, thus this bug is no longer encountered unless the user
explicitly triggers realtime sampling
[ROCm/rocprofiler-systems commit: 90ff7188f8]
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@@ -34,8 +34,11 @@
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struct module_function
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{
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using width_t = std::array<size_t, 4>;
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using address_t = Dyninst::Address;
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using width_t = std::array<size_t, 4>;
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using address_t = Dyninst::Address;
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using instr_addr_pair_t = std::pair<instruction_t, address_t>;
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using str_msg_t = std::tuple<int, string_t, string_t, string_t, string_t>;
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using str_msg_vec_t = std::vector<str_msg_t>;
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static constexpr size_t absolute_max_width = 80;
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static width_t& get_width();
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@@ -86,21 +89,19 @@ struct module_function
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bool is_address_range_constrained() const; // checks address range constraint
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bool is_num_instructions_constrained() const; // check # instructions constraint
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size_t start_address = 0;
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uint64_t address_range = 0;
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uint64_t num_instructions = 0;
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module_t* module = nullptr;
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procedure_t* function = nullptr;
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flow_graph_t* flow_graph = nullptr;
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string_t module_name = {};
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string_t function_name = {};
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function_signature signature = {};
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basic_block_set_t basic_blocks = {};
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basic_loop_vec_t loop_blocks = {};
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std::vector<std::vector<instruction_t>> instructions = {};
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using str_msg_t = std::tuple<int, string_t, string_t, string_t, string_t>;
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using str_msg_vec_t = std::vector<str_msg_t>;
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size_t start_address = 0;
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uint64_t address_range = 0;
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uint64_t num_instructions = 0;
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module_t* module = nullptr;
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procedure_t* function = nullptr;
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flow_graph_t* flow_graph = nullptr;
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string_t module_name = {};
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string_t function_name = {};
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function_signature signature = {};
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basic_block_set_t basic_blocks = {};
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basic_loop_vec_t loop_blocks = {};
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std::map<instruction_category_t, int64_t> instruction_types = {};
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std::vector<std::vector<instr_addr_pair_t>> instructions = {};
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mutable str_msg_vec_t messages = {};
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@@ -211,21 +212,30 @@ module_function::serialize(ArchiveT& ar, const unsigned)
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cereal::make_nvp("is_loop_num_instructions_constrained",
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is_loop_num_instructions_constrained()));
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ar.finishNode();
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ar.setNextName("instruction_breakdown");
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ar.startNode();
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for(auto itr : instruction_types)
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ar(cereal::make_nvp(std::to_string(itr.first).c_str(), itr.second));
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ar.finishNode();
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// instructions can inflate JSON size so only output when verbosity is increased
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// above default
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if(debug_print || verbose_level > 3 || instr_print)
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{
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std::vector<std::vector<std::string>> _instructions{};
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_instructions.reserve(instructions.size());
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ar.setNextName("instructions");
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ar.startNode();
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ar.makeArray();
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for(auto&& itr : instructions)
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{
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std::vector<std::string> _subinstr{};
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_subinstr.reserve(itr.size());
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ar.startNode();
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for(auto&& iitr : itr)
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_subinstr.emplace_back(iitr.format());
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_instructions.emplace_back(std::move(_subinstr));
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{
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std::stringstream _addr{};
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_addr << "0x" << std::hex << iitr.second;
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ar(cereal::make_nvp(_addr.str().c_str(), iitr.first.format()));
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}
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ar.finishNode();
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}
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ar(cereal::make_nvp("instructions", _instructions));
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ar.finishNode();
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}
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}
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}
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