From d3ac3503e1e9792f8b84e8e1ce4e52cd91a61c59 Mon Sep 17 00:00:00 2001
From: foreman <dl.constructicon@amd.com>
Date: Fri, 31 Mar 2017 13:50:51 -0400
Subject: [PATCH] P4 to Git Change 1393335 by gandryey@gera-w8 on 2017/03/31
 13:43:08

	SWDEV-79445 - OCL generic changes and code clean-up
	- Implement the right fix for SWDEV-115408 and revert CL#1392885. PAL fence reset should occur after WaitForFences(), since there is a possible delay between TS event and OS event

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palvirtual.cpp#45 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palvirtual.hpp#19 edit
... //depot/stg/opencl/drivers/opencl/runtime/utils/flags.hpp#267 edit


[ROCm/clr commit: a708eb45ce97a8f5244ec5318c537cd38a01b7d3]
---
 .../clr/rocclr/runtime/device/pal/palvirtual.cpp  | 15 ++++++++-------
 .../clr/rocclr/runtime/device/pal/palvirtual.hpp  | 13 +++----------
 projects/clr/rocclr/runtime/utils/flags.hpp       |  2 --
 3 files changed, 11 insertions(+), 19 deletions(-)

diff --git a/projects/clr/rocclr/runtime/device/pal/palvirtual.cpp b/projects/clr/rocclr/runtime/device/pal/palvirtual.cpp
index 55b3093c84..fc3594abe5 100644
--- a/projects/clr/rocclr/runtime/device/pal/palvirtual.cpp
+++ b/projects/clr/rocclr/runtime/device/pal/palvirtual.cpp
@@ -246,6 +246,12 @@ VirtualGPU::Queue::flush()
         }
     }
 
+    // Reset the fence. PAL will reset OS event
+    if (Pal::Result::Success != iDev_->ResetFences(1, &iCmdFences_[cmdBufIdSlot_])) {
+        LogError("PAL failed to reset a fence!");
+        return false;
+    }
+
     Pal::SubmitInfo submitInfo = {};
     submitInfo.cmdBufferCount = 1;
     submitInfo.ppCmdBuffers = &iCmdBuffs_[cmdBufIdSlot_];
@@ -279,7 +285,8 @@ VirtualGPU::Queue::flush()
     cmdBufIdSlot_ = cmdBufIdCurrent_ % MaxCmdBuffers;
 
     // Make sure the slot isn't busy
-    waifForFence(cmdBufIdSlot_);
+    constexpr bool IbReuse = true;
+    waifForFence(cmdBufIdSlot_, IbReuse);
 
     // Progress retired TS
     if ((cmdBufIdCurrent_ > MaxCmdBuffers) &&
@@ -287,12 +294,6 @@ VirtualGPU::Queue::flush()
         cmbBufIdRetired_ = cmdBufIdCurrent_ - MaxCmdBuffers;
     }
 
-    if (Pal::Result::Success !=
-        iDev_->ResetFences(1, &iCmdFences_[cmdBufIdSlot_])) {
-        LogError("PAL failed to reset a fence!");
-        return false;
-    }
-
     // Reset command buffer, so CB chunks could be reused
     if (Pal::Result::Success != iCmdBuffs_[cmdBufIdSlot_]->Reset(nullptr, false)) {
         LogError("PAL failed CB reset!");
diff --git a/projects/clr/rocclr/runtime/device/pal/palvirtual.hpp b/projects/clr/rocclr/runtime/device/pal/palvirtual.hpp
index b25d647494..1fc6494b30 100644
--- a/projects/clr/rocclr/runtime/device/pal/palvirtual.hpp
+++ b/projects/clr/rocclr/runtime/device/pal/palvirtual.hpp
@@ -90,7 +90,8 @@ public:
             iDev_->RemoveGpuMemoryReferences(1, &iMem, NULL);
         }
 
-        bool waifForFence(uint cbId) const
+        // ibReuse forces event wait without polling, to make sure event occured
+        bool waifForFence(uint cbId, bool ibReuse = false) const
         {
             Pal::Result result = Pal::Result::Success;
             uint64_t start = amd::Os::timeNanos();
@@ -100,20 +101,12 @@ public:
                     break;
                 }
                 uint64_t end = amd::Os::timeNanos();
-                if ((end - start) < PollIntervalInNsec) {
+                if (!ibReuse && ((end - start) < PollIntervalInNsec)) {
                     amd::Os::yield();
                     continue;
                 }
                 result = iDev_->WaitForFences(1, &iCmdFences_[cbId], true, WaitTimeoutInNsec);
                 if (Pal::Result::Success == result) {
-                    // Note: This is a workaround for a timing sensitive issue when OS event
-                    // succeeded without the actual GPU operation completion.
-                    // The issue occurs under heavy GPU load with more than 1 OCL app running and
-                    // HWS enabled under Win10
-                    while (GPU_PAL_FENCE_VALIDATION &&
-                           (Pal::Result::Success != iCmdFences_[cbId]->GetStatus())) {
-                        amd::Os::yield();
-                    }
                     break;
                 }
                 else if ((Pal::Result::NotReady == result) ||
diff --git a/projects/clr/rocclr/runtime/utils/flags.hpp b/projects/clr/rocclr/runtime/utils/flags.hpp
index 87ef4b5eab..0dcbfdd03a 100644
--- a/projects/clr/rocclr/runtime/utils/flags.hpp
+++ b/projects/clr/rocclr/runtime/utils/flags.hpp
@@ -181,8 +181,6 @@ release(uint, GPU_WAVES_PER_SIMD, 0,                                          \
         "Force the number of waves per SIMD (1-10)")                          \
 release(bool, GPU_WAVE_LIMIT_ENABLE, false,                                   \
         "1 = Enable adaptive wave limiter")                                   \
-release(bool, GPU_PAL_FENCE_VALIDATION, true,                                 \
-        "1 = Enables PAL fence validation with TS")                           \
 release_on_stg(uint, GPU_WAVE_LIMIT_CU_PER_SH, 0,                             \
         "Assume the number of CU per SH for wave limiter")                    \
 release_on_stg(uint, GPU_WAVE_LIMIT_MAX_WAVE, 10,                             \