From d7d7e19de9ae10ade73f32e77db3f73ed677df63 Mon Sep 17 00:00:00 2001 From: kjayapra-amd Date: Sun, 6 Oct 2024 11:46:46 -0400 Subject: [PATCH] SWDEV-459254 - Make the memory alignment as 256 from 128. Change-Id: I349486d315d948d750fdc28bd783e7010154ac3f [ROCm/clr commit: adcacec0dd3fb63889b5269d16d897b915844031] --- projects/clr/rocclr/device/pal/palconstbuf.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/projects/clr/rocclr/device/pal/palconstbuf.cpp b/projects/clr/rocclr/device/pal/palconstbuf.cpp index 7acb7ee0af..7ab4df08cb 100644 --- a/projects/clr/rocclr/device/pal/palconstbuf.cpp +++ b/projects/clr/rocclr/device/pal/palconstbuf.cpp @@ -72,7 +72,7 @@ bool ManagedBuffer::create(Resource::MemoryType type) { // ================================================================================================ address ManagedBuffer::reserve(uint32_t size, uint64_t* gpu_address) { // Align to the maximum data size available in OpenCL - static constexpr uint32_t MemAlignment = sizeof(double[16]); + static constexpr uint32_t MemAlignment = sizeof(double[32]); // Align reserve size on the vector's boundary uint32_t count = amd::alignUp(size, MemAlignment);