Add 'projects/rocr-runtime/' from commit '72061a9024139fa0a99f73f9d3d4deb275670095'
git-subtree-dir: projects/rocr-runtime git-subtree-mainline:ad0fb25ed5git-subtree-split:72061a9024
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////////////////////////////////////////////////////////////////////////////////
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//
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// The University of Illinois/NCSA
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// Open Source License (NCSA)
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//
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// Copyright (c) 2014-2020, Advanced Micro Devices, Inc. All rights reserved.
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//
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// Developed by:
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//
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// AMD Research and AMD HSA Software Development
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//
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// Advanced Micro Devices, Inc.
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//
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// www.amd.com
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to
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// deal with the Software without restriction, including without limitation
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// the rights to use, copy, modify, merge, publish, distribute, sublicense,
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// and/or sell copies of the Software, and to permit persons to whom the
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// Software is furnished to do so, subject to the following conditions:
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//
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// - Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimers.
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// - Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimers in
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// the documentation and/or other materials provided with the distribution.
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// - Neither the names of Advanced Micro Devices, Inc,
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// nor the names of its contributors may be used to endorse or promote
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// products derived from this Software without specific prior written
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// permission.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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// THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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// DEALINGS WITH THE SOFTWARE.
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//
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////////////////////////////////////////////////////////////////////////////////
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#ifndef HSA_RUNTIME_EXT_IMAGE_BLIT_KERNEL_H
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#define HSA_RUNTIME_EXT_IMAGE_BLIT_KERNEL_H
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#include <assert.h>
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#include <atomic>
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#include <mutex>
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#include <unordered_map>
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#include <vector>
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#include "inc/hsa.h"
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#include "resource.h"
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namespace rocr {
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namespace image {
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typedef struct BlitQueue {
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hsa_queue_t* queue_;
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volatile std::atomic<uint64_t> cached_index_;
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} BlitQueue;
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typedef struct BlitCodeInfo {
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uint64_t code_handle_;
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uint32_t group_segment_size_;
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uint32_t private_segment_size_;
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} BlitCodeInfo;
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class BlitKernel {
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public:
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typedef enum KernelOp {
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KERNEL_OP_COPY_IMAGE_TO_BUFFER = 0,
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KERNEL_OP_COPY_BUFFER_TO_IMAGE = 1,
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KERNEL_OP_COPY_IMAGE_DEFAULT = 2,
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KERNEL_OP_COPY_IMAGE_LINEAR_TO_STANDARD = 3,
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KERNEL_OP_COPY_IMAGE_STANDARD_TO_LINEAR = 4,
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KERNEL_OP_COPY_IMAGE_1DB = 5,
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KERNEL_OP_COPY_IMAGE_1DB_TO_REG = 6,
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KERNEL_OP_COPY_IMAGE_REG_TO_1DB = 7,
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KERNEL_OP_CLEAR_IMAGE = 8,
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KERNEL_OP_CLEAR_IMAGE_1DB = 9,
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KERNEL_OP_COUNT = 10
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} KernelOp;
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explicit BlitKernel();
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~BlitKernel();
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hsa_status_t Initialize();
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hsa_status_t Cleanup();
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hsa_status_t BuildBlitCode(hsa_agent_t agent,
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std::vector<BlitCodeInfo>& blit_code_catalog);
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hsa_status_t CopyBufferToImage(
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BlitQueue& blit_queue,
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const std::vector<BlitCodeInfo>& blit_code_catalog,
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const void* src_memory, size_t src_row_pitch, size_t src_slice_pitch,
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const Image& dst_image, const hsa_ext_image_region_t& image_region);
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hsa_status_t CopyImageToBuffer(
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BlitQueue& blit_queue,
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const std::vector<BlitCodeInfo>& blit_code_catalog,
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const Image& src_image, void* dst_memory, size_t dst_row_pitch,
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size_t dst_slice_pitch, const hsa_ext_image_region_t& image_region);
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hsa_status_t CopyImage(BlitQueue& blit_queue,
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const std::vector<BlitCodeInfo>& blit_code_catalog,
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const Image& dst_image, const Image& src_image,
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const hsa_dim3_t& dst_origin,
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const hsa_dim3_t& src_origin, const hsa_dim3_t size,
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KernelOp copy_type);
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hsa_status_t FillImage(BlitQueue& blit_queue,
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const std::vector<BlitCodeInfo>& blit_code_catalog,
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const Image& image, const void* pattern,
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const hsa_ext_image_region_t& region);
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private:
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hsa_status_t PopulateKernelCode(
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hsa_agent_t agent, hsa_executable_t executable,
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std::vector<BlitCodeInfo>& blit_code_catalog);
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inline void CalcBufferRowSlicePitchesInPixel(
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hsa_ext_image_geometry_t geometry, uint32_t element_size,
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const hsa_dim3_t& copy_size, size_t in_row_pitch_byte,
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size_t in_slice_pitch_byte, unsigned long* out_pitch_pixel);
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inline uint32_t GetDimSize(const Image& image);
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inline uint32_t GetNumChannel(const Image& image);
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inline uint32_t GetImageAccessType(const Image& image);
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void CalcWorkingSize(const Image& image, const hsa_dim3_t& range,
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hsa_kernel_dispatch_packet_t& packet);
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void CalcWorkingSize(const Image& src_image, const Image& dst_image,
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const hsa_dim3_t& range,
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hsa_kernel_dispatch_packet_t& packet);
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hsa_status_t ConvertImage(const Image& original_image,
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const Image** new_image);
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hsa_status_t LaunchKernel(BlitQueue& queue,
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hsa_kernel_dispatch_packet_t& packet);
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// The kernels' name.
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static const char* kernel_name_[KERNEL_OP_COUNT];
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static const char* ocl_kernel_name_[KERNEL_OP_COUNT];
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// Mapping of ISA and kernel object.
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std::unordered_map<uint64_t, hsa_code_object_t> code_object_map_;
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// Mapping of ISA and kernel executable.
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std::unordered_map<uint64_t, hsa_executable_t> code_executable_map_;
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std::mutex lock_;
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DISALLOW_COPY_AND_ASSIGN(BlitKernel);
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// Get the patched code object
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hsa_status_t GetPatchedBlitObject(const char* agent_name, uint8_t** code_object_handle);
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};
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} // namespace image
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} // namespace rocr
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#endif // HSA_RUNTIME_EXT_IMAGE_BLIT_KERNEL_H
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