From d92b3a2d908e613a3e8aa0bf74191f7e5c7909b4 Mon Sep 17 00:00:00 2001 From: Jason Tang Date: Fri, 12 Aug 2022 16:02:29 -0400 Subject: [PATCH] SWDEV-333471 - Add GPU_FORCE_QUEUE_PROFILING To support both hip and ocl. HIP_FORCE_QUEUE_PROFILING will be replaced with this later on. Change-Id: I6d3514b1568ff049584ed9fd74bbdb3e4f4bf0c3 --- rocclr/platform/commandqueue.cpp | 8 ++++++-- rocclr/utils/flags.hpp | 2 ++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/rocclr/platform/commandqueue.cpp b/rocclr/platform/commandqueue.cpp index c142a21123..c865bccdd4 100644 --- a/rocclr/platform/commandqueue.cpp +++ b/rocclr/platform/commandqueue.cpp @@ -33,9 +33,9 @@ namespace amd { -HostQueue::HostQueue(Context& context, Device& device, cl_command_queue_properties properties, +HostQueue::HostQueue(Context& context, Device& device, cl_command_queue_properties props, uint queueRTCUs, Priority priority, const std::vector& cuMask) - : CommandQueue(context, device, properties, device.info().queueProperties_, queueRTCUs, + : CommandQueue(context, device, props, device.info().queueProperties_, queueRTCUs, priority, cuMask), lastEnqueueCommand_(nullptr), head_(nullptr), @@ -52,6 +52,10 @@ HostQueue::HostQueue(Context& context, Device& device, cl_command_queue_properti queueLock_.wait(); } } + + if (GPU_FORCE_QUEUE_PROFILING) { + properties().set(CL_QUEUE_PROFILING_ENABLE); + } } bool HostQueue::terminate() { diff --git a/rocclr/utils/flags.hpp b/rocclr/utils/flags.hpp index e45dd2727d..b5e9b9a5ae 100644 --- a/rocclr/utils/flags.hpp +++ b/rocclr/utils/flags.hpp @@ -249,6 +249,8 @@ release(bool, ROC_ENABLE_PRE_VEGA, false, \ "Enable support of pre-vega ASICs in ROCm path") \ release(bool, HIP_FORCE_QUEUE_PROFILING, false, \ "Force command queue profiling by default") \ +release(bool, GPU_FORCE_QUEUE_PROFILING, false, \ + "Force command queue profiling by default") \ release(bool, HIP_MEM_POOL_SUPPORT, false, \ "Enables memory pool support in HIP") \ release(uint, PAL_FORCE_ASIC_REVISION, 0, \