diff --git a/rocrtst/suites/test_common/CMakeLists.txt b/rocrtst/suites/test_common/CMakeLists.txt index 059f8c307a..f40b7e73c2 100755 --- a/rocrtst/suites/test_common/CMakeLists.txt +++ b/rocrtst/suites/test_common/CMakeLists.txt @@ -110,7 +110,7 @@ else() endif() set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810" - "gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx941;gfx942" + "gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx941;gfx942;gfx950" "gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036" "gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1152;gfx1153;gfx1200;gfx1201") diff --git a/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp b/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp index b2270be8f2..21748863e4 100644 --- a/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp +++ b/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp @@ -391,6 +391,8 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar asic_shader = &compiled_shader_it->second.compute_942; break; } + } else if(isa_->GetMinorVersion() == 5) { + asic_shader = &compiled_shader_it->second.compute_942; } else { asic_shader = &compiled_shader_it->second.compute_9; } @@ -447,10 +449,10 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar AMD_HSA_BITS_SET(header->compute_pgm_rsrc2, AMD_COMPUTE_PGM_RSRC_TWO_ENABLE_SGPR_WORKGROUP_ID_X, 1); - // gfx90a, gfx940, gfx941, gfx942 + // gfx90a, gfx940, gfx941, gfx942, gfx950 if ((isa_->GetMajorVersion() == 9) && (((isa_->GetMinorVersion() == 0) && (isa_->GetStepping() == 10)) || - (isa_->GetMinorVersion() == 4))) { + (isa_->GetMinorVersion() == 4 || isa_->GetMinorVersion() == 5))) { // Program COMPUTE_PGM_RSRC3.ACCUM_OFFSET for 0 ACC VGPRs on gfx90a. // FIXME: Assemble code objects from source at build time int gran_accvgprs = ((gran_vgprs + 1) * 8) / 4 - 1; @@ -1314,7 +1316,8 @@ hsa_status_t GpuAgent::GetInfo(hsa_agent_info_t attribute, void* value) const { constexpr size_t hsa_name_size = 63; const bool isa_has_image_support = - (isa_->GetMajorVersion() == 9 && isa_->GetMinorVersion() == 4) ? false : true; + (isa_->GetMajorVersion() == 9 && + (isa_->GetMinorVersion() == 4 || isa_->GetMinorVersion() == 5)) ? false : true; switch (attribute_u) { case HSA_AGENT_INFO_NAME: { @@ -2237,7 +2240,8 @@ void GpuAgent::BindTrapHandler() { trap_code_buf_size_); } else { if (isa_->GetMajorVersion() >= 11 || - (isa_->GetMajorVersion() == 9 && isa_->GetMinorVersion() == 4)) { + (isa_->GetMajorVersion() == 9 && + (isa_->GetMinorVersion() == 4 || isa_->GetMinorVersion() == 5))) { // No trap handler support without exception handling, soft error. return; } diff --git a/runtime/hsa-runtime/core/runtime/isa.cpp b/runtime/hsa-runtime/core/runtime/isa.cpp index 5f1a09b7d8..0312fb69e4 100755 --- a/runtime/hsa-runtime/core/runtime/isa.cpp +++ b/runtime/hsa-runtime/core/runtime/isa.cpp @@ -422,6 +422,15 @@ const IsaRegistry::IsaMap& IsaRegistry::GetSupportedIsas() { ISAREG_ENTRY_GEN("gfx942:sramecc-:xnack+", 9, 4, 2, disabled, enabled, 64, "gfx9-4-generic:sramecc-:xnack+") ISAREG_ENTRY_GEN("gfx942:sramecc+:xnack-", 9, 4, 2, enabled, disabled, 64, "gfx9-4-generic:sramecc+:xnack-") ISAREG_ENTRY_GEN("gfx942:sramecc+:xnack+", 9, 4, 2, enabled, enabled, 64, "gfx9-4-generic:sramecc+:xnack+") + ISAREG_ENTRY_GEN("gfx950", 9, 5, 0, any, any, 64, "gfx9-4-generic") + ISAREG_ENTRY_GEN("gfx950:xnack-", 9, 5, 0, any, disabled, 64, "gfx9-4-generic:xnack-") + ISAREG_ENTRY_GEN("gfx950:xnack+", 9, 5, 0, any, enabled, 64, "gfx9-4-generic:xnack+") + ISAREG_ENTRY_GEN("gfx950:sramecc-", 9, 5, 0, disabled, any, 64, "gfx9-4-generic:sramecc-") + ISAREG_ENTRY_GEN("gfx950:sramecc+", 9, 5, 0, enabled, any, 64, "gfx9-4-generic:sramecc+") + ISAREG_ENTRY_GEN("gfx950:sramecc-:xnack-", 9, 5, 0, disabled, disabled, 64, "gfx9-4-generic:sramecc-:xnack-") + ISAREG_ENTRY_GEN("gfx950:sramecc-:xnack+", 9, 5, 0, disabled, enabled, 64, "gfx9-4-generic:sramecc-:xnack+") + ISAREG_ENTRY_GEN("gfx950:sramecc+:xnack-", 9, 5, 0, enabled, disabled, 64, "gfx9-4-generic:sramecc+:xnack-") + ISAREG_ENTRY_GEN("gfx950:sramecc+:xnack+", 9, 5, 0, enabled, enabled, 64, "gfx9-4-generic:sramecc+:xnack+") ISAREG_ENTRY_GEN("gfx1010", 10, 1, 0, unsupported, any, 32, "gfx10-1-generic") ISAREG_ENTRY_GEN("gfx1010:xnack-", 10, 1, 0, unsupported, disabled, 32, "gfx10-1-generic:xnack-") ISAREG_ENTRY_GEN("gfx1010:xnack+", 10, 1, 0, unsupported, enabled, 32, "gfx10-1-generic:xnack+") diff --git a/runtime/hsa-runtime/core/runtime/trap_handler/CMakeLists.txt b/runtime/hsa-runtime/core/runtime/trap_handler/CMakeLists.txt index 2515724127..6f37e9e375 100644 --- a/runtime/hsa-runtime/core/runtime/trap_handler/CMakeLists.txt +++ b/runtime/hsa-runtime/core/runtime/trap_handler/CMakeLists.txt @@ -46,9 +46,9 @@ cmake_minimum_required ( VERSION 3.7 ) find_package(Clang REQUIRED HINTS ${CMAKE_PREFIX_PATH}/llvm PATHS /opt/rocm/llvm ) find_package(LLVM REQUIRED HINTS ${CMAKE_PREFIX_PATH}/llvm PATHS /opt/rocm/llvm ) -set (TARGET_DEVS "gfx900;gfx940;gfx941;gfx942;gfx1010;gfx1030;gfx1100;gfx1200") -set (POSTFIX "9;940;941;942;1010;10;11;12") -set (SOURCE_SUFFIX ";;;;;;;_gfx12") +set (TARGET_DEVS "gfx900;gfx940;gfx941;gfx942;gfx950;gfx1010;gfx1030;gfx1100;gfx1200") +set (POSTFIX "9;940;941;942;950;1010;10;11;12") +set (SOURCE_SUFFIX ";;;;;;;;_gfx12") if(${CMAKE_VERBOSE_MAKEFILE}) get_property(clang_path TARGET clang PROPERTY LOCATION) diff --git a/runtime/hsa-runtime/image/blit_kernel.cpp b/runtime/hsa-runtime/image/blit_kernel.cpp index 8b60a4892e..4fa3bc9f9e 100644 --- a/runtime/hsa-runtime/image/blit_kernel.cpp +++ b/runtime/hsa-runtime/image/blit_kernel.cpp @@ -88,6 +88,7 @@ extern uint8_t ocl_blit_object_gfx90c[]; extern uint8_t ocl_blit_object_gfx940[]; extern uint8_t ocl_blit_object_gfx941[]; extern uint8_t ocl_blit_object_gfx942[]; +extern uint8_t ocl_blit_object_gfx950[]; extern uint8_t ocl_blit_object_gfx1010[]; extern uint8_t ocl_blit_object_gfx1011[]; extern uint8_t ocl_blit_object_gfx1012[]; @@ -1022,6 +1023,8 @@ hsa_status_t BlitKernel::GetPatchedBlitObject(const char* agent_name, *blit_code_object = ocl_blit_object_gfx941; } else if (sname == "gfx942") { *blit_code_object = ocl_blit_object_gfx942; + } else if (sname == "gfx950") { + *blit_code_object = ocl_blit_object_gfx950; } else if (sname == "gfx1010") { *blit_code_object = ocl_blit_object_gfx1010; } else if (sname == "gfx1011") { diff --git a/runtime/hsa-runtime/image/blit_src/CMakeLists.txt b/runtime/hsa-runtime/image/blit_src/CMakeLists.txt index 6aae7a559b..2559fe9f50 100644 --- a/runtime/hsa-runtime/image/blit_src/CMakeLists.txt +++ b/runtime/hsa-runtime/image/blit_src/CMakeLists.txt @@ -48,7 +48,7 @@ find_package(Clang REQUIRED HINTS ${CMAKE_PREFIX_PATH}/llvm PATHS /opt/rocm/llvm # Determine the target devices if not specified if (NOT DEFINED TARGET_DEVICES) set (TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810" - "gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx941;gfx942" + "gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx941;gfx942;gfx950" "gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036" "gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151;gfx1152;gfx1153;gfx1200;gfx1201") endif() diff --git a/runtime/hsa-runtime/inc/amd_hsa_elf.h b/runtime/hsa-runtime/inc/amd_hsa_elf.h index 6a2331cbc8..2b6c4c9672 100644 --- a/runtime/hsa-runtime/inc/amd_hsa_elf.h +++ b/runtime/hsa-runtime/inc/amd_hsa_elf.h @@ -136,7 +136,7 @@ enum : unsigned { EF_AMDGPU_MACH_AMDGCN_GFX942 = 0x04c, EF_AMDGPU_MACH_AMDGCN_RESERVED_0X4D = 0x04d, EF_AMDGPU_MACH_AMDGCN_GFX1201 = 0x04e, - EF_AMDGPU_MACH_AMDGCN_RESERVED_0X4F = 0x04f, + EF_AMDGPU_MACH_AMDGCN_GFX950 = 0x04f, EF_AMDGPU_MACH_AMDGCN_RESERVED_0X50 = 0x050, EF_AMDGPU_MACH_AMDGCN_GFX9_GENERIC = 0x051, EF_AMDGPU_MACH_AMDGCN_GFX10_1_GENERIC = 0x052, diff --git a/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp b/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp index 6d7fbe23a8..2abe5d2dbb 100644 --- a/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp +++ b/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp @@ -588,6 +588,7 @@ namespace code { case ELF::EF_AMDGPU_MACH_AMDGCN_GFX940: MI.Name = "gfx940"; MI.XnackSupported = true; MI.SrameccSupported = true; break; case ELF::EF_AMDGPU_MACH_AMDGCN_GFX941: MI.Name = "gfx941"; MI.XnackSupported = true; MI.SrameccSupported = true; break; case ELF::EF_AMDGPU_MACH_AMDGCN_GFX942: MI.Name = "gfx942"; MI.XnackSupported = true; MI.SrameccSupported = true; break; + case ELF::EF_AMDGPU_MACH_AMDGCN_GFX950: MI.Name = "gfx950"; MI.XnackSupported = true; MI.SrameccSupported = true; break; case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010: MI.Name = "gfx1010"; MI.XnackSupported = true; MI.SrameccSupported = false; break; case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011: MI.Name = "gfx1011"; MI.XnackSupported = true; MI.SrameccSupported = false; break; case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012: MI.Name = "gfx1012"; MI.XnackSupported = true; MI.SrameccSupported = false; break;