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SWDEV-534207 - Solve more phoenix mem test failures (#545)

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* SWDEV-534207 - fix 'Unit_hipFreeMipmappedArrayImplicitSyncArray - float' out of memory error with extent (1024, 1024, 1024) and 1 levels on 740M iGPUs. totalGlobalMem is not really the amount of device memory available for compute

* SWDEV-534207 - compare expected available memory within a range in Unit_hipMalloc3D_Basic; to take into account some bookkeeping overhead (instead of in exact 64MB chunks)

* SWDEV-534207 - fix missing setting of SvmGpuMemoryCreateInfo::interprocess in the 'fine' and 'fine uncached' memory and 'MemorySubAllocator' cases. Coarse allocation was added first; the flag was missed when the other three cases were added

* SWDEV-534207 - allow more room for the check of available memory after hipFree() in Unit_hipMalloc3D_Basic; it was till failing on 740M

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Co-authored-by: Gerardo Hernandez <gerardo.hernandez@amd.com>
Co-authored-by: systems-assistant[bot] <systems-assistant[bot]@users.noreply.github.com>
This commit is contained in:
systems-assistant[bot]
2025-10-17 15:49:57 +01:00
committed by GitHub
parent 9664f1dc91
commit dae5b30a1a
3 changed files with 26 additions and 8 deletions
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projects/clr/rocclr/device/pal/palresource.cpp
+12
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@@ -2073,6 +2073,10 @@ bool MemorySubAllocator::CreateChunk(const Pal::IGpuMemory* reserved_va) {
createInfo.heaps[2] = Pal::GpuHeapGartUswc;
createInfo.flags.peerWritable = device_->P2PAccessAllowed();
createInfo.mallPolicy = static_cast<Pal::GpuMemMallPolicy>(device_->settings().mallPolicy_);
if (amd::IS_HIP && PAL_HIP_IPC_FLAG) {
// set interprocess for IPC memory support
createInfo.flags.interprocess = 1;
}
GpuMemoryReference* mem_ref = GpuMemoryReference::Create(*device_, createInfo);
if (mem_ref != nullptr) {
// Workaround: some chunk memory are not guaranteed to be resident during initial allocation.
@@ -2117,6 +2121,10 @@ bool FineMemorySubAllocator::CreateChunk(const Pal::IGpuMemory* reserved_va) {
createInfo.flags.useReservedGpuVa = (reserved_va != nullptr);
createInfo.pReservedGpuVaOwner = reserved_va;
createInfo.mallPolicy = Pal::GpuMemMallPolicy::Never;
if (amd::IS_HIP && PAL_HIP_IPC_FLAG) {
//set interprocess for IPC memory support
createInfo.flags.interprocess = 1;
}
GpuMemoryReference* mem_ref = GpuMemoryReference::Create(*device_, createInfo);
if ((mem_ref != nullptr) && InitAllocator(mem_ref)) {
// Workaround: some chunk memory are not guaranteed to be resident during initial allocation.
@@ -2137,6 +2145,10 @@ bool FineUncachedMemorySubAllocator::CreateChunk(const Pal::IGpuMemory* reserved
createInfo.pReservedGpuVaOwner = reserved_va;
createInfo.flags.gl2Uncached = true;
createInfo.mallPolicy = Pal::GpuMemMallPolicy::Never;
if (amd::IS_HIP && PAL_HIP_IPC_FLAG) {
//set interprocess for IPC memory support
createInfo.flags.interprocess = 1;
}
GpuMemoryReference* mem_ref = GpuMemoryReference::Create(*device_, createInfo);
if ((mem_ref != nullptr) && InitAllocator(mem_ref)) {
// Workaround: some chunk memory are not guaranteed to be resident during initial allocation.