Merge amd-dev into amd-master 20240828

Signed-off-by: Zhang Ava <niandong.zhang@amd.com>
Change-Id: Ice54ff21b716f137e764687270585239706ea639

amdsmi_cli/amdsmi_commands.py

@@ -693,7 +693,8 @@ class AMDSMICommands():
         if args.vram:
             vram_info_dict = {"type" : "N/A",
                               "vendor" : "N/A",
-                              "size" : "N/A"}
+                              "size" : "N/A",
+                              "bit_width" : "N/A"}
             try:
                 vram_info = amdsmi_interface.amdsmi_get_gpu_vram_info(args.gpu)
 
@@ -729,6 +730,9 @@ class AMDSMICommands():
                     vram_info_dict['size'] = {"value" : vram_info['vram_size'],
                                               "unit" : vram_size_unit}
 
+                # Populate bit width
+                vram_info_dict['bit_width'] = vram_info['vram_bit_width']
+
             except amdsmi_exception.AmdSmiLibraryException as e:
                 logging.debug("Failed to get vram info for gpu %s | %s", gpu_id, e.get_error_info())
 

example/amd_smi_drm_example.cc

@@ -301,7 +301,22 @@ int main() {
             printf("\tDeviceID: 0x%lx\n", asic_info.device_id);
             printf("\tVendorID: 0x%x\n", asic_info.vendor_id);
             printf("\tRevisionID: 0x%x\n", asic_info.rev_id);
-            printf("\tAsic serial: 0x%s\n\n", asic_info.asic_serial);
+            printf("\tAsic serial: 0x%s\n", asic_info.asic_serial);
+            printf("\tNum of Computes: %d\n\n", asic_info.num_of_compute_units);
+
+            // Get VRAM info
+            amdsmi_vram_info_t vram_info = {};
+            ret = amdsmi_get_gpu_vram_info(processor_handles[j], &vram_info);
+            if (ret != amdsmi_status_t::AMDSMI_STATUS_NOT_SUPPORTED) {
+                CHK_AMDSMI_RET(ret)
+                printf("    Output of amdsmi_get_gpu_vram_info:\n");
+                printf("\tVRAM Size: 0x%lx (%ld) \n", vram_info.vram_size, vram_info.vram_size);
+                printf("\tBIT Width: 0x%x (%d) \n\n", vram_info.vram_bit_width, vram_info.vram_bit_width);
+            }
+            else {
+                printf("\t**amdsmi_get_gpu_vram_info() not supported on this system.\n");
+            }
+
 
             // Get VBIOS info
             amdsmi_vbios_info_t vbios_info = {};

example/amd_smi_nodrm_example.cc

@@ -151,7 +151,8 @@ int main() {
             printf("\tVendorID: 0x%x\n", asic_info.vendor_id);
             printf("\tRevisionID: 0x%x\n", asic_info.rev_id);
             printf("\tAsic serial: 0x%s\n", asic_info.asic_serial);
-            printf("\tOAM id: 0x%x\n\n", asic_info.oam_id);
+            printf("\tOAM id: 0x%x\n", asic_info.oam_id);
+            printf("\tNum of Computes: %d\n\n", asic_info.num_of_compute_units);
 
             // Get VBIOS info
             amdsmi_vbios_info_t vbios_info = {};

include/amd_smi/amdsmi.h

@@ -588,7 +588,8 @@ typedef struct {
   uint32_t rev_id;
   char asic_serial[AMDSMI_NORMAL_STRING_LENGTH];
   uint32_t oam_id;   //< 0xFFFF if not supported
-  uint32_t reserved[18];
+  uint32_t num_of_compute_units;   //< 0xFFFFFFFF if not supported
+  uint32_t reserved[17];
 } amdsmi_asic_info_t;
 
 typedef enum {
@@ -616,7 +617,8 @@ typedef struct {
   amdsmi_vram_type_t vram_type;
   amdsmi_vram_vendor_type_t vram_vendor;
   uint64_t vram_size;
-  uint64_t reserved[6];
+  uint32_t vram_bit_width;
+  uint64_t reserved[5];
 } amdsmi_vram_info_t;
 
 
@@ -1093,10 +1095,15 @@ typedef enum {
  */
 typedef enum {
   AMDSMI_UTILIZATION_COUNTER_FIRST = 0,
-  //!< GFX Activity
+  //!< Corse grain activity counters
   AMDSMI_COARSE_GRAIN_GFX_ACTIVITY  = AMDSMI_UTILIZATION_COUNTER_FIRST,
   AMDSMI_COARSE_GRAIN_MEM_ACTIVITY,    //!< Memory Activity
-  AMDSMI_UTILIZATION_COUNTER_LAST = AMDSMI_COARSE_GRAIN_MEM_ACTIVITY
+  AMDSMI_COARSE_DECODER_ACTIVITY,      //!< Decoder Activity
+  //!< Fine grain activity counters
+  AMDSMI_FINE_GRAIN_GFX_ACTIVITY = 100,
+  AMDSMI_FINE_GRAIN_MEM_ACTIVITY = 101,
+  AMDSMI_FINE_DECODER_ACTIVITY   = 102,
+  AMDSMI_UTILIZATION_COUNTER_LAST = AMDSMI_FINE_DECODER_ACTIVITY
 } amdsmi_utilization_counter_type_t;
 
 /**
@@ -1111,11 +1118,16 @@ typedef enum {
 /**
  * @brief The utilization counter data
  */
+//! The max number of values per counter type
+#define AMDSMI_MAX_UTILIZATION_VALUES 4
 typedef struct {
-  amdsmi_utilization_counter_type_t type;   //!< Utilization counter type
+  amdsmi_utilization_counter_type_t type;              //!< Utilization counter type
-  uint64_t value;                       //!< Utilization counter value
+  uint64_t value;                                      //!< Coarse grain activity counter value (average)
+  uint64_t fine_value[AMDSMI_MAX_UTILIZATION_VALUES];  //!< Utilization counter value
+  uint16_t fine_value_count;
 } amdsmi_utilization_counter_t;
 
+
 /**
  * @brief Reserved Memory Page Record
  */

py-interface/amdsmi_interface.py

@@ -386,6 +386,10 @@ class AmdSmiIoLinkType(IntEnum):
 class AmdSmiUtilizationCounterType(IntEnum):
     COARSE_GRAIN_GFX_ACTIVITY = amdsmi_wrapper.AMDSMI_COARSE_GRAIN_GFX_ACTIVITY
     COARSE_GRAIN_MEM_ACTIVITY = amdsmi_wrapper.AMDSMI_COARSE_GRAIN_MEM_ACTIVITY
+    COARSE_DECODER_ACTIVITY = amdsmi_wrapper.AMDSMI_COARSE_DECODER_ACTIVITY
+    FINE_GRAIN_GFX_ACTIVITY = amdsmi_wrapper.AMDSMI_FINE_GRAIN_GFX_ACTIVITY
+    FINE_GRAIN_MEM_ACTIVITY = amdsmi_wrapper.AMDSMI_FINE_GRAIN_MEM_ACTIVITY
+    FINE_DECODER_ACTIVITY = amdsmi_wrapper.AMDSMI_FINE_DECODER_ACTIVITY
     UTILIZATION_COUNTER_FIRST = amdsmi_wrapper.AMDSMI_UTILIZATION_COUNTER_FIRST
     UTILIZATION_COUNTER_LAST = amdsmi_wrapper.AMDSMI_UTILIZATION_COUNTER_LAST
 
@@ -1639,7 +1643,8 @@ def amdsmi_get_gpu_asic_info(
         "device_id": asic_info_struct.device_id,
         "rev_id": _padHexValue(hex(asic_info_struct.rev_id), 2),
         "asic_serial": asic_info_struct.asic_serial.decode("utf-8"),
-        "oam_id": asic_info_struct.oam_id
+        "oam_id": asic_info_struct.oam_id,
+        "num_compute_units": asic_info_struct.num_of_compute_units
     }
 
     string_values = ["market_name", "vendor_name"]
@@ -1666,6 +1671,10 @@ def amdsmi_get_gpu_asic_info(
     if asic_info["oam_id"] == 0xFFFF: # uint 16 max
         asic_info["oam_id"] = "N/A"
 
+    # Check for max value as a sign for not applicable
+    if asic_info["num_compute_units"] == 0xFFFFFFFF: # uint 32 max
+        asic_info["num_compute_units"] = "N/A"
+
     # Remove commas from vendor name for clean output
     asic_info["vendor_name"] = asic_info["vendor_name"].replace(',', '')
 
@@ -1766,6 +1775,7 @@ def amdsmi_get_gpu_vram_info(
         "vram_type": vram_info.vram_type,
         "vram_vendor": vram_info.vram_vendor,
         "vram_size": vram_info.vram_size,
+        "vram_bit_width": vram_info.vram_bit_width
     }
 
 
@@ -3395,7 +3405,7 @@ def amdsmi_get_utilization_count(
         if counter_type == "AMDSMI_UTILIZATION_COUNTER_FIRST":
             counter_type = "AMDSMI_COARSE_GRAIN_GPU_ACTIVITY"
         if counter_type == "AMDSMI_UTILIZATION_COUNTER_LAST":
-            counter_type = "AMDSMI_COARSE_GRAIN_MEM_ACTIVITY"
+            counter_type = "AMDSMI_FINE_DECODER_ACTIVITY"
         result.append(
             {"type": counter_type, "value": util_counter_list[index].value})
 

py-interface/amdsmi_wrapper.py

@@ -901,7 +901,8 @@ struct_amdsmi_asic_info_t._fields_ = [
     ('rev_id', ctypes.c_uint32),
     ('asic_serial', ctypes.c_char * 32),
     ('oam_id', ctypes.c_uint32),
-    ('reserved', ctypes.c_uint32 * 18),
+    ('num_of_compute_units', ctypes.c_uint32),
+    ('reserved', ctypes.c_uint32 * 17),
 ]
 
 amdsmi_asic_info_t = struct_amdsmi_asic_info_t
@@ -953,7 +954,9 @@ struct_amdsmi_vram_info_t._fields_ = [
     ('vram_type', amdsmi_vram_type_t),
     ('vram_vendor', amdsmi_vram_vendor_type_t),
     ('vram_size', ctypes.c_uint64),
-    ('reserved', ctypes.c_uint64 * 6),
+    ('vram_bit_width', ctypes.c_uint32),
+    ('PADDING_0', ctypes.c_ubyte * 4),
+    ('reserved', ctypes.c_uint64 * 5),
 ]
 
 amdsmi_vram_info_t = struct_amdsmi_vram_info_t
@@ -1452,12 +1455,20 @@ amdsmi_utilization_counter_type_t__enumvalues = {
     0: 'AMDSMI_UTILIZATION_COUNTER_FIRST',
     0: 'AMDSMI_COARSE_GRAIN_GFX_ACTIVITY',
     1: 'AMDSMI_COARSE_GRAIN_MEM_ACTIVITY',
-    1: 'AMDSMI_UTILIZATION_COUNTER_LAST',
+    2: 'AMDSMI_COARSE_DECODER_ACTIVITY',
+    100: 'AMDSMI_FINE_GRAIN_GFX_ACTIVITY',
+    101: 'AMDSMI_FINE_GRAIN_MEM_ACTIVITY',
+    102: 'AMDSMI_FINE_DECODER_ACTIVITY',
+    102: 'AMDSMI_UTILIZATION_COUNTER_LAST',
 }
 AMDSMI_UTILIZATION_COUNTER_FIRST = 0
 AMDSMI_COARSE_GRAIN_GFX_ACTIVITY = 0
 AMDSMI_COARSE_GRAIN_MEM_ACTIVITY = 1
-AMDSMI_UTILIZATION_COUNTER_LAST = 1
+AMDSMI_COARSE_DECODER_ACTIVITY = 2
+AMDSMI_FINE_GRAIN_GFX_ACTIVITY = 100
+AMDSMI_FINE_GRAIN_MEM_ACTIVITY = 101
+AMDSMI_FINE_DECODER_ACTIVITY = 102
+AMDSMI_UTILIZATION_COUNTER_LAST = 102
 amdsmi_utilization_counter_type_t = ctypes.c_uint32 # enum
 
 # values for enumeration 'amdsmi_power_type_t'
@@ -1478,6 +1489,9 @@ struct_amdsmi_utilization_counter_t._fields_ = [
     ('type', amdsmi_utilization_counter_type_t),
     ('PADDING_0', ctypes.c_ubyte * 4),
     ('value', ctypes.c_uint64),
+    ('fine_value', ctypes.c_uint64 * 4),
+    ('fine_value_count', ctypes.c_uint16),
+    ('PADDING_1', ctypes.c_ubyte * 6),
 ]
 
 amdsmi_utilization_counter_t = struct_amdsmi_utilization_counter_t
@@ -2411,6 +2425,7 @@ __all__ = \
     'AMDSMI_CLK_TYPE_SYS', 'AMDSMI_CLK_TYPE_VCLK0',
     'AMDSMI_CLK_TYPE_VCLK1', 'AMDSMI_CLK_TYPE__MAX',
     'AMDSMI_CNTR_CMD_START', 'AMDSMI_CNTR_CMD_STOP',
+    'AMDSMI_COARSE_DECODER_ACTIVITY',
     'AMDSMI_COARSE_GRAIN_GFX_ACTIVITY',
     'AMDSMI_COARSE_GRAIN_MEM_ACTIVITY',
     'AMDSMI_COMPUTE_PARTITION_CPX', 'AMDSMI_COMPUTE_PARTITION_DPX',
@@ -2443,25 +2458,27 @@ __all__ = \
     'AMDSMI_EVT_NOTIF_GPU_PRE_RESET', 'AMDSMI_EVT_NOTIF_LAST',
     'AMDSMI_EVT_NOTIF_NONE', 'AMDSMI_EVT_NOTIF_RING_HANG',
     'AMDSMI_EVT_NOTIF_THERMAL_THROTTLE', 'AMDSMI_EVT_NOTIF_VMFAULT',
-    'AMDSMI_FREQ_IND_INVALID', 'AMDSMI_FREQ_IND_MAX',
+    'AMDSMI_FINE_DECODER_ACTIVITY', 'AMDSMI_FINE_GRAIN_GFX_ACTIVITY',
-    'AMDSMI_FREQ_IND_MIN', 'AMDSMI_FW_ID_ASD', 'AMDSMI_FW_ID_CP_CE',
+    'AMDSMI_FINE_GRAIN_MEM_ACTIVITY', 'AMDSMI_FREQ_IND_INVALID',
-    'AMDSMI_FW_ID_CP_ME', 'AMDSMI_FW_ID_CP_MEC1',
+    'AMDSMI_FREQ_IND_MAX', 'AMDSMI_FREQ_IND_MIN', 'AMDSMI_FW_ID_ASD',
-    'AMDSMI_FW_ID_CP_MEC2', 'AMDSMI_FW_ID_CP_MEC_JT1',
+    'AMDSMI_FW_ID_CP_CE', 'AMDSMI_FW_ID_CP_ME',
-    'AMDSMI_FW_ID_CP_MEC_JT2', 'AMDSMI_FW_ID_CP_MES',
+    'AMDSMI_FW_ID_CP_MEC1', 'AMDSMI_FW_ID_CP_MEC2',
-    'AMDSMI_FW_ID_CP_PFP', 'AMDSMI_FW_ID_CP_PM4', 'AMDSMI_FW_ID_DFC',
+    'AMDSMI_FW_ID_CP_MEC_JT1', 'AMDSMI_FW_ID_CP_MEC_JT2',
-    'AMDSMI_FW_ID_DMCU', 'AMDSMI_FW_ID_DMCU_ERAM',
+    'AMDSMI_FW_ID_CP_MES', 'AMDSMI_FW_ID_CP_PFP',
-    'AMDSMI_FW_ID_DMCU_ISR', 'AMDSMI_FW_ID_DRV_CAP',
+    'AMDSMI_FW_ID_CP_PM4', 'AMDSMI_FW_ID_DFC', 'AMDSMI_FW_ID_DMCU',
-    'AMDSMI_FW_ID_FIRST', 'AMDSMI_FW_ID_IMU_DRAM',
+    'AMDSMI_FW_ID_DMCU_ERAM', 'AMDSMI_FW_ID_DMCU_ISR',
-    'AMDSMI_FW_ID_IMU_IRAM', 'AMDSMI_FW_ID_ISP', 'AMDSMI_FW_ID_MC',
+    'AMDSMI_FW_ID_DRV_CAP', 'AMDSMI_FW_ID_FIRST',
-    'AMDSMI_FW_ID_MES_KIQ', 'AMDSMI_FW_ID_MES_STACK',
+    'AMDSMI_FW_ID_IMU_DRAM', 'AMDSMI_FW_ID_IMU_IRAM',
-    'AMDSMI_FW_ID_MES_THREAD1', 'AMDSMI_FW_ID_MES_THREAD1_STACK',
+    'AMDSMI_FW_ID_ISP', 'AMDSMI_FW_ID_MC', 'AMDSMI_FW_ID_MES_KIQ',
-    'AMDSMI_FW_ID_MMSCH', 'AMDSMI_FW_ID_PM', 'AMDSMI_FW_ID_PPTABLE',
+    'AMDSMI_FW_ID_MES_STACK', 'AMDSMI_FW_ID_MES_THREAD1',
-    'AMDSMI_FW_ID_PSP_BL', 'AMDSMI_FW_ID_PSP_DBG',
+    'AMDSMI_FW_ID_MES_THREAD1_STACK', 'AMDSMI_FW_ID_MMSCH',
-    'AMDSMI_FW_ID_PSP_INTF', 'AMDSMI_FW_ID_PSP_KEYDB',
+    'AMDSMI_FW_ID_PM', 'AMDSMI_FW_ID_PPTABLE', 'AMDSMI_FW_ID_PSP_BL',
-    'AMDSMI_FW_ID_PSP_SOC', 'AMDSMI_FW_ID_PSP_SOSDRV',
+    'AMDSMI_FW_ID_PSP_DBG', 'AMDSMI_FW_ID_PSP_INTF',
-    'AMDSMI_FW_ID_PSP_SPL', 'AMDSMI_FW_ID_PSP_SYSDRV',
+    'AMDSMI_FW_ID_PSP_KEYDB', 'AMDSMI_FW_ID_PSP_SOC',
-    'AMDSMI_FW_ID_PSP_TOC', 'AMDSMI_FW_ID_REG_ACCESS_WHITELIST',
+    'AMDSMI_FW_ID_PSP_SOSDRV', 'AMDSMI_FW_ID_PSP_SPL',
-    'AMDSMI_FW_ID_RLC', 'AMDSMI_FW_ID_RLCV_LX7', 'AMDSMI_FW_ID_RLC_P',
+    'AMDSMI_FW_ID_PSP_SYSDRV', 'AMDSMI_FW_ID_PSP_TOC',
+    'AMDSMI_FW_ID_REG_ACCESS_WHITELIST', 'AMDSMI_FW_ID_RLC',
+    'AMDSMI_FW_ID_RLCV_LX7', 'AMDSMI_FW_ID_RLC_P',
     'AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL',
     'AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM',
     'AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM',

rocm_smi/include/rocm_smi/rocm_smi.h

@@ -765,10 +765,15 @@ typedef enum _RSMI_IO_LINK_TYPE {
  */
 typedef enum {
   RSMI_UTILIZATION_COUNTER_FIRST = 0,
-  //!< GFX Activity
+  //!< Corse grain activity counters
   RSMI_COARSE_GRAIN_GFX_ACTIVITY  = RSMI_UTILIZATION_COUNTER_FIRST,
   RSMI_COARSE_GRAIN_MEM_ACTIVITY,    //!< Memory Activity
-  RSMI_UTILIZATION_COUNTER_LAST = RSMI_COARSE_GRAIN_MEM_ACTIVITY
+  RSMI_COARSE_DECODER_ACTIVITY,      //!< Decoder Activity
+  //!< Fine grain activity counters
+  RSMI_FINE_GRAIN_GFX_ACTIVITY = 100,
+  RSMI_FINE_GRAIN_MEM_ACTIVITY = 101,
+  RSMI_FINE_DECODER_ACTIVITY   = 102,
+  RSMI_UTILIZATION_COUNTER_LAST = RSMI_FINE_DECODER_ACTIVITY
 } RSMI_UTILIZATION_COUNTER_TYPE;
 
 /**
@@ -783,11 +788,16 @@ typedef enum {
 /**
  * @brief The utilization counter data
  */
+//! The max number of values per counter type
+#define RSMI_MAX_UTILIZATION_VALUES 4
 typedef struct  {
-  RSMI_UTILIZATION_COUNTER_TYPE type;   //!< Utilization counter type
+  RSMI_UTILIZATION_COUNTER_TYPE type;           //!< Utilization counter type
-  uint64_t value;                       //!< Utilization counter value
+  uint64_t value;                                    //!< Coarse grain activity counter value (average)
+  uint64_t fine_value[RSMI_MAX_UTILIZATION_VALUES];  //!< Utilization counter value (individual values)
+  uint16_t fine_value_count;
 } rsmi_utilization_counter_t;
 
+
 /**
  * @brief Reserved Memory Page Record
  */

rocm_smi/include/rocm_smi/rocm_smi_kfd.h

@@ -90,6 +90,10 @@ class KFDNode {
     // Get gfx target version from kfd
     int get_gfx_target_version(uint64_t* gfx_target_version);
 
+    // Get simd_per_cu from kfd
+    int32_t get_simd_per_cu(uint64_t* simd_per_cu) const;
+    int32_t get_simd_count(uint64_t* simd_count) const;
+
  private:
     uint32_t node_indx_;
     uint32_t amdgpu_dev_index_;

rocm_smi/include/rocm_smi/rocm_smi_utils.h

@@ -126,8 +126,8 @@ std::string print_rsmi_od_volt_freq_data_t(rsmi_od_volt_freq_data_t *odv);
 std::string print_rsmi_od_volt_freq_regions(uint32_t num_regions,
                                             rsmi_freq_volt_region_t *regions);
 bool is_sudo_user();
-rsmi_status_t rsmi_get_gfx_target_version(uint32_t dv_ind,
+rsmi_status_t rsmi_get_gfx_target_version(uint32_t dv_ind, std::string *gfx_version);
-  std::string *gfx_version);
+rsmi_status_t rsmi_dev_number_of_computes_get(uint32_t dv_ind, uint32_t* num_computes);
 
 std::string leftTrim(const std::string &s);
 std::string rightTrim(const std::string &s);

rocm_smi/src/rocm_smi.cc

@@ -62,6 +62,7 @@
 #include <iterator>
 #include <map>
 #include <sstream>
+#include <type_traits>
 #include <vector>
 #include <unordered_map>
 #include <unordered_set>
@@ -4209,6 +4210,7 @@ rsmi_utilization_count_get(uint32_t dv_ind,
   rsmi_status_t ret;
   rsmi_gpu_metrics_t gpu_metrics;
   uint32_t val_ui32;
+  uint16_t val_counter(0);
 
   ret = rsmi_dev_gpu_metrics_info_get(dv_ind, &gpu_metrics);
   if (ret != RSMI_STATUS_SUCCESS) {
@@ -4217,21 +4219,61 @@ rsmi_utilization_count_get(uint32_t dv_ind,
 
   for (uint32_t index = 0 ; index < count; index++) {
     switch (utilization_counters[index].type) {
+
       case RSMI_COARSE_GRAIN_GFX_ACTIVITY:
-        val_ui32 = gpu_metrics.gfx_activity_acc;
+      case RSMI_FINE_GRAIN_GFX_ACTIVITY:
+        val_counter = 1;
+        utilization_counters[index].value = gpu_metrics.gfx_activity_acc;
+        utilization_counters[index].fine_value[0] =
+          (gpu_metrics.gfx_activity_acc != std::numeric_limits<decltype(gpu_metrics.gfx_activity_acc)>::max())
+            ? gpu_metrics.gfx_activity_acc : std::numeric_limits<uint64_t>::max();
+        utilization_counters[index].fine_value_count =
+            (gpu_metrics.gfx_activity_acc == std::numeric_limits<decltype(gpu_metrics.gfx_activity_acc)>::max())
+            ? 0 : val_counter;
         break;
+
       case RSMI_COARSE_GRAIN_MEM_ACTIVITY:
-        val_ui32 = gpu_metrics.mem_activity_acc;
+      case RSMI_FINE_GRAIN_MEM_ACTIVITY:
+        val_counter = 1;
+        utilization_counters[index].value = gpu_metrics.mem_activity_acc;
+        utilization_counters[index].fine_value[0] =
+          (gpu_metrics.mem_activity_acc != std::numeric_limits<decltype(gpu_metrics.mem_activity_acc)>::max())
+            ? gpu_metrics.mem_activity_acc : std::numeric_limits<uint64_t>::max();
+        utilization_counters[index].fine_value_count =
+            (gpu_metrics.mem_activity_acc == std::numeric_limits<decltype(gpu_metrics.mem_activity_acc)>::max())
+            ? 0 : val_counter;
         break;
+
+      case RSMI_COARSE_DECODER_ACTIVITY:
+      case RSMI_FINE_DECODER_ACTIVITY:
+        {
+          auto value_count = uint16_t(0);
+          auto value_accum = uint64_t(0);
+          for (const auto& elem : gpu_metrics.vcn_activity) {
+            if (elem != std::numeric_limits<uint16_t>::max()) {
+              ++value_count;
+              value_accum += elem;
+            }
+
+            if (utilization_counters[index].type == RSMI_UTILIZATION_COUNTER_TYPE::RSMI_FINE_DECODER_ACTIVITY) {
+              utilization_counters[index].fine_value[value_count] = elem;
+            }
+          }
+
+          utilization_counters[index].value = 0;
+          utilization_counters[index].fine_value_count = value_count;
+          if (utilization_counters[index].type == RSMI_UTILIZATION_COUNTER_TYPE::RSMI_COARSE_DECODER_ACTIVITY) {
+            if (value_count > 0) {
+              utilization_counters[index].value = (value_accum / value_count);
+            }
+          }
+        }
+        break;
+
       default:
         return RSMI_STATUS_INVALID_ARGS;
     }
-    if (val_ui32 == UINT32_MAX) {
-      return RSMI_STATUS_NOT_SUPPORTED;
-    }
-    utilization_counters[index].value = val_ui32;
   }
-
   *timestamp = gpu_metrics.system_clock_counter;
 
   return ret;

rocm_smi/src/rocm_smi_kfd.cc

@@ -1077,5 +1077,32 @@ int KFDNode::get_gfx_target_version(uint64_t *gfx_target_version) {
   return ret;
 }
 
+int32_t KFDNode::get_simd_per_cu(uint64_t* simd_per_cu) const
+{
+    const std::string properties_path("/sys/class/kfd/kfd/topology/nodes/" +
+                                      std::to_string(this->node_indx_) +
+                                      "/properties");
+
+    auto tmp_simd_per_cu = uint64_t(0);
+    auto ret = read_node_properties(this->node_indx_, "simd_per_cu",
+                                    &tmp_simd_per_cu);
+    *simd_per_cu = tmp_simd_per_cu;
+    return ret;
+}
+
+int32_t KFDNode::get_simd_count(uint64_t* simd_count) const
+{
+    const std::string properties_path("/sys/class/kfd/kfd/topology/nodes/" +
+                                      std::to_string(this->node_indx_) +
+                                      "/properties");
+
+    auto tmp_simd_count = uint64_t(0);
+    auto ret = read_node_properties(this->node_indx_, "simd_count",
+                                    &tmp_simd_count);
+    *simd_count = tmp_simd_count;
+    return ret;
+}
+
+
 }  // namespace smi
 }  // namespace amd

rocm_smi/src/rocm_smi_utils.cc

@@ -65,6 +65,7 @@
 #include <vector>
 
 #include "rocm_smi/rocm_smi.h"
+#include "rocm_smi/rocm_smi_kfd.h"
 #include "rocm_smi/rocm_smi_utils.h"
 #include "rocm_smi/rocm_smi_exception.h"
 #include "rocm_smi/rocm_smi_main.h"
@@ -1198,6 +1199,25 @@ rsmi_status_t rsmi_get_gfx_target_version(uint32_t dv_ind,
   }
 }
 
+rsmi_status_t rsmi_dev_number_of_computes_get(uint32_t dv_ind, uint32_t* num_computes)
+{
+  GET_DEV_AND_KFDNODE_FROM_INDX
+
+  auto tmp_simd_per_cu = uint64_t(0);
+  auto tmp_simd_count = uint64_t(0);
+  auto ret_simd_per_cu = kfd_node->get_simd_per_cu(&tmp_simd_per_cu);
+  auto ret_simd_count  = kfd_node->get_simd_count(&tmp_simd_count);
+
+  if (((ret_simd_per_cu != 0) || (ret_simd_count != 0)) ||
+      ((tmp_simd_per_cu == 0) || (tmp_simd_count == 0))) {
+    return rsmi_status_t::RSMI_STATUS_NOT_SUPPORTED;
+  }
+
+  *num_computes = (tmp_simd_count / tmp_simd_per_cu);
+  return rsmi_status_t::RSMI_STATUS_SUCCESS;
+}
+
+
 std::queue<std::string> getAllDeviceGfxVers() {
   uint32_t num_monitor_devs = 0;
   rsmi_status_t ret;

src/amd_smi/amd_smi.cc

@@ -55,6 +55,7 @@
 #include <set>
 #include <map>
 #include <memory>
+#include <limits>
 #include <xf86drm.h>
 #include "amd_smi/amdsmi.h"
 #include "amd_smi/impl/fdinfo.h"
@@ -756,6 +757,15 @@ amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_i
                     &(tmp_oam_id));
     info->oam_id = tmp_oam_id;
 
+    // default to 0xffffffff as not supported
+    info->num_of_compute_units = std::numeric_limits<uint32_t>::max();
+    auto tmp_num_of_compute_units = uint32_t(0);
+    status = rsmi_wrapper(amd::smi::rsmi_dev_number_of_computes_get, processor_handle,
+                          &tmp_num_of_compute_units);
+    if (status == amdsmi_status_t::AMDSMI_STATUS_SUCCESS) {
+        info->num_of_compute_units = tmp_num_of_compute_units;
+    }
+
     return AMDSMI_STATUS_SUCCESS;
 }
 
@@ -799,6 +809,7 @@ amdsmi_status_t amdsmi_get_gpu_vram_info(
     info->vram_type = AMDSMI_VRAM_TYPE_UNKNOWN;
     info->vram_size = 0;
     info->vram_vendor = AMDSMI_VRAM_VENDOR__PLACEHOLDER0;
+    info->vram_bit_width = std::numeric_limits<decltype(info->vram_bit_width)>::max();
 
     // Only can read vram type from libdrm
     if (gpu_device->check_if_drm_is_supported()) {
@@ -808,6 +819,7 @@ amdsmi_status_t amdsmi_get_gpu_vram_info(
             sizeof(struct drm_amdgpu_info_device), &dev_info);
         if (r == AMDSMI_STATUS_SUCCESS) {
             info->vram_type = amd::smi::vram_type_value(dev_info.vram_type);
+            info->vram_bit_width = dev_info.vram_bit_width;
         }
     }
 

src/amd_smi/amd_smi_utils.cc

@@ -615,3 +615,4 @@ amdsmi_status_t smi_amdgpu_is_gpu_power_management_enabled(amd::smi::AMDSmiGPUDe
     *enabled = false;
     return AMDSMI_STATUS_SUCCESS;
 }
+

tests/amd_smi_test/functional/id_info_read.cc

@@ -154,8 +154,14 @@ void TestIdInfoRead::Run(void) {
           << vram_info.vram_type << std::endl;
       std::cout << "\t**Device Vram vendor id: "
           << vram_info.vram_vendor << std::endl;
-      std::cout << "\t**Device Vram size: "
+      std::cout << "\t**Device Vram size: 0x"
-          << vram_info.vram_size << std::endl;
+          << std::hex << vram_info.vram_size
+          << " (" << std::dec << vram_info.vram_size << ")"
+          << std::endl;
+      std::cout << "\t**Device Bit Width: 0x"
+          << std::hex << vram_info.vram_bit_width
+          << " (" << std::dec << vram_info.vram_bit_width << ")"
+          << std::endl;
     }
 
     err = amdsmi_get_gpu_vendor_name(processor_handles_[i], buffer, kBufferLen);

tests/amd_smi_test/functional/metrics_counter_read.cc

@@ -49,6 +49,7 @@
 #include <iostream>
 #include <string>
 #include <map>
+#include <type_traits>
 
 #include <gtest/gtest.h>
 #include "amd_smi/amdsmi.h"
@@ -132,28 +133,95 @@ void TestMetricsCounterRead::Run(void) {
     ASSERT_EQ(err, AMDSMI_STATUS_INVAL);
 
     // Coarse Grain counters
-    amdsmi_utilization_counter_t utilization_counters[2];
+    constexpr uint32_t kUTILIZATION_COUNTERS(3);
+    amdsmi_utilization_counter_t utilization_counters[kUTILIZATION_COUNTERS];
     utilization_counters[0].type = AMDSMI_COARSE_GRAIN_GFX_ACTIVITY;
     utilization_counters[1].type = AMDSMI_COARSE_GRAIN_MEM_ACTIVITY;
+    utilization_counters[2].type = AMDSMI_COARSE_DECODER_ACTIVITY;
+
     err = amdsmi_get_utilization_count(processor_handles_[i], utilization_counters,
-                    2, &timestamp);
+                    kUTILIZATION_COUNTERS, &timestamp);
     if (err != AMDSMI_STATUS_SUCCESS) {
       if (err == AMDSMI_STATUS_NOT_SUPPORTED) {
         IF_VERB(STANDARD) {
           std::cout << "\t**" <<
-          "Not supported on this machine" << std::endl;
+          "amdsmi_get_utilization_count(): Not supported on this machine" << std::endl;
           return;
         }
       }
     } else {
       CHK_ERR_ASRT(err);
       IF_VERB(STANDARD) {
-          std::cout << std::dec << "gfx_activity="
+          std::cout << "\n\namdsmi_get_utilization_count() : COARSE GRAIN ACTIVITIES" << "\n";
-          << utilization_counters[0].value << '\n';
+          for (auto idx = uint32_t(0); idx < kUTILIZATION_COUNTERS; ++idx) {
-          std::cout << std::dec << "mem_activity="
+              switch (utilization_counters[idx].type) {
-          << utilization_counters[1].value << '\n';
+                  case AMDSMI_COARSE_GRAIN_GFX_ACTIVITY:
-          std::cout << std::dec << "timestamp="
+                      std::cout << "-> gfx_activity: [" << utilization_counters[idx].fine_value_count << "]" << "\n";
-          << timestamp << '\n';
+                      break;
+
+                  case AMDSMI_COARSE_GRAIN_MEM_ACTIVITY:
+                      std::cout << "-> mem_activity: [" << utilization_counters[idx].fine_value_count << "]" << "\n";;
+                      break;
+
+                  case AMDSMI_COARSE_DECODER_ACTIVITY:
+                      std::cout << "-> decoder_activity: [" << utilization_counters[idx].fine_value_count << "]" << "\n";
+                      break;
+
+                  default:
+                      break;
+              }
+
+              for (auto val_idx = uint16_t(0); val_idx < utilization_counters[idx].fine_value_count; ++val_idx) {
+                  std::cout << "\t" << std::dec << utilization_counters[idx].value << "\n";
+              }
+          }
+
+          std::cout << std::dec << "timestamp=" << timestamp << '\n';
+      }
+    }
+
+    // Fine Grain counters
+    utilization_counters[0].type = AMDSMI_FINE_GRAIN_GFX_ACTIVITY;
+    utilization_counters[1].type = AMDSMI_FINE_GRAIN_MEM_ACTIVITY;
+    utilization_counters[2].type = AMDSMI_FINE_DECODER_ACTIVITY;
+    err = amdsmi_get_utilization_count(processor_handles_[i], utilization_counters,
+                    kUTILIZATION_COUNTERS, &timestamp);
+    if (err != AMDSMI_STATUS_SUCCESS) {
+      if (err == AMDSMI_STATUS_NOT_SUPPORTED) {
+        IF_VERB(STANDARD) {
+          std::cout << "\t**" <<
+          "amdsmi_get_utilization_count(): Not supported on this machine" << std::endl;
+          return;
+        }
+      }
+    } else {
+      CHK_ERR_ASRT(err);
+      IF_VERB(STANDARD) {
+          std::cout << "\n\namdsmi_get_utilization_count() : FINE GRAIN ACTIVITIES" << "\n";
+          for (auto idx = uint32_t(0); idx < kUTILIZATION_COUNTERS; ++idx) {
+              switch (utilization_counters[idx].type) {
+                  case AMDSMI_FINE_GRAIN_GFX_ACTIVITY:
+                      std::cout << "-> gfx_activity: [" << utilization_counters[idx].fine_value_count << "]" << "\n";
+                      break;
+
+                  case AMDSMI_FINE_GRAIN_MEM_ACTIVITY:
+                      std::cout << "-> mem_activity: [" << utilization_counters[idx].fine_value_count << "]" << "\n";;
+                      break;
+
+                  case AMDSMI_FINE_DECODER_ACTIVITY:
+                      std::cout << "-> decoder_activity: [" << utilization_counters[idx].fine_value_count << "]" << "\n";
+                      break;
+
+                  default:
+                      break;
+              }
+
+              for (auto val_idx = uint16_t(0); val_idx < utilization_counters[idx].fine_value_count; ++val_idx) {
+                  std::cout << "\t" << std::dec << utilization_counters[idx].fine_value[val_idx] << "\n";
+              }
+          }
+
+          std::cout << std::dec << "timestamp=" << timestamp << '\n';
       }
     }