From dc0cfa8a542db5931fd22c4d236055c95bc02c3b Mon Sep 17 00:00:00 2001 From: David Yat Sin Date: Thu, 12 Oct 2023 14:07:19 +0000 Subject: [PATCH] Fix escape-to-IB packet definition The Vendor specific header is only 8-bits and this would break the behavior on big-endian machines. Renaming field to amd_format to match name in spec sheets. Change-Id: I65559757657565d3d3ff489d2663a0be42cf8ba5 [ROCm/ROCR-Runtime commit: 22be5262306168bfed52e5dcb17801b421431948] --- .../runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp index 3722de86e3..f732017a28 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp @@ -1237,10 +1237,11 @@ void AqlQueue::ExecutePM4(uint32_t* cmd_data, size_t cmd_size_b) { // Construct an AQL packet to jump to the PM4 IB. struct amd_aql_pm4_ib { uint16_t header; - uint16_t ven_hdr; + uint8_t amd_format; + uint8_t reserved0; uint32_t ib_jump_cmd[4]; uint32_t dw_cnt_remain; - uint32_t reserved[8]; + uint32_t reserved1[8]; hsa_signal_t completion_signal; }; @@ -1251,7 +1252,7 @@ void AqlQueue::ExecutePM4(uint32_t* cmd_data, size_t cmd_size_b) { amd_aql_pm4_ib aql_pm4_ib{}; aql_pm4_ib.header = HSA_PACKET_TYPE_VENDOR_SPECIFIC << HSA_PACKET_HEADER_TYPE; - aql_pm4_ib.ven_hdr = AMD_AQL_FORMAT_PM4_IB; + aql_pm4_ib.amd_format = AMD_AQL_FORMAT_PM4_IB; aql_pm4_ib.ib_jump_cmd[0] = ib_jump_cmd[0]; aql_pm4_ib.ib_jump_cmd[1] = ib_jump_cmd[1]; aql_pm4_ib.ib_jump_cmd[2] = ib_jump_cmd[2];