From df461e1efa6ae735221ce3b0b32675e59a00a72e Mon Sep 17 00:00:00 2001 From: Ramesh Errabolu Date: Tue, 30 Jun 2020 15:00:26 -0500 Subject: [PATCH] Fix typo in the field name Mem_EDCSupport of HSA_CAPABILITY entity Change-Id: Ic1aba0b2c6e7bc8324fe756df84998f32a8c09da [ROCm/ROCR-Runtime commit: b0b0a1b479723beed82d2bccca06a61af746b63a] --- projects/rocr-runtime/include/hsakmttypes.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/projects/rocr-runtime/include/hsakmttypes.h b/projects/rocr-runtime/include/hsakmttypes.h index 7a7dc2ad10..b4fd9bdcb3 100644 --- a/projects/rocr-runtime/include/hsakmttypes.h +++ b/projects/rocr-runtime/include/hsakmttypes.h @@ -210,7 +210,7 @@ typedef union unsigned int WaveLaunchModeSupported: 1; // Indicates if Wave Launch Mode is supported on the node. unsigned int PreciseMemoryOperationsSupported: 1; // Indicates if Precise Memory Operations are supported on the node. unsigned int SRAM_EDCSupport: 1; // Indicates if GFX internal SRAM EDC/ECC functionality is active - unsigned int Mem_EDCSupoort: 1; // Indicates if GFX internal DRAM/HBM EDC/ECC functionality is active + unsigned int Mem_EDCSupport: 1; // Indicates if GFX internal DRAM/HBM EDC/ECC functionality is active unsigned int RASEventNotify: 1; // Indicates if GFX extended RASFeatures and RAS EventNotify status is available unsigned int ASICRevision: 4; // Indicates the ASIC revision of the chip on this node. unsigned int Reserved : 6;