rocr: Update Driver queue-related APIs
Update the user-mode driver queue APIs to leverage KMT types. Move queue-related calls to the core::Driver API.
This commit is contained in:
committed by
Gutierrez, Tony
parent
b3c48cc68c
commit
e03d44d742
@@ -55,53 +55,45 @@ class AieAgent : public core::Agent {
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public:
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/// @brief AIE agent constructor.
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/// @param [in] node Node id.
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AieAgent(uint32_t node);
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AieAgent(uint32_t node, const HsaNodeProperties& node_props);
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// @brief AIE agent destructor.
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~AieAgent();
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// @brief AIE agent destructor.
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~AieAgent();
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hsa_status_t VisitRegion(bool include_peer,
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hsa_status_t (*callback)(hsa_region_t region,
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void *data),
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void *data) const;
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hsa_status_t IterateRegion(hsa_status_t (*callback)(hsa_region_t region,
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void *data),
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void *data) const override;
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hsa_status_t VisitRegion(bool include_peer,
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hsa_status_t (*callback)(hsa_region_t region, void* data),
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void* data) const;
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hsa_status_t IterateRegion(hsa_status_t (*callback)(hsa_region_t region, void* data),
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void* data) const override;
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hsa_status_t IterateCache(hsa_status_t (*callback)(hsa_cache_t cache,
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void *data),
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void *value) const override;
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hsa_status_t IterateCache(hsa_status_t (*callback)(hsa_cache_t cache, void* data),
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void* value) const override;
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hsa_status_t IterateSupportedIsas(
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hsa_status_t (*callback)(hsa_isa_t isa, void* data),
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void* data) const override;
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hsa_status_t IterateSupportedIsas(hsa_status_t (*callback)(hsa_isa_t isa, void* data),
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void* data) const override;
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hsa_status_t GetInfo(hsa_agent_info_t attribute, void *value) const override;
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hsa_status_t GetInfo(hsa_agent_info_t attribute, void* value) const override;
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hsa_status_t QueueCreate(size_t size, hsa_queue_type32_t queue_type, uint64_t flags,
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core::HsaEventCallback event_callback, void* data,
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uint32_t private_segment_size, uint32_t group_segment_size,
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core::Queue** queue) override;
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hsa_status_t QueueCreate(size_t size, hsa_queue_type32_t queue_type, uint64_t flags,
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core::HsaEventCallback event_callback, void* data,
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uint32_t private_segment_size, uint32_t group_segment_size,
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core::Queue** queue) override;
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// @brief Override from core::Agent.
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const std::vector<const core::Isa*>& supported_isas() const override {
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return supported_isas_;
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}
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// @brief Override from core::Agent.
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const std::vector<const core::Isa*>& supported_isas() const override { return supported_isas_; }
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const std::vector<const core::MemoryRegion *> ®ions() const override {
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return regions_;
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}
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const std::vector<const core::MemoryRegion*>& regions() const override { return regions_; }
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/// @brief Getter for the AIE system allocator.
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const std::function<void *(size_t size, size_t align,
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core::MemoryRegion::AllocateFlags flags)> &
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system_allocator() const {
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return system_allocator_;
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}
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/// @brief Getter for the AIE system allocator.
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const std::function<void*(size_t size, size_t align, core::MemoryRegion::AllocateFlags flags)>&
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system_allocator() const {
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return system_allocator_;
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}
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/// @brief Getter for the AIE system deallocator.
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const std::function<void(void*)>& system_deallocator() const { return system_deallocator_; }
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const HsaNodeProperties& properties() const { return node_props_; }
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// AIE agent methods.
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/// @brief Get the number of columns on this AIE agent.
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uint32_t GetNumCols() const { return num_cols_; }
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@@ -134,6 +126,7 @@ private:
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const uint32_t max_aql_size_ = 0x40;
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const uint32_t max_queues_ = 1;
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const HsaNodeProperties node_props_;
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/// @brief Number of columns in the AIE array.
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uint32_t num_cols_ = 0;
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/// @brief Number of rows of core tiles in the AIE array. Not all rows in a
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@@ -103,14 +103,6 @@ class AieAqlQueue : public core::Queue,
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/// @brief Returns the agent associated with this queue.
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AieAgent& GetAgent() { return agent_; }
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/// @brief Sets the hardware context.
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void SetHwCtxHandle(uint32_t hw_ctx_handle) {
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hw_ctx_handle_ = hw_ctx_handle;
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}
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/// @brief Returns the hardware context.
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uint32_t GetHwCtxHandle() const { return hw_ctx_handle_; }
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// GPU-specific queue functions are unsupported.
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hsa_status_t GetCUMasking(uint32_t num_cu_mask_count,
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@@ -141,17 +133,6 @@ class AieAqlQueue : public core::Queue,
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/// @brief Called when the doorbell is rung to submit all queued packets.
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void SubmitPackets();
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/// @brief Handle for an application context on the AIE device.
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///
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/// Each user queue will have an associated context. This handle is assigned
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/// by the driver on context creation.
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///
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/// TODO: For now we support a single context that allocates all core tiles in
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/// the array. In the future we can make the number of tiles configurable so
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/// that multiple workloads with different core tile configurations can
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/// execute on the AIE agent at the same time.
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uint32_t hw_ctx_handle_ = std::numeric_limits<uint32_t>::max();
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/// @brief Indicates if queue is active.
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std::atomic<bool> active_;
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static __forceinline int& rtti_id() {
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@@ -2,24 +2,24 @@
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//
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// The University of Illinois/NCSA
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// Open Source License (NCSA)
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//
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// Copyright (c) 2014-2020, Advanced Micro Devices, Inc. All rights reserved.
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//
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//
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// Copyright (c) 2014-2025, Advanced Micro Devices, Inc. All rights reserved.
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//
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// Developed by:
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//
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//
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// AMD Research and AMD HSA Software Development
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//
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//
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// Advanced Micro Devices, Inc.
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//
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//
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// www.amd.com
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//
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to
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// deal with the Software without restriction, including without limitation
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// the rights to use, copy, modify, merge, publish, distribute, sublicense,
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// and/or sell copies of the Software, and to permit persons to whom the
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// Software is furnished to do so, subject to the following conditions:
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//
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//
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// - Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimers.
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// - Redistributions in binary form must reproduce the above copyright
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@@ -29,7 +29,7 @@
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// nor the names of its contributors may be used to endorse or promote
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// products derived from this Software without specific prior written
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// permission.
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//
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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@@ -47,8 +47,6 @@
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#include <stdint.h>
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#include <vector>
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#include "hsakmt/hsakmt.h"
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#include "core/inc/amd_gpu_agent.h"
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#include "core/inc/blit.h"
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#include "core/inc/runtime.h"
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@@ -97,8 +97,17 @@ public:
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void **mem, size_t size,
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uint32_t node_id) override;
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hsa_status_t FreeMemory(void *mem, size_t size) override;
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hsa_status_t CreateQueue(core::Queue &queue) const override;
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hsa_status_t DestroyQueue(core::Queue &queue) const override;
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hsa_status_t CreateQueue(uint32_t node_id, HSA_QUEUE_TYPE type, uint32_t queue_pct,
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HSA_QUEUE_PRIORITY priority, uint32_t sdma_engine_id, void* queue_addr,
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uint64_t queue_size_bytes, HsaEvent* event,
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HsaQueueResource& queue_resource) const override;
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hsa_status_t UpdateQueue(HSA_QUEUEID queue_id, uint32_t queue_pct, HSA_QUEUE_PRIORITY priority,
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void* queue_addr, uint64_t queue_size, HsaEvent* event) const override;
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hsa_status_t DestroyQueue(HSA_QUEUEID queue_id) const override;
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hsa_status_t SetQueueCUMask(HSA_QUEUEID queue_id, uint32_t cu_mask_count,
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uint32_t* queue_cu_mask) const override;
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hsa_status_t AllocQueueGWS(HSA_QUEUEID queue_id, uint32_t num_gws,
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uint32_t* first_gws) const override;
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hsa_status_t ExportDMABuf(void *mem, size_t size, int *dmabuf_fd,
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size_t *offset) override;
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hsa_status_t ImportDMABuf(int dmabuf_fd, core::Agent &agent,
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@@ -95,8 +95,6 @@ class Queue;
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namespace AMD {
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class AieAqlQueue;
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// @brief: Used to transform an address into a device address
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constexpr uint32_t DEV_ADDR_BASE = 0x04000000;
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constexpr uint32_t DEV_ADDR_OFFSET_MASK = 0x02FFFFFF;
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@@ -209,8 +207,17 @@ public:
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void **mem, size_t size,
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uint32_t node_id) override;
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hsa_status_t FreeMemory(void *mem, size_t size) override;
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hsa_status_t CreateQueue(core::Queue &queue) const override;
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hsa_status_t DestroyQueue(core::Queue &queue) const override;
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hsa_status_t CreateQueue(uint32_t node_id, HSA_QUEUE_TYPE type, uint32_t queue_pct,
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HSA_QUEUE_PRIORITY priority, uint32_t sdma_engine_id, void* queue_addr,
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uint64_t queue_size_bytes, HsaEvent* event,
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HsaQueueResource& queue_resource) const override;
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hsa_status_t UpdateQueue(HSA_QUEUEID queue_id, uint32_t queue_pct, HSA_QUEUE_PRIORITY priority,
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void* queue_addr, uint64_t queue_size, HsaEvent* event) const override;
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hsa_status_t DestroyQueue(HSA_QUEUEID queue_id) const override;
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hsa_status_t SetQueueCUMask(HSA_QUEUEID queue_id, uint32_t cu_mask_count,
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uint32_t* queue_cu_mask) const override;
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hsa_status_t AllocQueueGWS(HSA_QUEUEID queue_id, uint32_t num_gws,
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uint32_t* first_gws) const override;
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hsa_status_t ExportDMABuf(void *mem, size_t size, int *dmabuf_fd,
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size_t *offset) override;
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hsa_status_t ImportDMABuf(int dmabuf_fd, core::Agent &agent,
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@@ -223,7 +230,7 @@ public:
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/// @brief Submits @p num_pkts packets in a command chain.
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hsa_status_t SubmitCmdChain(hsa_amd_aie_ert_packet_t* first_pkt, uint32_t num_pkts,
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AieAqlQueue& aie_queue);
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HSA_QUEUEID& queue_id, uint32_t num_core_tiles);
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hsa_status_t SPMAcquire(uint32_t preferred_node_id) const override;
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hsa_status_t SPMRelease(uint32_t preferred_node_id) const override;
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@@ -243,7 +250,8 @@ public:
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BOHandle FindBOHandle(void* mem) const;
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/// @brief Creates a new hardware context with the given PDI BO handles.
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hsa_status_t ConfigHwCtx(const PDICache& pdi_bo_handles, AieAqlQueue& aie_queue);
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hsa_status_t ConfigHwCtx(const PDICache& pdi_bo_handles, HSA_QUEUEID& queue_id,
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uint32_t num_core_tiles);
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hsa_status_t QueryDriverVersion();
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@@ -274,7 +282,7 @@ public:
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/// @param bo_handles handles associated with the command
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/// @param aie_queue queue to submit to
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hsa_status_t ExecCmdAndWait(const BOHandle& cmd_chain_bo_handle,
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const std::vector<uint32_t>& bo_handles, AieAqlQueue& aie_queue);
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const std::vector<uint32_t>& bo_handles, HSA_QUEUEID queue_id);
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/// TODO: Remove this in the future and rely on the core Runtime
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/// object to track handle allocations. Using the VMEM API for mapping XDNA
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@@ -43,6 +43,7 @@
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#ifndef HSA_RUNTME_CORE_INC_DRIVER_H_
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#define HSA_RUNTME_CORE_INC_DRIVER_H_
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#include <cstdint>
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#include <limits>
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#include <string>
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@@ -146,9 +147,53 @@ public:
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virtual hsa_status_t FreeMemory(void *mem, size_t size) = 0;
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virtual hsa_status_t CreateQueue(Queue &queue) const = 0;
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/// @brief Create an agent dispatch queue with user-mode access rights.
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/// @param[in] node_id Node ID of the agent on which the queue is being created.
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/// @param[in] type Queue's type.
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/// @param[in] queue_pct Maximum percentage of a queue's occupancy allowed.
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/// @param[in] priority Queue's priority for scheduling.
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/// @param[in] sdma_engine_id ID of the SDMA engine on which the queue is being created. Only used
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/// if @p type is one of the SDMA queue types.
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/// @param[in] queue_addr Address of the queue's ring buffer.
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/// @param[in] queue_size_bytes Size of the queue's ring buffer in bytes.
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/// @param[in] event HsaEvent for event-driven callbacks.
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/// @param[out] queue_resource Queue resource information populated by the driver.
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virtual hsa_status_t CreateQueue(uint32_t node_id, HSA_QUEUE_TYPE type, uint32_t queue_pct,
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HSA_QUEUE_PRIORITY priority, uint32_t sdma_engine_id,
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void* queue_addr, uint64_t queue_size_bytes, HsaEvent* event,
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HsaQueueResource& queue_resource) const = 0;
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virtual hsa_status_t DestroyQueue(Queue &queue) const = 0;
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/// @brief Destroy a queue.
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/// @param queue_id Kernel-mode driver's assigned queue ID.
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virtual hsa_status_t DestroyQueue(HSA_QUEUEID queue_id) const = 0;
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/// @brief Update a queue's properties.
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/// @param[in] queue_id Kernel-mode driver's assigned queue ID.
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/// @param[in] queue_pct Maximum percentage of a queue's occupancy allowed.
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/// @param[in] priority Queue's priority for scheduling.
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/// @param[in] queue_addr Queue's ring buffer base address.
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/// @param[in] queue_size_bytes Size of the queue's ring buffer in bytes.
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/// @param[in] event HsaEvent for event-driven callbacks.
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virtual hsa_status_t UpdateQueue(HSA_QUEUEID queue_id, uint32_t queue_pct,
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HSA_QUEUE_PRIORITY priority, void* queue_addr,
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uint64_t queue_size_bytes, HsaEvent* event) const = 0;
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/// @brief Set the CU mask for a queue.
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/// @details This sets the CU bitmask for a queue. The CU mask determines which CUs
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/// a queue's dispatches can target. Currently this is only supported for GPU devices.
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/// @param[in] queue_id Kernel-mode driver's assigned queue ID.
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/// @param[in] cu_mask_count Number of CU bits in the mask.
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/// @param[in] queue_cu_mask New CU mask for the queue.
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virtual hsa_status_t SetQueueCUMask(HSA_QUEUEID queue_id, uint32_t cu_mask_count,
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uint32_t* queue_cu_mask) const = 0;
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/// @brief Allocate global wave sync (GWS) resource for a queue. This is only supported for GPUs.
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/// GWS can be used to synchronize wavefronts across the entire GPU device.
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/// @param[in] queue_id Kernel-mode driver's assigned queue ID.
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/// @param[in] num_gws Number of GWS slots.
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/// @param[in] first_gws First GWS slot.
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virtual hsa_status_t AllocQueueGWS(HSA_QUEUEID queue_id, uint32_t num_gws,
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uint32_t* first_gws) const = 0;
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/// @brief Imports memory using dma-buf.
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///
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