P4 to Git Change 1500415 by gandryey@gera-w8 on 2018/01/05 11:17:48

SWDEV-136522 - Tools need a way to query the PCIE device id via the OpenCL API.
	- Add CL_DEVICE_PCIE_ID query

Affected files ...

... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_device.cpp#69 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/khronos/headers/opencl1.2/CL/cl_ext.h#20 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/khronos/headers/opencl2.0/CL/cl_ext.h#36 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/khronos/headers/opencl2.1/CL/cl_ext.h#13 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/khronos/headers/opencl2.2/CL/cl_ext.h#7 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpudevice.cpp#580 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp#181 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/backend.h#15 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paldevice.cpp#69 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.cpp#79 edit


[ROCm/clr commit: 1317a4c2f9]

projects/clr/rocclr/runtime/device/gpu/gpudevice.cpp

@@ -519,12 +519,6 @@ void NullDevice::fillDeviceInfo(const CALdeviceattribs& calAttr, const gslMemInf
 
   info_.extensions_ = getExtensionString();
 
-  info_.deviceTopology_.pcie.type = CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD;
-  info_.deviceTopology_.pcie.bus = (calAttr.pciTopologyInformation & (0xFF << 8)) >> 8;
-  info_.deviceTopology_.pcie.device = (calAttr.pciTopologyInformation & (0x1F << 3)) >> 3;
-  info_.deviceTopology_.pcie.function = (calAttr.pciTopologyInformation & 0x07);
-
-  ::strncpy(info_.boardName_, calAttr.boardName, sizeof(info_.boardName_));
   ::strncpy(info_.driverStore_, calAttr.driverStore, sizeof(info_.driverStore_));
 
   // OpenCL1.2 device info fields
@@ -565,6 +559,13 @@ void NullDevice::fillDeviceInfo(const CALdeviceattribs& calAttr, const gslMemInf
   }
 
   if (settings().checkExtension(ClAmdDeviceAttributeQuery)) {
+    ::strncpy(info_.boardName_, calAttr.boardName, sizeof(info_.boardName_));
+
+    info_.deviceTopology_.pcie.type = CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD;
+    info_.deviceTopology_.pcie.bus = (calAttr.pciTopologyInformation & (0xFF << 8)) >> 8;
+    info_.deviceTopology_.pcie.device = (calAttr.pciTopologyInformation & (0x1F << 3)) >> 3;
+    info_.deviceTopology_.pcie.function = (calAttr.pciTopologyInformation & 0x07);
+
     info_.simdPerCU_ = hwInfo()->simdPerCU_;
     info_.simdWidth_ = hwInfo()->simdWidth_;
     info_.simdInstructionWidth_ = hwInfo()->simdInstructionWidth_;
@@ -575,10 +576,16 @@ void NullDevice::fillDeviceInfo(const CALdeviceattribs& calAttr, const gslMemInf
     info_.localMemSizePerCU_ = hwInfo()->localMemSizePerCU_;
     info_.localMemBanks_ = hwInfo()->localMemBanks_;
     info_.gfxipVersion_ = hwInfo()->gfxipVersion_;
+
     info_.numAsyncQueues_ = numComputeRings;
+
     info_.numRTQueues_ = numComputeRingsRT;
     info_.numRTCUs_ = calAttr.maxRTCUs;
+
     info_.threadTraceEnable_ = settings().threadTraceEnable_;
+
+    info_.pcieDeviceId_ = calAttr.pcieDeviceID;
+    info_.pcieRevisionId_ = calAttr.pcieRevisionID;
   }
 }
 

projects/clr/rocclr/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp

@@ -119,6 +119,8 @@ CALGSLDevice::getAttribs_int(gsl::gsCtx* cs)
     m_attribs.isWDDM2Enabled = m_adp->pAsicInfo->vaAvailable && m_adp->pAsicInfo->bNoVATranslation;
     m_attribs.maxRTCUs = cs->getMaxRTCUs();
     m_attribs.asicRevision = cs->getChipRev();
+    m_attribs.pcieDeviceID = cs->getAsicDID();
+    m_attribs.pcieRevisionID = cs->getPciRevID();
 }
 
 bool

projects/clr/rocclr/runtime/device/gpu/gslbe/src/rt/backend.h

@@ -88,6 +88,8 @@ typedef struct CALdeviceattribsRec {
     CALuint    maxRTCUs;                            /**< The maximum number of RT CUs for RT queues */
     CALuint    asicRevision;                        /**< The ASIC revision ID */
     CALchar    driverStore[CAL_DRIVER_STORE_MAX_LEN];/**< Driver store location. */
+    CALuint    pcieDeviceID;                        /**< The ASIC PCIE device ID */
+    CALuint    pcieRevisionID;                      /**< The ASIC PCIE revision ID */
 } CALdeviceattribs;
 
 

projects/clr/rocclr/runtime/device/pal/paldevice.cpp

@@ -465,14 +465,6 @@ void NullDevice::fillDeviceInfo(const Pal::DeviceProperties& palProp,
   info_.localMemSize_ = settings().hwLDSSize_;
   info_.extensions_ = getExtensionString();
 
-  info_.deviceTopology_.pcie.type = CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD;
-  info_.deviceTopology_.pcie.bus = palProp.pciProperties.busNumber;
-  info_.deviceTopology_.pcie.device = palProp.pciProperties.deviceNumber;
-  info_.deviceTopology_.pcie.function = palProp.pciProperties.functionNumber;
-
-  ::strncpy(info_.boardName_, palProp.gpuName,
-            ::strnlen(palProp.gpuName, sizeof(info_.boardName_)));
-
   // OpenCL1.2 device info fields
   info_.builtInKernels_ = "";
   info_.imageMaxBufferSize_ = MaxImageBufferSize;
@@ -511,6 +503,14 @@ void NullDevice::fillDeviceInfo(const Pal::DeviceProperties& palProp,
   }
 
   if (settings().checkExtension(ClAmdDeviceAttributeQuery)) {
+    ::strncpy(info_.boardName_, palProp.gpuName,
+              ::strnlen(palProp.gpuName, sizeof(info_.boardName_)));
+
+    info_.deviceTopology_.pcie.type = CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD;
+    info_.deviceTopology_.pcie.bus = palProp.pciProperties.busNumber;
+    info_.deviceTopology_.pcie.device = palProp.pciProperties.deviceNumber;
+    info_.deviceTopology_.pcie.function = palProp.pciProperties.functionNumber;
+
     info_.simdPerCU_ = hwInfo()->simdPerCU_;
     info_.simdWidth_ = hwInfo()->simdWidth_;
     info_.simdInstructionWidth_ = hwInfo()->simdInstructionWidth_;
@@ -521,13 +521,17 @@ void NullDevice::fillDeviceInfo(const Pal::DeviceProperties& palProp,
     info_.localMemSizePerCU_ = hwInfo()->localMemSizePerCU_;
     info_.localMemBanks_ = hwInfo()->localMemBanks_;
     info_.gfxipVersion_ = hwInfo()->gfxipVersion_;
+
     info_.numAsyncQueues_ = numComputeRings;
+
     info_.numRTQueues_ = numExclusiveComputeRings;
     info_.numRTCUs_ = palProp.engineProperties[Pal::EngineTypeExclusiveCompute].maxNumDedicatedCu;
+
     info_.threadTraceEnable_ = settings().threadTraceEnable_;
+
+    info_.pcieDeviceId_ = palProp.deviceId;
+    info_.pcieRevisionId_ = palProp.revisionId;
   }
-  info_.pcieDeviceId_   = palProp.deviceId;
-  info_.pcieRevisionId_ = palProp.revisionId;
 }
 
 Device::XferBuffers::~XferBuffers() {

projects/clr/rocclr/runtime/device/rocm/rocdevice.cpp

@@ -1136,6 +1136,7 @@ bool Device::populateOCLDeviceConstants() {
     }
     //TODO: set to true once thread trace support is available
     info_.threadTraceEnable_ = false;
+    info_.pcieDeviceId_ = deviceInfo_.pciDeviceId_;
   }
 
   info_.maxPipePacketSize_ = info_.maxMemAllocSize_;