From e706ca4c91f9eee3085f7cd1eb5339ef9a54d222 Mon Sep 17 00:00:00 2001 From: foreman Date: Tue, 7 Oct 2014 14:36:41 -0400 Subject: [PATCH] P4 to Git Change 1084962 by gandryey@gera-dev-w7 on 2014/10/07 14:25:46 ECR #304775 - Remove GPU_PREALLOC_ADDR_SPACE key - Previously the key was used for 64bit ISA testing on boards with <4GB frame buffer Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpudefs.hpp#114 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpudevice.cpp#467 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpusettings.cpp#289 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpusettings.hpp#88 edit ... //depot/stg/opencl/drivers/opencl/runtime/utils/flags.hpp#215 edit --- rocclr/runtime/device/gpu/gpudefs.hpp | 3 --- rocclr/runtime/device/gpu/gpudevice.cpp | 11 ----------- rocclr/runtime/device/gpu/gpusettings.cpp | 3 --- rocclr/runtime/device/gpu/gpusettings.hpp | 3 +-- rocclr/runtime/utils/flags.hpp | 2 -- 5 files changed, 1 insertion(+), 21 deletions(-) diff --git a/rocclr/runtime/device/gpu/gpudefs.hpp b/rocclr/runtime/device/gpu/gpudefs.hpp index 71a4dd2b50..da68bd8600 100644 --- a/rocclr/runtime/device/gpu/gpudefs.hpp +++ b/rocclr/runtime/device/gpu/gpudefs.hpp @@ -57,9 +57,6 @@ const static uint CalOfflineImpl = 0xffffffff; //! Alignment restriciton for the pinned memory const static size_t PinnedMemoryAlignment = 4 * Ki; -//! Reserved address space -const static cl_ulong ReservedAdressSpaceSize = static_cast(4) * Gi; - //! Defines all supported ASIC families enum AsicFamilies { Family7xx, diff --git a/rocclr/runtime/device/gpu/gpudevice.cpp b/rocclr/runtime/device/gpu/gpudevice.cpp index cbb025eab9..ac8a9f0858 100644 --- a/rocclr/runtime/device/gpu/gpudevice.cpp +++ b/rocclr/runtime/device/gpu/gpudevice.cpp @@ -520,14 +520,6 @@ void Device::fillDeviceInfo( info_.globalMemSize_ += (static_cast(calAttr.uncachedRemoteRAM) * Mi) / 2; } - // Check if runtime has to reserve address space for testing - if (settings().use64BitPtr_ && settings().preallocAddrSpace_ && - (info_.globalMemSize_ > ReservedAdressSpaceSize)) { - info_.globalMemSize_ -= ReservedAdressSpaceSize; - } - else { - reinterpret_cast(settings_)->preallocAddrSpace_ = false; - } // We try to calculate the largest available memory size from // the largest available block in either heap. In theory this @@ -954,9 +946,6 @@ Device::initializeHeapResources() } size_t dummySize = amd::Os::pageSize(); - if (heap()->isVirtual() && settings().preallocAddrSpace_) { - dummySize = static_cast(ReservedAdressSpaceSize - Mi); - } // Allocate a dummy page for NULL pointer processing dummyPage_ = new(*context_) amd::Buffer(*context_, 0, dummySize); diff --git a/rocclr/runtime/device/gpu/gpusettings.cpp b/rocclr/runtime/device/gpu/gpusettings.cpp index 1be76a0de6..29a124800d 100644 --- a/rocclr/runtime/device/gpu/gpusettings.cpp +++ b/rocclr/runtime/device/gpu/gpusettings.cpp @@ -110,9 +110,6 @@ Settings::Settings() minWorkloadTime_ = 1; // 0.1 ms maxWorkloadTime_ = 5000; // 500 ms - // Preallocates address space - preallocAddrSpace_ = GPU_PREALLOC_ADDR_SPACE; - // Controls tiled images in persistent //!@note IOL for Linux doesn't setup tiling aperture in CMM/QS linearPersistentImage_ = false; diff --git a/rocclr/runtime/device/gpu/gpusettings.hpp b/rocclr/runtime/device/gpu/gpusettings.hpp index 9ea5f6b1c6..437147466f 100644 --- a/rocclr/runtime/device/gpu/gpusettings.hpp +++ b/rocclr/runtime/device/gpu/gpusettings.hpp @@ -63,7 +63,6 @@ public: uint viPlus_: 1; //!< VI and post VI features uint rectLinearDMA_: 1; //!< Rectangular linear DRMDMA support uint threadTraceEnable_: 1; //!< Thread trace enable - uint preallocAddrSpace_: 1; //!< Preallocates address space uint linearPersistentImage_: 1; //!< Allocates linear images in persistent uint useSingleScratch_: 1; //!< Allocates single scratch per device uint sdmaProfiling_: 1; //!< Enables SDMA profiling @@ -74,7 +73,7 @@ public: uint asyncMemCopy_: 1; //!< Use async memory transfers uint hsailDirectSRD_: 1; //!< Controls direct SRD for HSAIL uint useDeviceQueue_: 1; //!< Submit to separate device queue - uint reserved_: 1; + uint reserved_: 2; }; uint value_; }; diff --git a/rocclr/runtime/utils/flags.hpp b/rocclr/runtime/utils/flags.hpp index be94c00834..5407d48aa0 100644 --- a/rocclr/runtime/utils/flags.hpp +++ b/rocclr/runtime/utils/flags.hpp @@ -102,8 +102,6 @@ release(bool, GPU_FORCE_64BIT_PTR, 0, \ "Forces 64 bit pointers on GPU") \ release(bool, GPU_FORCE_OCL20_32BIT, 0, \ "Forces 32 bit apps to take CLANG\HSAIL path") \ -release(bool, GPU_PREALLOC_ADDR_SPACE, 0, \ - "Preallocates 4GB address space. Valid for boards > 4GB") \ release(bool, GPU_RAW_TIMESTAMP, 0, \ "Reports GPU raw timestamps in GPU timeline") \ release(bool, CPU_IMAGE_SUPPORT, true, \