KFDTest : Add gfx1xxx release_mem and acquire_mem packet support
use family ID as parameter when construct the packets Change-Id: I6c1706954ab7b8cbb8bef2aab16edf21f5e1abf0 Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
이 커밋은 다음에 포함됨:
shaoyunl
+154
-77
@@ -73,41 +73,46 @@ void PM4WriteDataPacket::InitPacket(unsigned int *destBuf, void *data) {
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memcpy(m_pPacketData->data, data, m_ndw * sizeof(uint32_t));
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}
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PM4ReleaseMemoryPacket::~PM4ReleaseMemoryPacket(void) {
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if (m_pPacketData)
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free(m_pPacketData);
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PM4ReleaseMemoryPacket::PM4ReleaseMemoryPacket(unsigned int familyId, bool isPolling,
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uint64_t address, uint64_t data, bool is64bit, bool isTimeStamp):m_pPacketData(NULL) {
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if (familyId < FAMILY_AI)
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InitPacketCI(isPolling, address, data, is64bit, isTimeStamp);
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else if (familyId < FAMILY_NV)
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InitPacketAI(isPolling, address, data, is64bit, isTimeStamp);
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else
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InitPacketNV(isPolling, address, data, is64bit, isTimeStamp);
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}
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void PM4ReleaseMemoryPacket::InitPacket(bool isPolling, uint64_t address,
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uint64_t data, bool is64bit, bool isTimeStamp) {
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if (g_TestGPUFamilyId < FAMILY_AI) {
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PM4_RELEASE_MEM_CI *pkt;
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void PM4ReleaseMemoryPacket::InitPacketCI(bool isPolling, uint64_t address,
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uint64_t data, bool is64bit, bool isTimeStamp) {
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PM4_RELEASE_MEM_CI *pkt;
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m_packetSize = sizeof(PM4_RELEASE_MEM_CI);
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pkt = reinterpret_cast<PM4_RELEASE_MEM_CI *>(calloc(1, m_packetSize));
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m_pPacketData = pkt;
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EXPECT_NOTNULL(m_pPacketData);
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m_packetSize = sizeof(PM4_RELEASE_MEM_CI);
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pkt = reinterpret_cast<PM4_RELEASE_MEM_CI *>(calloc(1, m_packetSize));
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m_pPacketData = pkt;
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EXPECT_NOTNULL(m_pPacketData);
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InitPM4Header(pkt->header, IT_RELEASE_MEM);
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InitPM4Header(pkt->header, IT_RELEASE_MEM);
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pkt->bitfields2.event_type = 0x14;
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pkt->bitfields2.event_index = event_index_mec_release_mem_EVENT_WRITE_EOP_5;
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pkt->bitfields2.event_type = 0x14;
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pkt->bitfields2.event_index = event_index_mec_release_mem_EVENT_WRITE_EOP_5;
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// Possible values:
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// 0101(5): EVENT_WRITE_EOP event types
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// 0110(6): Reserved for EVENT_WRITE_EOS packet.
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// 0111(7): Reserved (previously) for EVENT_WRITE packet.
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pkt->bitfields2.l2_wb = 1;
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pkt->bitfields2.l2_inv = 1;
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pkt->bitfields2.cache_policy = cache_policy_mec_release_mem_BYPASS_2;
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pkt->bitfields2.atc = is_dgpu() ?
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pkt->bitfields2.l2_wb = 1;
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pkt->bitfields2.l2_inv = 1;
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pkt->bitfields2.cache_policy = cache_policy_mec_release_mem_BYPASS_2;
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pkt->bitfields2.atc = is_dgpu() ?
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atc_mec_release_mem_ci_NOT_USE_ATC_0 :
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atc_mec_release_mem_ci_USE_ATC_1; // ATC setting for fences and timestamps to the MC or TCL2.
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pkt->bitfields3.dst_sel = dst_sel_mec_release_mem_MEMORY_CONTROLLER_0;
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pkt->bitfields3.dst_sel = dst_sel_mec_release_mem_MEMORY_CONTROLLER_0;
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// Possible values:
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// 0 - memory_controller.
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// 1 - tc_l2.
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if (address) {
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pkt->bitfields3.int_sel = (isPolling ?
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if (address) {
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pkt->bitfields3.int_sel = (isPolling ?
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int_sel_mec_release_mem_SEND_DATA_AFTER_WRITE_CONFIRM_3 :
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int_sel_mec_release_mem_SEND_INTERRUPT_AFTER_WRITE_CONFIRM_2);
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// Possible values:
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@@ -116,10 +121,10 @@ void PM4ReleaseMemoryPacket::InitPacket(bool isPolling, uint64_t address,
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// 2 - Send Interrupt when Write Confirm (WC) is received from the MC.
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// 3 - Wait for WC, but dont send interrupt (applicable to 7.3+) [g73_1]
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// 4 - Reserved for INTERRUPT packet
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if (isTimeStamp && is64bit)
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pkt->bitfields3.data_sel = data_sel_mec_release_mem_SEND_GPU_CLOCK_COUNTER_3;
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else
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pkt->bitfields3.data_sel = is64bit ?
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if (isTimeStamp && is64bit)
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pkt->bitfields3.data_sel = data_sel_mec_release_mem_SEND_GPU_CLOCK_COUNTER_3;
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else
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pkt->bitfields3.data_sel = is64bit ?
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data_sel_mec_release_mem_SEND_64_BIT_DATA_2 :
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data_sel_mec_release_mem_SEND_32_BIT_LOW_1;
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// Possible values:
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@@ -131,62 +136,108 @@ void PM4ReleaseMemoryPacket::InitPacket(bool isPolling, uint64_t address,
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// 5 - Store GDS Data to memory.
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// 6 - Reserved for use by the CP for Signal Semaphore.
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// 7 - Reserved for use by the CP for Wait Semaphore.
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} else {
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pkt->bitfields3.int_sel = (isPolling ?
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} else {
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pkt->bitfields3.int_sel = (isPolling ?
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int_sel_mec_release_mem_NONE_0 :
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int_sel_mec_release_mem_SEND_INTERRUPT_ONLY_1);
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pkt->bitfields3.data_sel = data_sel_mec_release_mem_NONE_0;
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}
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pkt->bitfields3.data_sel = data_sel_mec_release_mem_NONE_0;
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}
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pkt->bitfields4a.address_lo_dword_aligned = static_cast<uint32_t>((address&0xffffffff) >> 2);
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pkt->addr_hi = static_cast<uint32_t>(address>>32);
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pkt->bitfields4a.address_lo_dword_aligned = static_cast<uint32_t>((address&0xffffffff) >> 2);
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pkt->addr_hi = static_cast<uint32_t>(address>>32);
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pkt->data_lo = static_cast<uint32_t>(data);
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pkt->data_hi = static_cast<uint32_t>(data >> 32);
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} else {
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PM4MEC_RELEASE_MEM_AI *pkt;
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pkt->data_lo = static_cast<uint32_t>(data);
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pkt->data_hi = static_cast<uint32_t>(data >> 32);
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}
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void PM4ReleaseMemoryPacket::InitPacketAI(bool isPolling, uint64_t address,
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uint64_t data, bool is64bit, bool isTimeStamp) {
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PM4MEC_RELEASE_MEM_AI *pkt;
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m_packetSize = sizeof(PM4MEC_RELEASE_MEM_AI);
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pkt = reinterpret_cast<PM4MEC_RELEASE_MEM_AI *>(calloc(1, m_packetSize));
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m_pPacketData = pkt;
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EXPECT_NOTNULL(m_pPacketData);
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m_packetSize = sizeof(PM4MEC_RELEASE_MEM_AI);
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pkt = reinterpret_cast<PM4MEC_RELEASE_MEM_AI *>(calloc(1, m_packetSize));
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m_pPacketData = pkt;
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EXPECT_NOTNULL(m_pPacketData);
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InitPM4Header(pkt->header, IT_RELEASE_MEM);
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InitPM4Header(pkt->header, IT_RELEASE_MEM);
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pkt->bitfields2.event_type = 0x14;
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pkt->bitfields2.event_index = event_index__mec_release_mem__end_of_pipe;
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pkt->bitfields2.tc_wb_action_ena = 1;
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pkt->bitfields2.tc_action_ena = 1;
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pkt->bitfields2.cache_policy = cache_policy__mec_release_mem__lru;
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pkt->bitfields2.event_type = 0x14;
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pkt->bitfields2.event_index = event_index__mec_release_mem__end_of_pipe;
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pkt->bitfields2.tc_wb_action_ena = 1;
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pkt->bitfields2.tc_action_ena = 1;
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pkt->bitfields2.cache_policy = cache_policy__mec_release_mem__lru;
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pkt->bitfields3.dst_sel = dst_sel__mec_release_mem__memory_controller;
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pkt->bitfields3.dst_sel = dst_sel__mec_release_mem__memory_controller;
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if (address) {
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pkt->bitfields3.int_sel = (isPolling ?
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if (address) {
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pkt->bitfields3.int_sel = (isPolling ?
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int_sel__mec_release_mem__send_data_after_write_confirm:
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int_sel__mec_release_mem__send_interrupt_after_write_confirm);
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if (isTimeStamp && is64bit)
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pkt->bitfields3.data_sel = data_sel__mec_release_mem__send_gpu_clock_counter;
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else
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pkt->bitfields3.data_sel = is64bit ?
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if (isTimeStamp && is64bit)
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pkt->bitfields3.data_sel = data_sel__mec_release_mem__send_gpu_clock_counter;
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else
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pkt->bitfields3.data_sel = is64bit ?
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data_sel__mec_release_mem__send_64_bit_data :
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data_sel__mec_release_mem__send_32_bit_low;
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} else {
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pkt->bitfields3.int_sel = (isPolling ?
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} else {
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pkt->bitfields3.int_sel = (isPolling ?
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int_sel__mec_release_mem__none:
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int_sel__mec_release_mem__send_interrupt_only);
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pkt->bitfields3.data_sel = data_sel__mec_release_mem__none;
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}
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pkt->bitfields4a.address_lo_32b = static_cast<uint32_t>((address&0xffffffff) >> 2);
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pkt->address_hi = static_cast<uint32_t>(address>>32);
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pkt->data_lo = static_cast<uint32_t>(data);
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pkt->data_hi = static_cast<uint32_t>(data >> 32);
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pkt->int_ctxid = static_cast<uint32_t>(data);
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pkt->bitfields3.data_sel = data_sel__mec_release_mem__none;
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}
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pkt->bitfields4a.address_lo_32b = static_cast<uint32_t>((address&0xffffffff) >> 2);
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pkt->address_hi = static_cast<uint32_t>(address>>32);
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pkt->data_lo = static_cast<uint32_t>(data);
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pkt->data_hi = static_cast<uint32_t>(data >> 32);
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pkt->int_ctxid = static_cast<uint32_t>(data);
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}
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void PM4ReleaseMemoryPacket::InitPacketNV(bool isPolling, uint64_t address,
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uint64_t data, bool is64bit, bool isTimeStamp) {
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PM4MEC_RELEASE_MEM_NV *pkt;
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m_packetSize = sizeof(PM4_MEC_RELEASE_MEM_NV);
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pkt = reinterpret_cast<PM4_MEC_RELEASE_MEM_NV *>(calloc(1, m_packetSize));
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m_pPacketData = pkt;
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EXPECT_NOTNULL(m_pPacketData);
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InitPM4Header(pkt->header, IT_RELEASE_MEM);
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pkt->bitfields2.event_type = 0x14;
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pkt->bitfields2.event_index = event_index__mec_release_mem__end_of_pipe;
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pkt->bitfields2.gcr_cntl = (1<<10) | (1<<9) | (1<<8) | (1<<3) | (1<<2);
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pkt->bitfields2.cache_policy = cache_policy__mec_release_mem__lru;
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pkt->bitfields3.dst_sel = dst_sel__mec_release_mem__memory_controller;
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if (address) {
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pkt->bitfields3.int_sel = (isPolling ?
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int_sel__mec_release_mem__send_data_after_write_confirm:
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int_sel__mec_release_mem__send_interrupt_after_write_confirm);
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if (isTimeStamp && is64bit)
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pkt->bitfields3.data_sel = data_sel__mec_release_mem__send_gpu_clock_counter;
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else
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pkt->bitfields3.data_sel = is64bit ?
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data_sel__mec_release_mem__send_64_bit_data :
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data_sel__mec_release_mem__send_32_bit_low;
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} else {
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pkt->bitfields3.int_sel = (isPolling ?
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int_sel__mec_release_mem__none:
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int_sel__mec_release_mem__send_interrupt_only);
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pkt->bitfields3.data_sel = data_sel__mec_release_mem__none;
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}
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pkt->bitfields4a.address_lo_32b = static_cast<uint32_t>((address&0xffffffff) >> 2);
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pkt->address_hi = static_cast<uint32_t>(address>>32);
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pkt->data_lo = static_cast<uint32_t>(data);
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pkt->data_hi = static_cast<uint32_t>(data >> 32);
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pkt->int_ctxid = static_cast<uint32_t>(data);
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}
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PM4IndirectBufPacket::PM4IndirectBufPacket(IndirectBuffer *pIb) {
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@@ -211,22 +262,48 @@ void PM4IndirectBufPacket::InitPacket(IndirectBuffer *pIb) {
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m_packetData.bitfields4.vmid = 0; // in iommutest: vmid = queueParams.VMID;
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m_packetData.bitfields4.cache_policy = cache_policy_indirect_buffer_BYPASS_2;
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}
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PM4AcquireMemoryPacket::PM4AcquireMemoryPacket(unsigned int familyId):m_pPacketData(NULL)
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{
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PM4AcquireMemoryPacket::PM4AcquireMemoryPacket(void) {
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memset(&m_packetData, 0, SizeInBytes());
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InitPM4Header(m_packetData.header, IT_ACQUIRE_MEM);
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m_packetData.bitfields2.coher_cntl = 0x28c00000; // copied from the way the HSART does this.
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m_packetData.bitfields2.engine = engine_acquire_mem_PFP_0;
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m_packetData.coher_size = 0xFFFFFFFF;
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m_packetData.bitfields3.coher_size_hi = 0;
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m_packetData.coher_base_lo = 0;
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m_packetData.bitfields4.coher_base_hi = 0;
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m_packetData.bitfields5.poll_interval = 4; // copied from the way the HSART does this.
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if (familyId < FAMILY_NV)
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InitPacketAI();
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else
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InitPacketNV();
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}
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unsigned int PM4AcquireMemoryPacket::SizeInBytes() const {
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return sizeof(PM4ACQUIRE_MEM);
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void PM4AcquireMemoryPacket::InitPacketAI(void) {
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PM4ACQUIRE_MEM *pkt;
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m_packetSize = sizeof(PM4ACQUIRE_MEM);
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pkt = reinterpret_cast<PM4ACQUIRE_MEM*>(calloc(1, m_packetSize));
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m_pPacketData = pkt;
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EXPECT_NOTNULL(m_pPacketData);
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InitPM4Header(pkt->header, IT_ACQUIRE_MEM);
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pkt->bitfields2.coher_cntl = 0x28c00000; // copied from the way the HSART does this.
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pkt->bitfields2.engine = engine_acquire_mem_PFP_0;
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pkt->coher_size = 0xFFFFFFFF;
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pkt->bitfields3.coher_size_hi = 0;
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pkt->coher_base_lo = 0;
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pkt->bitfields4.coher_base_hi = 0;
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pkt->bitfields5.poll_interval = 4; // copied from the way the HSART does this.
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}
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void PM4AcquireMemoryPacket::InitPacketNV(void) {
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PM4ACQUIRE_MEM_NV *pkt;
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m_packetSize = sizeof(PM4ACQUIRE_MEM_NV);
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pkt = reinterpret_cast<PM4ACQUIRE_MEM_NV*>(calloc(1, m_packetSize));
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m_pPacketData = pkt;
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EXPECT_NOTNULL(m_pPacketData);
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InitPM4Header(pkt->header, IT_ACQUIRE_MEM);
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pkt->coher_size = 0xFFFFFFFF;
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pkt->bitfields3.coher_size_hi = 0;
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pkt->coher_base_lo = 0;
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pkt->bitfields4.coher_base_hi = 0;
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pkt->bitfields5.poll_interval = 4; //copied from the way the HSART does this.
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/* Invalidate gL2, gL1 with range base
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* Invalidate GLV, GLK (L0$)
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* Invalidate all Icache (GLI)
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*/
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pkt->bitfields6.gcr_cntl = (1<<14|1<<9|1<<8|1<<7|1);
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}
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PM4SetShaderRegPacket::PM4SetShaderRegPacket(void)
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