SWDEV-459826 - Add a crash dump for a failed queue
The logic can analyze the AQL queue state and find a failed AQL packet with the kernel's name Change-Id: I1a478fa2c25462cd07a194784958bdf22454b897
这个提交包含在:
1 父节点
f2ff56af9c
当前提交
ea0b092af8
7 个文件已更改
+143
-127
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+26
-33
@@ -37,6 +37,7 @@
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#include "device/rocm/rocblit.hpp"
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#include "device/rocm/rocvirtual.hpp"
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#include "device/rocm/rocprogram.hpp"
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#include "device/rocm/rockernel.hpp"
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#include "device/rocm/rocmemory.hpp"
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#include "device/rocm/rocglinterop.hpp"
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#include "device/rocm/rocsignal.hpp"
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@@ -856,38 +857,6 @@ device::Program* NullDevice::createProgram(amd::Program& owner, amd::option::Opt
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return program;
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}
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bool Device::AcquireExclusiveGpuAccess() {
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// Lock the virtual GPU list
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vgpusAccess().lock();
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// Find all available virtual GPUs and lock them
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// from the execution of commands
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for (uint idx = 0; idx < vgpus().size(); ++idx) {
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vgpus()[idx]->execution().lock();
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// Make sure a wait is done
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vgpus()[idx]->releaseGpuMemoryFence();
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}
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if (!hsa_exclusive_gpu_access_) {
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// @todo call rocr
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hsa_exclusive_gpu_access_ = true;
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}
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return true;
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}
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void Device::ReleaseExclusiveGpuAccess(VirtualGPU& vgpu) const {
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// Make sure the operation is done
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vgpu.releaseGpuMemoryFence();
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// Find all available virtual GPUs and unlock them
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// for the execution of commands
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for (uint idx = 0; idx < vgpus().size(); ++idx) {
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vgpus()[idx]->execution().unlock();
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}
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// Unock the virtual GPU list
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vgpusAccess().unlock();
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}
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bool Device::createBlitProgram() {
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bool result = true;
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std::string extraKernel;
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@@ -2991,12 +2960,18 @@ void Device::getHwEventTime(const amd::Event& event, uint64_t* start, uint64_t*
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// ================================================================================================
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static void callbackQueue(hsa_status_t status, hsa_queue_t* queue, void* data) {
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if (status != HSA_STATUS_SUCCESS && status != HSA_STATUS_INFO_BREAK) {
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Device* dev = reinterpret_cast<Device*>(data);
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for (auto it : dev->vgpus()) {
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roc::VirtualGPU* vgpu = reinterpret_cast<roc::VirtualGPU*>(it);
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if (vgpu->gpu_queue() == queue) {
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vgpu->AnalyzeAqlQueue();
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}
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}
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// Abort on device exceptions.
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const char* errorMsg = 0;
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hsa_status_string(status, &errorMsg);
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if (status == HSA_STATUS_ERROR_OUT_OF_RESOURCES) {
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size_t global_available_mem = 0;
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Device* dev = reinterpret_cast<Device*>(data);
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if (HSA_STATUS_SUCCESS != hsa_agent_get_info(dev->getBackendDevice(),
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static_cast<hsa_agent_info_t>(HSA_AMD_AGENT_INFO_MEMORY_AVAIL),
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&global_available_mem)) {
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@@ -3624,6 +3599,24 @@ void Device::resetSDMAMask(const device::BlitManager* handle) const {
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}
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}
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// ================================================================================================
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void Device::AddKernel(Kernel& gpuKernel) const {
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amd::ScopedLock lock(vgpusAccess());
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kernel_map_.insert({gpuKernel.KernelCodeHandle(), gpuKernel});
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}
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// ================================================================================================
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void Device::RemoveKernel(Kernel& gpuKernel) const {
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if (gpuKernel.KernelCodeHandle() != 0) {
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amd::ScopedLock lock(vgpusAccess());
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auto it = kernel_map_.find(gpuKernel.KernelCodeHandle());
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if (it != kernel_map_.end()) {
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// Remove the old mapping
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kernel_map_.erase(it);
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}
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}
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}
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// ================================================================================================
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ProfilingSignal::~ProfilingSignal() {
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if (signal_.handle != 0) {
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