From eac85bc28ee702980c17617ffc2855fcd4c28d57 Mon Sep 17 00:00:00 2001 From: foreman Date: Fri, 24 Feb 2017 10:21:55 -0500 Subject: [PATCH] P4 to Git Change 1377580 by jatang@jatang-opencl-hsa-stg1 on 2017/02/24 10:12:45 SWDEV-99150 - Fix a build error caused by CL#1376394. Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palcounters.cpp#10 edit [ROCm/clr commit: 33fde894427c2d8ba8a93451175599ec2dce4bff] --- .../rocclr/runtime/device/pal/palcounters.cpp | 612 +++++++++--------- 1 file changed, 322 insertions(+), 290 deletions(-) diff --git a/projects/clr/rocclr/runtime/device/pal/palcounters.cpp b/projects/clr/rocclr/runtime/device/pal/palcounters.cpp index 97e15c930d..aeef06aa01 100644 --- a/projects/clr/rocclr/runtime/device/pal/palcounters.cpp +++ b/projects/clr/rocclr/runtime/device/pal/palcounters.cpp @@ -143,306 +143,338 @@ bool PalCounterReference::finalize() } } +static const +std::array blockIdToIndexSelect = +{{ + PCIndexSelect::None, // CPF + PCIndexSelect::ShaderEngine, // IA + PCIndexSelect::ShaderEngine, // VGT + PCIndexSelect::ShaderEngine, // PA + PCIndexSelect::ShaderEngine, // SC + PCIndexSelect::ShaderEngine, // SPI + PCIndexSelect::ShaderEngine, // SQ + PCIndexSelect::ShaderEngine, // SX + PCIndexSelect::ShaderEngineAndInstance, // TA + PCIndexSelect::ShaderEngineAndInstance, // TD + PCIndexSelect::ShaderEngineAndInstance, // TCP + PCIndexSelect::Instance, // TCC + PCIndexSelect::Instance, // TCA + PCIndexSelect::ShaderEngineAndInstance, // DB + PCIndexSelect::ShaderEngineAndInstance, // CB + PCIndexSelect::None, // GDS + PCIndexSelect::None, // SRBM + PCIndexSelect::None, // GRBM + PCIndexSelect::None, // GRBMSE + PCIndexSelect::None, // RLC + PCIndexSelect::None, // DMA + PCIndexSelect::None, // MC + PCIndexSelect::None, // CPG + PCIndexSelect::None, // CPC + PCIndexSelect::None, // WD + PCIndexSelect::None, // TCS + PCIndexSelect::None, // UTC12 +}}; + // Converting from ORCA cmndefs.h to PAL palPerfExperiment.h static const -std::array, 83> ciBlockIdOrcaToPal = +std::array, 83> ciBlockIdOrcaToPal = {{ - {0x0E, 0, PCIndexSelect::ShaderEngineAndInstance}, // CB0 - {0x0E, 1, PCIndexSelect::ShaderEngineAndInstance}, // CB1 - {0x0E, 2, PCIndexSelect::ShaderEngineAndInstance}, // CB2 - {0x0E, 3, PCIndexSelect::ShaderEngineAndInstance}, // CB3 - {0x00, 0, PCIndexSelect::None}, // CPF - {0x0D, 0, PCIndexSelect::ShaderEngineAndInstance}, // DB0 - {0x0D, 1, PCIndexSelect::ShaderEngineAndInstance}, // DB1 - {0x0D, 2, PCIndexSelect::ShaderEngineAndInstance}, // DB2 - {0x0D, 3, PCIndexSelect::ShaderEngineAndInstance}, // DB3 - {0x11, 0, PCIndexSelect::None}, // GRBM - {0x12, 0, PCIndexSelect::None}, // GRBMSE - {0x03, 0, PCIndexSelect::ShaderEngine}, // PA_SU - {0x03, 0, PCIndexSelect::ShaderEngine}, // PA_SC - {0x05, 0, PCIndexSelect::ShaderEngine}, // SPI - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_ES - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_GS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_VS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_PS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_LS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_HS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_CS - {0x07, 0, PCIndexSelect::ShaderEngine}, // SX - {0x08, 0, PCIndexSelect::ShaderEngineAndInstance}, // TA0 - {0x08, 1, PCIndexSelect::ShaderEngineAndInstance}, // TA1 - {0x08, 2, PCIndexSelect::ShaderEngineAndInstance}, // TA2 - {0x08, 3, PCIndexSelect::ShaderEngineAndInstance}, // TA3 - {0x08, 4, PCIndexSelect::ShaderEngineAndInstance}, // TA4 - {0x08, 5, PCIndexSelect::ShaderEngineAndInstance}, // TA5 - {0x08, 6, PCIndexSelect::ShaderEngineAndInstance}, // TA6 - {0x08, 7, PCIndexSelect::ShaderEngineAndInstance}, // TA7 - {0x08, 8, PCIndexSelect::ShaderEngineAndInstance}, // TA8 - {0x08, 9, PCIndexSelect::ShaderEngineAndInstance}, // TA9 - {0x08, 0x0a, PCIndexSelect::ShaderEngineAndInstance}, // TA10 - {0x0C, 0, PCIndexSelect::Instance}, // TCA0 - {0x0C, 1, PCIndexSelect::Instance}, // TCA1 - {0x0B, 0, PCIndexSelect::Instance}, // TCC0 - {0x0B, 1, PCIndexSelect::Instance}, // TCC1 - {0x0B, 2, PCIndexSelect::Instance}, // TCC2 - {0x0B, 3, PCIndexSelect::Instance}, // TCC3 - {0x0B, 4, PCIndexSelect::Instance}, // TCC4 - {0x0B, 5, PCIndexSelect::Instance}, // TCC5 - {0x0B, 6, PCIndexSelect::Instance}, // TCC6 - {0x0B, 7, PCIndexSelect::Instance}, // TCC7 - {0x0B, 8, PCIndexSelect::Instance}, // TCC8 - {0x0B, 9, PCIndexSelect::Instance}, // TCC9 - {0x0B, 0x0a, PCIndexSelect::Instance}, // TCC10 - {0x0B, 0x0b, PCIndexSelect::Instance}, // TCC11 - {0x0B, 0x0c, PCIndexSelect::Instance}, // TCC12 - {0x0B, 0x0d, PCIndexSelect::Instance}, // TCC13 - {0x0B, 0x0e, PCIndexSelect::Instance}, // TCC14 - {0x0B, 0x0f, PCIndexSelect::Instance}, // TCC15 - {0x09, 0, PCIndexSelect::ShaderEngineAndInstance}, // TD0 - {0x09, 1, PCIndexSelect::ShaderEngineAndInstance}, // TD1 - {0x09, 2, PCIndexSelect::ShaderEngineAndInstance}, // TD2 - {0x09, 3, PCIndexSelect::ShaderEngineAndInstance}, // TD3 - {0x09, 4, PCIndexSelect::ShaderEngineAndInstance}, // TD4 - {0x09, 5, PCIndexSelect::ShaderEngineAndInstance}, // TD5 - {0x09, 6, PCIndexSelect::ShaderEngineAndInstance}, // TD6 - {0x09, 7, PCIndexSelect::ShaderEngineAndInstance}, // TD7 - {0x09, 8, PCIndexSelect::ShaderEngineAndInstance}, // TD8 - {0x09, 9, PCIndexSelect::ShaderEngineAndInstance}, // TD9 - {0x09, 0x0a, PCIndexSelect::ShaderEngineAndInstance}, // TD10 - {0x0A, 0, PCIndexSelect::ShaderEngineAndInstance}, // TCP0 - {0x0A, 1, PCIndexSelect::ShaderEngineAndInstance}, // TCP1 - {0x0A, 2, PCIndexSelect::ShaderEngineAndInstance}, // TCP2 - {0x0A, 3, PCIndexSelect::ShaderEngineAndInstance}, // TCP3 - {0x0A, 4, PCIndexSelect::ShaderEngineAndInstance}, // TCP4 - {0x0A, 5, PCIndexSelect::ShaderEngineAndInstance}, // TCP5 - {0x0A, 6, PCIndexSelect::ShaderEngineAndInstance}, // TCP6 - {0x0A, 7, PCIndexSelect::ShaderEngineAndInstance}, // TCP7 - {0x0A, 8, PCIndexSelect::ShaderEngineAndInstance}, // TCP8 - {0x0A, 9, PCIndexSelect::ShaderEngineAndInstance}, // TCP9 - {0x0A, 0x0a, PCIndexSelect::ShaderEngineAndInstance}, // TCP10 - {0x0F, 0, PCIndexSelect::None}, // GDS - {0x02, 0, PCIndexSelect::ShaderEngine}, // VGT - {0x01, 0, PCIndexSelect::ShaderEngine}, // IA - {0x15, 0, PCIndexSelect::None}, // MC - {0x10, 0, PCIndexSelect::None}, // SRBM - {0x19, 0, PCIndexSelect::None}, // TCS - {0x18, 0, PCIndexSelect::None}, // WD - {0x16, 0, PCIndexSelect::None}, // CPG - {0x17, 0, PCIndexSelect::None}, // CPC + {0x0E, 0}, // CB0 + {0x0E, 1}, // CB1 + {0x0E, 2}, // CB2 + {0x0E, 3}, // CB3 + {0x00, 0}, // CPF + {0x0D, 0}, // DB0 + {0x0D, 1}, // DB1 + {0x0D, 2}, // DB2 + {0x0D, 3}, // DB3 + {0x11, 0}, // GRBM + {0x12, 0}, // GRBMSE + {0x03, 0}, // PA_SU + {0x03, 0}, // PA_SC + {0x05, 0}, // SPI + {0x06, 0}, // SQ + {0x06, 0}, // SQ_ES + {0x06, 0}, // SQ_GS + {0x06, 0}, // SQ_VS + {0x06, 0}, // SQ_PS + {0x06, 0}, // SQ_LS + {0x06, 0}, // SQ_HS + {0x06, 0}, // SQ_CS + {0x07, 0}, // SX + {0x08, 0}, // TA0 + {0x08, 1}, // TA1 + {0x08, 2}, // TA2 + {0x08, 3}, // TA3 + {0x08, 4}, // TA4 + {0x08, 5}, // TA5 + {0x08, 6}, // TA6 + {0x08, 7}, // TA7 + {0x08, 8}, // TA8 + {0x08, 9}, // TA9 + {0x08, 0x0a}, // TA10 + {0x0C, 0}, // TCA0 + {0x0C, 1}, // TCA1 + {0x0B, 0}, // TCC0 + {0x0B, 1}, // TCC1 + {0x0B, 2}, // TCC2 + {0x0B, 3}, // TCC3 + {0x0B, 4}, // TCC4 + {0x0B, 5}, // TCC5 + {0x0B, 6}, // TCC6 + {0x0B, 7}, // TCC7 + {0x0B, 8}, // TCC8 + {0x0B, 9}, // TCC9 + {0x0B, 0x0a}, // TCC10 + {0x0B, 0x0b}, // TCC11 + {0x0B, 0x0c}, // TCC12 + {0x0B, 0x0d}, // TCC13 + {0x0B, 0x0e}, // TCC14 + {0x0B, 0x0f}, // TCC15 + {0x09, 0}, // TD0 + {0x09, 1}, // TD1 + {0x09, 2}, // TD2 + {0x09, 3}, // TD3 + {0x09, 4}, // TD4 + {0x09, 5}, // TD5 + {0x09, 6}, // TD6 + {0x09, 7}, // TD7 + {0x09, 8}, // TD8 + {0x09, 9}, // TD9 + {0x09, 0x0a}, // TD10 + {0x0A, 0}, // TCP0 + {0x0A, 1}, // TCP1 + {0x0A, 2}, // TCP2 + {0x0A, 3}, // TCP3 + {0x0A, 4}, // TCP4 + {0x0A, 5}, // TCP5 + {0x0A, 6}, // TCP6 + {0x0A, 7}, // TCP7 + {0x0A, 8}, // TCP8 + {0x0A, 9}, // TCP9 + {0x0A, 0x0a}, // TCP10 + {0x0F, 0}, // GDS + {0x02, 0}, // VGT + {0x01, 0}, // IA + {0x15, 0}, // MC + {0x10, 0}, // SRBM + {0x19, 0}, // TCS + {0x18, 0}, // WD + {0x16, 0}, // CPG + {0x17, 0}, // CPC }}; static const -std::array, 97> viBlockIdOrcaToPal = +std::array, 97> viBlockIdOrcaToPal = {{ - {0x0E, 0, PCIndexSelect::ShaderEngineAndInstance}, // CB0 - {0x0E, 1, PCIndexSelect::ShaderEngineAndInstance}, // CB1 - {0x0E, 2, PCIndexSelect::ShaderEngineAndInstance}, // CB2 - {0x0E, 3, PCIndexSelect::ShaderEngineAndInstance}, // CB3 - {0x00, 0, PCIndexSelect::None}, // CPF - {0x0D, 0, PCIndexSelect::ShaderEngineAndInstance}, // DB0 - {0x0D, 1, PCIndexSelect::ShaderEngineAndInstance}, // DB1 - {0x0D, 2, PCIndexSelect::ShaderEngineAndInstance}, // DB2 - {0x0D, 3, PCIndexSelect::ShaderEngineAndInstance}, // DB3 - {0x11, 0, PCIndexSelect::None}, // GRBM - {0x12, 0, PCIndexSelect::None}, // GRBMSE - {0x03, 0, PCIndexSelect::ShaderEngine}, // PA_SU - {0x03, 0, PCIndexSelect::ShaderEngine}, // PA_SC - {0x05, 0, PCIndexSelect::ShaderEngine}, // SPI - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_ES - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_GS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_VS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_PS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_LS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_HS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_CS - {0x07, 0, PCIndexSelect::ShaderEngine}, // SX - {0x08, 0, PCIndexSelect::ShaderEngineAndInstance}, // TA0 - {0x08, 1, PCIndexSelect::ShaderEngineAndInstance}, // TA1 - {0x08, 2, PCIndexSelect::ShaderEngineAndInstance}, // TA2 - {0x08, 3, PCIndexSelect::ShaderEngineAndInstance}, // TA3 - {0x08, 4, PCIndexSelect::ShaderEngineAndInstance}, // TA4 - {0x08, 5, PCIndexSelect::ShaderEngineAndInstance}, // TA5 - {0x08, 6, PCIndexSelect::ShaderEngineAndInstance}, // TA6 - {0x08, 7, PCIndexSelect::ShaderEngineAndInstance}, // TA7 - {0x08, 8, PCIndexSelect::ShaderEngineAndInstance}, // TA8 - {0x08, 9, PCIndexSelect::ShaderEngineAndInstance}, // TA9 - {0x08, 0x0a, PCIndexSelect::ShaderEngineAndInstance}, // TA10 - {0x08, 0x0b, PCIndexSelect::ShaderEngineAndInstance}, // TA11 - {0x08, 0x0c, PCIndexSelect::ShaderEngineAndInstance}, // TA12 - {0x08, 0x0d, PCIndexSelect::ShaderEngineAndInstance}, // TA13 - {0x08, 0x0e, PCIndexSelect::ShaderEngineAndInstance}, // TA14 - {0x08, 0x0f, PCIndexSelect::ShaderEngineAndInstance}, // TA15 - {0x0C, 0, PCIndexSelect::Instance}, // TCA0 - {0x0C, 1, PCIndexSelect::Instance}, // TCA1 - {0x0B, 0, PCIndexSelect::Instance}, // TCC0 - {0x0B, 1, PCIndexSelect::Instance}, // TCC1 - {0x0B, 2, PCIndexSelect::Instance}, // TCC2 - {0x0B, 3, PCIndexSelect::Instance}, // TCC3 - {0x0B, 4, PCIndexSelect::Instance}, // TCC4 - {0x0B, 5, PCIndexSelect::Instance}, // TCC5 - {0x0B, 6, PCIndexSelect::Instance}, // TCC6 - {0x0B, 7, PCIndexSelect::Instance}, // TCC7 - {0x0B, 8, PCIndexSelect::Instance}, // TCC8 - {0x0B, 9, PCIndexSelect::Instance}, // TCC9 - {0x0B, 0x0a, PCIndexSelect::Instance}, // TCC10 - {0x0B, 0x0b, PCIndexSelect::Instance}, // TCC11 - {0x0B, 0x0c, PCIndexSelect::Instance}, // TCC12 - {0x0B, 0x0d, PCIndexSelect::Instance}, // TCC13 - {0x0B, 0x0e, PCIndexSelect::Instance}, // TCC14 - {0x0B, 0x0f, PCIndexSelect::Instance}, // TCC15 - {0x09, 0, PCIndexSelect::ShaderEngineAndInstance}, // TD0 - {0x09, 1, PCIndexSelect::ShaderEngineAndInstance}, // TD1 - {0x09, 2, PCIndexSelect::ShaderEngineAndInstance}, // TD2 - {0x09, 3, PCIndexSelect::ShaderEngineAndInstance}, // TD3 - {0x09, 4, PCIndexSelect::ShaderEngineAndInstance}, // TD4 - {0x09, 5, PCIndexSelect::ShaderEngineAndInstance}, // TD5 - {0x09, 6, PCIndexSelect::ShaderEngineAndInstance}, // TD6 - {0x09, 7, PCIndexSelect::ShaderEngineAndInstance}, // TD7 - {0x09, 8, PCIndexSelect::ShaderEngineAndInstance}, // TD8 - {0x09, 9, PCIndexSelect::ShaderEngineAndInstance}, // TD9 - {0x09, 0x0a, PCIndexSelect::ShaderEngineAndInstance}, // TD10 - {0x09, 0x0b, PCIndexSelect::ShaderEngineAndInstance}, // TD11 - {0x09, 0x0c, PCIndexSelect::ShaderEngineAndInstance}, // TD12 - {0x09, 0x0d, PCIndexSelect::ShaderEngineAndInstance}, // TD13 - {0x09, 0x0e, PCIndexSelect::ShaderEngineAndInstance}, // TD14 - {0x09, 0x0f, PCIndexSelect::ShaderEngineAndInstance}, // TD15 - {0x0A, 0, PCIndexSelect::ShaderEngineAndInstance}, // TCP0 - {0x0A, 1, PCIndexSelect::ShaderEngineAndInstance}, // TCP1 - {0x0A, 2, PCIndexSelect::ShaderEngineAndInstance}, // TCP2 - {0x0A, 3, PCIndexSelect::ShaderEngineAndInstance}, // TCP3 - {0x0A, 4, PCIndexSelect::ShaderEngineAndInstance}, // TCP4 - {0x0A, 5, PCIndexSelect::ShaderEngineAndInstance}, // TCP5 - {0x0A, 6, PCIndexSelect::ShaderEngineAndInstance}, // TCP6 - {0x0A, 7, PCIndexSelect::ShaderEngineAndInstance}, // TCP7 - {0x0A, 8, PCIndexSelect::ShaderEngineAndInstance}, // TCP8 - {0x0A, 9, PCIndexSelect::ShaderEngineAndInstance}, // TCP9 - {0x0A, 0x0a, PCIndexSelect::ShaderEngineAndInstance}, // TCP10 - {0x0A, 0x0b, PCIndexSelect::ShaderEngineAndInstance}, // TCP11 - {0x0A, 0x0c, PCIndexSelect::ShaderEngineAndInstance}, // TCP12 - {0x0A, 0x0d, PCIndexSelect::ShaderEngineAndInstance}, // TCP13 - {0x0A, 0x0e, PCIndexSelect::ShaderEngineAndInstance}, // TCP14 - {0x0A, 0x0f, PCIndexSelect::ShaderEngineAndInstance}, // TCP15 - {0x0F, 0, PCIndexSelect::None}, // GDS - {0x02, 0, PCIndexSelect::ShaderEngine}, // VGT - {0x01, 0, PCIndexSelect::ShaderEngine}, // IA - {0x15, 0, PCIndexSelect::None}, // MC - {0x10, 0, PCIndexSelect::None}, // SRBM - {0x18, 0, PCIndexSelect::None}, // WD - {0x16, 0, PCIndexSelect::None}, // CPG - {0x17, 0, PCIndexSelect::None}, // CPC + {0x0E, 0}, // CB0 + {0x0E, 1}, // CB1 + {0x0E, 2}, // CB2 + {0x0E, 3}, // CB3 + {0x00, 0}, // CPF + {0x0D, 0}, // DB0 + {0x0D, 1}, // DB1 + {0x0D, 2}, // DB2 + {0x0D, 3}, // DB3 + {0x11, 0}, // GRBM + {0x12, 0}, // GRBMSE + {0x03, 0}, // PA_SU + {0x03, 0}, // PA_SC + {0x05, 0}, // SPI + {0x06, 0}, // SQ + {0x06, 0}, // SQ_ES + {0x06, 0}, // SQ_GS + {0x06, 0}, // SQ_VS + {0x06, 0}, // SQ_PS + {0x06, 0}, // SQ_LS + {0x06, 0}, // SQ_HS + {0x06, 0}, // SQ_CS + {0x07, 0}, // SX + {0x08, 0}, // TA0 + {0x08, 1}, // TA1 + {0x08, 2}, // TA2 + {0x08, 3}, // TA3 + {0x08, 4}, // TA4 + {0x08, 5}, // TA5 + {0x08, 6}, // TA6 + {0x08, 7}, // TA7 + {0x08, 8}, // TA8 + {0x08, 9}, // TA9 + {0x08, 0x0a}, // TA10 + {0x08, 0x0b}, // TA11 + {0x08, 0x0c}, // TA12 + {0x08, 0x0d}, // TA13 + {0x08, 0x0e}, // TA14 + {0x08, 0x0f}, // TA15 + {0x0C, 0}, // TCA0 + {0x0C, 1}, // TCA1 + {0x0B, 0}, // TCC0 + {0x0B, 1}, // TCC1 + {0x0B, 2}, // TCC2 + {0x0B, 3}, // TCC3 + {0x0B, 4}, // TCC4 + {0x0B, 5}, // TCC5 + {0x0B, 6}, // TCC6 + {0x0B, 7}, // TCC7 + {0x0B, 8}, // TCC8 + {0x0B, 9}, // TCC9 + {0x0B, 0x0a}, // TCC10 + {0x0B, 0x0b}, // TCC11 + {0x0B, 0x0c}, // TCC12 + {0x0B, 0x0d}, // TCC13 + {0x0B, 0x0e}, // TCC14 + {0x0B, 0x0f}, // TCC15 + {0x09, 0}, // TD0 + {0x09, 1}, // TD1 + {0x09, 2}, // TD2 + {0x09, 3}, // TD3 + {0x09, 4}, // TD4 + {0x09, 5}, // TD5 + {0x09, 6}, // TD6 + {0x09, 7}, // TD7 + {0x09, 8}, // TD8 + {0x09, 9}, // TD9 + {0x09, 0x0a}, // TD10 + {0x09, 0x0b}, // TD11 + {0x09, 0x0c}, // TD12 + {0x09, 0x0d}, // TD13 + {0x09, 0x0e}, // TD14 + {0x09, 0x0f}, // TD15 + {0x0A, 0}, // TCP0 + {0x0A, 1}, // TCP1 + {0x0A, 2}, // TCP2 + {0x0A, 3}, // TCP3 + {0x0A, 4}, // TCP4 + {0x0A, 5}, // TCP5 + {0x0A, 6}, // TCP6 + {0x0A, 7}, // TCP7 + {0x0A, 8}, // TCP8 + {0x0A, 9}, // TCP9 + {0x0A, 0x0a}, // TCP10 + {0x0A, 0x0b}, // TCP11 + {0x0A, 0x0c}, // TCP12 + {0x0A, 0x0d}, // TCP13 + {0x0A, 0x0e}, // TCP14 + {0x0A, 0x0f}, // TCP15 + {0x0F, 0}, // GDS + {0x02, 0}, // VGT + {0x01, 0}, // IA + {0x15, 0}, // MC + {0x10, 0}, // SRBM + {0x18, 0}, // WD + {0x16, 0}, // CPG + {0x17, 0}, // CPC }}; // The number of counters per block has been increased for gfx9 but this table may not reflect all of them // as compute may not use all of them. static const -std::array, 104> gfx9BlockIdPal = +std::array, 104> gfx9BlockIdPal = {{ - {0x0E, 0, PCIndexSelect::ShaderEngineAndInstance}, // CB0 - {0x0E, 1, PCIndexSelect::ShaderEngineAndInstance}, // CB1 - {0x0E, 2, PCIndexSelect::ShaderEngineAndInstance}, // CB2 - {0x0E, 3, PCIndexSelect::ShaderEngineAndInstance}, // CB3 - {0x00, 0, PCIndexSelect::Instance}, // CPF0 - {0x00, 1, PCIndexSelect::Instance}, // CPF1 - {0x0D, 0, PCIndexSelect::ShaderEngineAndInstance}, // DB0 - {0x0D, 1, PCIndexSelect::ShaderEngineAndInstance}, // DB1 - {0x0D, 2, PCIndexSelect::ShaderEngineAndInstance}, // DB2 - {0x0D, 3, PCIndexSelect::ShaderEngineAndInstance}, // DB3 - {0x11, 0, PCIndexSelect::Instance}, // GRBM0 - {0x11, 1, PCIndexSelect::Instance}, // GRBM1 - {0x12, 0, PCIndexSelect::Instance}, // GRBMSE0 - {0x03, 0, PCIndexSelect::ShaderEngine}, // PA_SU - {0x03, 0, PCIndexSelect::ShaderEngine}, // PA_SC - {0x05, 0, PCIndexSelect::ShaderEngine}, // SPI - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ0 - {0x06, 1, PCIndexSelect::ShaderEngine}, // SQ1 - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_ES - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_GS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_VS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_PS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_LS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_HS - {0x06, 0, PCIndexSelect::ShaderEngine}, // SQ_CS0 - {0x06, 1, PCIndexSelect::ShaderEngine}, // SQ_CS1 - {0x07, 0, PCIndexSelect::ShaderEngine}, // SX - {0x08, 0, PCIndexSelect::ShaderEngineAndInstance}, // TA0 - {0x08, 1, PCIndexSelect::ShaderEngineAndInstance}, // TA1 - {0x08, 2, PCIndexSelect::ShaderEngineAndInstance}, // TA2 - {0x08, 3, PCIndexSelect::ShaderEngineAndInstance}, // TA3 - {0x08, 4, PCIndexSelect::ShaderEngineAndInstance}, // TA4 - {0x08, 5, PCIndexSelect::ShaderEngineAndInstance}, // TA5 - {0x08, 6, PCIndexSelect::ShaderEngineAndInstance}, // TA6 - {0x08, 7, PCIndexSelect::ShaderEngineAndInstance}, // TA7 - {0x08, 8, PCIndexSelect::ShaderEngineAndInstance}, // TA8 - {0x08, 9, PCIndexSelect::ShaderEngineAndInstance}, // TA9 - {0x08, 0x0a, PCIndexSelect::ShaderEngineAndInstance}, // TA10 - {0x08, 0x0b, PCIndexSelect::ShaderEngineAndInstance}, // TA11 - {0x08, 0x0c, PCIndexSelect::ShaderEngineAndInstance}, // TA12 - {0x08, 0x0d, PCIndexSelect::ShaderEngineAndInstance}, // TA13 - {0x08, 0x0e, PCIndexSelect::ShaderEngineAndInstance}, // TA14 - {0x08, 0x0f, PCIndexSelect::ShaderEngineAndInstance}, // TA15 - {0x0C, 0, PCIndexSelect::Instance}, // TCA0 - {0x0C, 1, PCIndexSelect::Instance}, // TCA1 - {0x0B, 0, PCIndexSelect::Instance}, // TCC0 - {0x0B, 1, PCIndexSelect::Instance}, // TCC1 - {0x0B, 2, PCIndexSelect::Instance}, // TCC2 - {0x0B, 3, PCIndexSelect::Instance}, // TCC3 - {0x0B, 4, PCIndexSelect::Instance}, // TCC4 - {0x0B, 5, PCIndexSelect::Instance}, // TCC5 - {0x0B, 6, PCIndexSelect::Instance}, // TCC6 - {0x0B, 7, PCIndexSelect::Instance}, // TCC7 - {0x0B, 8, PCIndexSelect::Instance}, // TCC8 - {0x0B, 9, PCIndexSelect::Instance}, // TCC9 - {0x0B, 0x0a, PCIndexSelect::Instance}, // TCC10 - {0x0B, 0x0b, PCIndexSelect::Instance}, // TCC11 - {0x0B, 0x0c, PCIndexSelect::Instance}, // TCC12 - {0x0B, 0x0d, PCIndexSelect::Instance}, // TCC13 - {0x0B, 0x0e, PCIndexSelect::Instance}, // TCC14 - {0x0B, 0x0f, PCIndexSelect::Instance}, // TCC15 - {0x09, 0, PCIndexSelect::ShaderEngineAndInstance}, // TD0 - {0x09, 1, PCIndexSelect::ShaderEngineAndInstance}, // TD1 - {0x09, 2, PCIndexSelect::ShaderEngineAndInstance}, // TD2 - {0x09, 3, PCIndexSelect::ShaderEngineAndInstance}, // TD3 - {0x09, 4, PCIndexSelect::ShaderEngineAndInstance}, // TD4 - {0x09, 5, PCIndexSelect::ShaderEngineAndInstance}, // TD5 - {0x09, 6, PCIndexSelect::ShaderEngineAndInstance}, // TD6 - {0x09, 7, PCIndexSelect::ShaderEngineAndInstance}, // TD7 - {0x09, 8, PCIndexSelect::ShaderEngineAndInstance}, // TD8 - {0x09, 9, PCIndexSelect::ShaderEngineAndInstance}, // TD9 - {0x09, 0x0a, PCIndexSelect::ShaderEngineAndInstance}, // TD10 - {0x09, 0x0b, PCIndexSelect::ShaderEngineAndInstance}, // TD11 - {0x09, 0x0c, PCIndexSelect::ShaderEngineAndInstance}, // TD12 - {0x09, 0x0d, PCIndexSelect::ShaderEngineAndInstance}, // TD13 - {0x09, 0x0e, PCIndexSelect::ShaderEngineAndInstance}, // TD14 - {0x09, 0x0f, PCIndexSelect::ShaderEngineAndInstance}, // TD15 - {0x0A, 0, PCIndexSelect::ShaderEngineAndInstance}, // TCP0 - {0x0A, 1, PCIndexSelect::ShaderEngineAndInstance}, // TCP1 - {0x0A, 2, PCIndexSelect::ShaderEngineAndInstance}, // TCP2 - {0x0A, 3, PCIndexSelect::ShaderEngineAndInstance}, // TCP3 - {0x0A, 4, PCIndexSelect::ShaderEngineAndInstance}, // TCP4 - {0x0A, 5, PCIndexSelect::ShaderEngineAndInstance}, // TCP5 - {0x0A, 6, PCIndexSelect::ShaderEngineAndInstance}, // TCP6 - {0x0A, 7, PCIndexSelect::ShaderEngineAndInstance}, // TCP7 - {0x0A, 8, PCIndexSelect::ShaderEngineAndInstance}, // TCP8 - {0x0A, 9, PCIndexSelect::ShaderEngineAndInstance}, // TCP9 - {0x0A, 0x0a, PCIndexSelect::ShaderEngineAndInstance}, // TCP10 - {0x0A, 0x0b, PCIndexSelect::ShaderEngineAndInstance}, // TCP11 - {0x0A, 0x0c, PCIndexSelect::ShaderEngineAndInstance}, // TCP12 - {0x0A, 0x0d, PCIndexSelect::ShaderEngineAndInstance}, // TCP13 - {0x0A, 0x0e, PCIndexSelect::ShaderEngineAndInstance}, // TCP14 - {0x0A, 0x0f, PCIndexSelect::ShaderEngineAndInstance}, // TCP15 - {0x0F, 0, PCIndexSelect::Instance}, // GDS0 - {0x0F, 1, PCIndexSelect::Instance}, // GDS1 - {0x02, 0, PCIndexSelect::ShaderEngine}, // VGT - {0x01, 0, PCIndexSelect::ShaderEngine}, // IA - {0x15, 0, PCIndexSelect::None}, // MC - {0x10, 0, PCIndexSelect::None}, // SRBM - {0x18, 0, PCIndexSelect::None}, // WD - {0x16, 0, PCIndexSelect::Instance}, // CPG0 - {0x16, 1, PCIndexSelect::Instance}, // CPG1 - {0x17, 0, PCIndexSelect::Instance}, // CPC0 - {0x17, 1, PCIndexSelect::Instance}, // CPC1 + {0x0E, 0}, // CB0 + {0x0E, 1}, // CB1 + {0x0E, 2}, // CB2 + {0x0E, 3}, // CB3 + {0x00, 0}, // CPF0 + {0x00, 1}, // CPF1 + {0x0D, 0}, // DB0 + {0x0D, 1}, // DB1 + {0x0D, 2}, // DB2 + {0x0D, 3}, // DB3 + {0x11, 0}, // GRBM0 + {0x11, 1}, // GRBM1 + {0x12, 0}, // GRBMSE0 + {0x03, 0}, // PA_SU + {0x03, 0}, // PA_SC + {0x05, 0}, // SPI + {0x06, 0}, // SQ0 + {0x06, 1}, // SQ1 + {0x06, 0}, // SQ_ES + {0x06, 0}, // SQ_GS + {0x06, 0}, // SQ_VS + {0x06, 0}, // SQ_PS + {0x06, 0}, // SQ_LS + {0x06, 0}, // SQ_HS + {0x06, 0}, // SQ_CS0 + {0x06, 1}, // SQ_CS1 + {0x07, 0}, // SX + {0x08, 0}, // TA0 + {0x08, 1}, // TA1 + {0x08, 2}, // TA2 + {0x08, 3}, // TA3 + {0x08, 4}, // TA4 + {0x08, 5}, // TA5 + {0x08, 6}, // TA6 + {0x08, 7}, // TA7 + {0x08, 8}, // TA8 + {0x08, 9}, // TA9 + {0x08, 0x0a}, // TA10 + {0x08, 0x0b}, // TA11 + {0x08, 0x0c}, // TA12 + {0x08, 0x0d}, // TA13 + {0x08, 0x0e}, // TA14 + {0x08, 0x0f}, // TA15 + {0x0C, 0}, // TCA0 + {0x0C, 1}, // TCA1 + {0x0B, 0}, // TCC0 + {0x0B, 1}, // TCC1 + {0x0B, 2}, // TCC2 + {0x0B, 3}, // TCC3 + {0x0B, 4}, // TCC4 + {0x0B, 5}, // TCC5 + {0x0B, 6}, // TCC6 + {0x0B, 7}, // TCC7 + {0x0B, 8}, // TCC8 + {0x0B, 9}, // TCC9 + {0x0B, 0x0a}, // TCC10 + {0x0B, 0x0b}, // TCC11 + {0x0B, 0x0c}, // TCC12 + {0x0B, 0x0d}, // TCC13 + {0x0B, 0x0e}, // TCC14 + {0x0B, 0x0f}, // TCC15 + {0x09, 0}, // TD0 + {0x09, 1}, // TD1 + {0x09, 2}, // TD2 + {0x09, 3}, // TD3 + {0x09, 4}, // TD4 + {0x09, 5}, // TD5 + {0x09, 6}, // TD6 + {0x09, 7}, // TD7 + {0x09, 8}, // TD8 + {0x09, 9}, // TD9 + {0x09, 0x0a}, // TD10 + {0x09, 0x0b}, // TD11 + {0x09, 0x0c}, // TD12 + {0x09, 0x0d}, // TD13 + {0x09, 0x0e}, // TD14 + {0x09, 0x0f}, // TD15 + {0x0A, 0}, // TCP0 + {0x0A, 1}, // TCP1 + {0x0A, 2}, // TCP2 + {0x0A, 3}, // TCP3 + {0x0A, 4}, // TCP4 + {0x0A, 5}, // TCP5 + {0x0A, 6}, // TCP6 + {0x0A, 7}, // TCP7 + {0x0A, 8}, // TCP8 + {0x0A, 9}, // TCP9 + {0x0A, 0x0a}, // TCP10 + {0x0A, 0x0b}, // TCP11 + {0x0A, 0x0c}, // TCP12 + {0x0A, 0x0d}, // TCP13 + {0x0A, 0x0e}, // TCP14 + {0x0A, 0x0f}, // TCP15 + {0x0F, 0}, // GDS0 + {0x0F, 1}, // GDS1 + {0x02, 0}, // VGT + {0x01, 0}, // IA + {0x15, 0}, // MC + {0x10, 0}, // SRBM + {0x18, 0}, // WD + {0x16, 0}, // CPG0 + {0x16, 1}, // CPG1 + {0x17, 0}, // CPC0 + {0x17, 1}, // CPC1 }}; void PerfCounter::convertInfo() @@ -453,7 +485,6 @@ void PerfCounter::convertInfo() auto p = ciBlockIdOrcaToPal[info_.blockIndex_]; info_.blockIndex_ = std::get<0>(p); info_.counterIndex_ = std::get<1>(p); - info_.indexSelect_ = std::get<2>(p); } break; case Pal::GfxIpLevel::GfxIp8: @@ -461,7 +492,6 @@ void PerfCounter::convertInfo() auto p = viBlockIdOrcaToPal[info_.blockIndex_]; info_.blockIndex_ = std::get<0>(p); info_.counterIndex_ = std::get<1>(p); - info_.indexSelect_ = std::get<2>(p); } break; case Pal::GfxIpLevel::GfxIp9: @@ -469,13 +499,15 @@ void PerfCounter::convertInfo() auto p = gfx9BlockIdPal[info_.blockIndex_]; info_.blockIndex_ = std::get<0>(p); info_.counterIndex_ = std::get<1>(p); - info_.indexSelect_ = std::get<2>(p); } break; default: Unimplemented(); break; } + + assert(info_.blockIndex_ < blockIdToIndexSelect.size()); + info_.indexSelect_ = blockIdToIndexSelect.at(info_.blockIndex_); } PerfCounter::~PerfCounter()