diff --git a/projects/rocr-runtime/rocrtst/suites/test_common/CMakeLists.txt b/projects/rocr-runtime/rocrtst/suites/test_common/CMakeLists.txt index 523d80ab06..defb297549 100755 --- a/projects/rocr-runtime/rocrtst/suites/test_common/CMakeLists.txt +++ b/projects/rocr-runtime/rocrtst/suites/test_common/CMakeLists.txt @@ -54,7 +54,7 @@ set ( CPACK_DEBIAN_PACKAGE_HOMEPAGE "https://github.com/RadeonOpenCompute/ROCR-R set ( CPACK_PACKAGE_HOMEPAGE_URL "https://github.com/RadeonOpenCompute/ROCR-Runtime" ) -set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx1010;gfx1011;gfx1012;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034") +set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx1010;gfx1011;gfx1012;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035") # # Currently support for Windows platform is not present diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp index b7bf885e7f..639a13eade 100755 --- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp @@ -310,6 +310,7 @@ constexpr size_t hsa_name_size = 63; ISAREG_ENTRY_GEN("gfx1032", 10, 3, 2, unsupported, unsupported) ISAREG_ENTRY_GEN("gfx1033", 10, 3, 3, unsupported, unsupported) ISAREG_ENTRY_GEN("gfx1034", 10, 3, 4, unsupported, unsupported) + ISAREG_ENTRY_GEN("gfx1035", 10, 3, 5, unsupported, unsupported) #undef ISAREG_ENTRY_GEN return supported_isas; } diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.cpp index d63a0bc948..95f2b51c22 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_kernel.cpp @@ -93,6 +93,7 @@ extern uint8_t ocl_blit_object_gfx1031[]; extern uint8_t ocl_blit_object_gfx1032[]; extern uint8_t ocl_blit_object_gfx1033[]; extern uint8_t ocl_blit_object_gfx1034[]; +extern uint8_t ocl_blit_object_gfx1035[]; // Arguments inserted by OCL compiler, all zero here. struct OCLHiddenArgs { @@ -1016,6 +1017,8 @@ hsa_status_t BlitKernel::GetPatchedBlitObject(const char* agent_name, *blit_code_object = ocl_blit_object_gfx1033; } else if (sname == "gfx1034") { *blit_code_object = ocl_blit_object_gfx1034; + } else if (sname == "gfx1035") { + *blit_code_object = ocl_blit_object_gfx1035; } else { return HSA_STATUS_ERROR_INVALID_ISA_NAME; } diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/CMakeLists.txt b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/CMakeLists.txt index c2bee249d1..0e80b0251d 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/CMakeLists.txt +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/blit_src/CMakeLists.txt @@ -69,7 +69,7 @@ endif() # Determine the target devices if not specified if (NOT DEFINED TARGET_DEVICES) - set (TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx1010;gfx1011;gfx1012;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034") + set (TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx1010;gfx1011;gfx1012;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035") endif() set( TARGET_DEVICES ${TARGET_DEVICES} CACHE STRING "Build targets" FORCE ) diff --git a/projects/rocr-runtime/runtime/hsa-runtime/image/device_info.cpp b/projects/rocr-runtime/runtime/hsa-runtime/image/device_info.cpp index cc42e1504c..4d00c3d6d3 100755 --- a/projects/rocr-runtime/runtime/hsa-runtime/image/device_info.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/image/device_info.cpp @@ -186,6 +186,7 @@ uint32_t DevIDToAddrLibFamily(uint32_t dev_id) { case 2: case 3: case 4: + case 5: return FAMILY_NV; default: diff --git a/projects/rocr-runtime/runtime/hsa-runtime/inc/amd_hsa_elf.h b/projects/rocr-runtime/runtime/hsa-runtime/inc/amd_hsa_elf.h index 9d7f7e14d3..227773c9aa 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/inc/amd_hsa_elf.h +++ b/projects/rocr-runtime/runtime/hsa-runtime/inc/amd_hsa_elf.h @@ -115,7 +115,7 @@ enum : unsigned { EF_AMDGPU_MACH_AMDGCN_GFX602 = 0x03a, EF_AMDGPU_MACH_AMDGCN_GFX705 = 0x03b, EF_AMDGPU_MACH_AMDGCN_GFX805 = 0x03c, - EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3D = 0x03d, + EF_AMDGPU_MACH_AMDGCN_GFX1035 = 0x03d, EF_AMDGPU_MACH_AMDGCN_GFX1034 = 0x03e, EF_AMDGPU_MACH_AMDGCN_GFX90A = 0x03f, EF_AMDGPU_MACH_AMDGCN_RESERVED_0X40 = 0x040, diff --git a/projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp b/projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp index ed97ae2484..7ca8be13f6 100644 --- a/projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp +++ b/projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp @@ -578,6 +578,7 @@ namespace code { case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032: name = "gfx1032"; xnack_supported = false; sramecc_supported = false; break; case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1033: name = "gfx1033"; xnack_supported = false; sramecc_supported = false; break; case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1034: name = "gfx1034"; xnack_supported = false; sramecc_supported = false; break; + case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1035: name = "gfx1035"; xnack_supported = false; sramecc_supported = false; break; default: return false; } return true;