From ece8ee2430f30a41c4900587e437c24d44dc1f03 Mon Sep 17 00:00:00 2001 From: Lang Yu Date: Mon, 6 May 2024 13:06:18 +0800 Subject: [PATCH] libhsakmt: add Integrated property To differentiate discrete and integrated GPU more flexibly in runtime, this will aid in querying HSA_AMD_MEMORY_PROPERTY_AGENT_IS_APU and hipDeviceAttributeIntegrated. Change-Id: Ic8a6c9aea3b4bd19c4d5f6729af7e64c328fc61d Signed-off-by: Lang Yu Signed-off-by: Chris Freehill [ROCm/ROCR-Runtime commit: ae3ede062f60df5d67bdfde94cacee724f416ac1] --- projects/rocr-runtime/libhsakmt/include/hsakmt/hsakmttypes.h | 2 +- projects/rocr-runtime/libhsakmt/src/topology.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/projects/rocr-runtime/libhsakmt/include/hsakmt/hsakmttypes.h b/projects/rocr-runtime/libhsakmt/include/hsakmt/hsakmttypes.h index eebc14bf3d..ca8c2d709a 100644 --- a/projects/rocr-runtime/libhsakmt/include/hsakmt/hsakmttypes.h +++ b/projects/rocr-runtime/libhsakmt/include/hsakmt/hsakmttypes.h @@ -321,7 +321,7 @@ typedef struct _HsaNodeProperties HSAuint8 NumSdmaQueuesPerEngine;// number of SDMA queue per one engine HSAuint8 NumCpQueues; // number of Compute queues HSAuint8 NumGws; // number of GWS barriers - HSAuint8 Reserved2; + HSAuint8 Integrated; // 0 - discrete GPU, 1 - integrated GPU (including small APU and APP APU) HSAuint32 Domain; // PCI domain of the GPU HSAuint64 UniqueID; // Globally unique immutable id diff --git a/projects/rocr-runtime/libhsakmt/src/topology.c b/projects/rocr-runtime/libhsakmt/src/topology.c index 4738499fce..3ca3dd7497 100644 --- a/projects/rocr-runtime/libhsakmt/src/topology.c +++ b/projects/rocr-runtime/libhsakmt/src/topology.c @@ -1046,6 +1046,7 @@ static int topology_get_node_props_from_drm(HsaNodeProperties *props) } props->FamilyID = gpu_info.family_id; + props->Integrated = !!(gpu_info.ids_flags & AMDGPU_IDS_FLAGS_FUSION); err_query_gpu_info: amdgpu_device_deinitialize(device_handle);