From ee69220fb91f11635c2f543eb6c12f6962af417d Mon Sep 17 00:00:00 2001 From: German Andryeyev Date: Wed, 4 Aug 2021 23:42:49 -0400 Subject: [PATCH] SWDEV-295555 - Add SVM mode query The new query MemRangeAttribute::CoherencyMode can return current coherency mode for the provided memory region. Coherency mode can be one of the following types: FineGrain, CoarseGrain and Indeterminate Change-Id: Ib66feeeb14f57a8b1cc731c65bb3d0276d297ff7 [ROCm/clr commit: 992830bab76bd66e7a54c53a9be1aeafb1d85b94] --- projects/clr/rocclr/device/device.hpp | 1 + projects/clr/rocclr/device/rocm/rocdevice.cpp | 40 ++++++++++++++++++- 2 files changed, 40 insertions(+), 1 deletion(-) diff --git a/projects/clr/rocclr/device/device.hpp b/projects/clr/rocclr/device/device.hpp index 845b65df2e..e8975ea929 100644 --- a/projects/clr/rocclr/device/device.hpp +++ b/projects/clr/rocclr/device/device.hpp @@ -118,6 +118,7 @@ enum MemRangeAttribute : uint32_t { AccessedBy = 3, ///< Memory range has hipMemAdviseSetAccessedBy ///< set for specified device LastPrefetchLocation = 4, ///< The last location to which the range was prefetched + CoherencyMode = 100, ///< Current coherency mode for the specified range }; constexpr int CpuDeviceId = static_cast(-1); diff --git a/projects/clr/rocclr/device/rocm/rocdevice.cpp b/projects/clr/rocclr/device/rocm/rocdevice.cpp index c72e14c285..907f23361f 100644 --- a/projects/clr/rocclr/device/rocm/rocdevice.cpp +++ b/projects/clr/rocclr/device/rocm/rocdevice.cpp @@ -2334,6 +2334,29 @@ bool Device::GetSvmAttributes(void** data, size_t* data_sizes, int* attributes, return false; } } + + hsa_amd_pointer_info_t ptr_info = {}; + for (size_t i = 0; i < num_attributes; ++i) { + if (attributes[i] == amd::MemRangeAttribute::CoherencyMode) { + ptr_info.size = sizeof(hsa_amd_pointer_info_t); + // Query ptr type to see if it's a HMM allocation + hsa_status_t status = hsa_amd_pointer_info( + const_cast(dev_ptr), &ptr_info, nullptr, nullptr, nullptr); + // The call shoudl never fail in ROCR, but just check for an error and continue + if (status != HSA_STATUS_SUCCESS) { + LogError("hsa_amd_pointer_info() failed"); + } + // Check if it's a legacy non-HMM allocation and update query + if (ptr_info.type != HSA_EXT_POINTER_TYPE_UNKNOWN) { + if (ptr_info.global_flags & HSA_AMD_MEMORY_POOL_GLOBAL_FLAG_COARSE_GRAINED) { + *reinterpret_cast(data[i]) = HSA_AMD_SVM_GLOBAL_FLAG_COARSE_GRAINED; + } else if (ptr_info.global_flags & HSA_AMD_MEMORY_POOL_GLOBAL_FLAG_FINE_GRAINED) { + *reinterpret_cast(data[i]) = HSA_AMD_SVM_GLOBAL_FLAG_FINE_GRAINED; + } + } + } + } + if (info().hmmSupported_) { uint32_t accessed_by = 0; std::vector attr; @@ -2361,6 +2384,11 @@ bool Device::GetSvmAttributes(void** data, size_t* data_sizes, int* attributes, case amd::MemRangeAttribute::LastPrefetchLocation: attr.push_back({HSA_AMD_SVM_ATTRIB_PREFETCH_LOCATION, 0}); break; + case amd::MemRangeAttribute::CoherencyMode: + if (ptr_info.type == HSA_EXT_POINTER_TYPE_UNKNOWN) { + attr.push_back({HSA_AMD_SVM_ATTRIB_GLOBAL_FLAG, 0}); + } + break; default: return false; break; @@ -2455,6 +2483,16 @@ bool Device::GetSvmAttributes(void** data, size_t* data_sizes, int* attributes, } break; } + case amd::MemRangeAttribute::CoherencyMode: + if (data_sizes[idx] != sizeof(uint32_t)) { + return false; + } + // if ptr is HMM alloc then overwrite the values + if (ptr_info.type == HSA_EXT_POINTER_TYPE_UNKNOWN) { + // Cast ROCr value into the hip format + *reinterpret_cast(data[idx]) = static_cast(it.value); + } + break; default: return false; break; @@ -2462,7 +2500,7 @@ bool Device::GetSvmAttributes(void** data, size_t* data_sizes, int* attributes, // Find the next location in the query ++idx; } - } else { + } else if (ptr_info.type == HSA_EXT_POINTER_TYPE_UNKNOWN) { LogError("GetSvmAttributes() failed, because no HMM support"); return false; }