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libhsakmt: Add more debug information

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We need to add some more information about the debug features supported
by the platform.  We are adding the following:
        - debug supported
        - dispatch info always valid
        - precise memop supported
        - watchpoints shared

Change-Id: I68deed98619396d17e28c6e18bad424b58297485
Signed-off-by: Philip Cox <Philip.Cox@amd.com>


[ROCm/ROCR-Runtime commit: 489db9fac6]
This commit is contained in:
Philip Cox
2021-09-20 13:14:21 -04:00
parent 77a4f81410
commit eef3f372f2
1 changed files with 16 additions and 4 deletions
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projects/rocr-runtime/include/hsakmttypes.h
+16 -4
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@@ -216,7 +216,8 @@ typedef union
unsigned int SRAM_EDCSupport: 1; // Indicates if GFX internal SRAM EDC/ECC functionality is active unsigned int SRAM_EDCSupport: 1; // Indicates if GFX internal SRAM EDC/ECC functionality is active
unsigned int SVMAPISupported : 1; // Whether or not the SVM API is supported unsigned int SVMAPISupported : 1; // Whether or not the SVM API is supported
unsigned int CoherentHostAccess: 1; // Whether or not device memory can be coherently accessed by the host CPU unsigned int CoherentHostAccess: 1; // Whether or not device memory can be coherently accessed by the host CPU
unsigned int Reserved : 3; unsigned int DebugSupportedFirmware : 1;
unsigned int Reserved : 2;
} ui32; } ui32;
} HSA_CAPABILITY; } HSA_CAPABILITY;
@@ -232,9 +233,20 @@ typedef union
// of the // of the
HSAuint64 WatchAddrMaskHiBit: 6; // watch address mask are used. HSAuint64 WatchAddrMaskHiBit: 6; // watch address mask are used.
// 0 is the least significant bit. // 0 is the least significant bit.
HSAuint64 TrapDataCount: 4; // Number of 32 bit TrapData HSAuint64 DispatchInfoAlwaysValid: 1; // 0 if control of TTMP setup is
// registers supported. // controlled on a per process
HSAuint64 Reserved: 50; // // basis and is not always enabled
// 1 if TTMP setup is always
// enabled
HSAuint64 AddressWatchpointShareKind: 1; // whether the address watchpoint
// is per process or shared with
// all proccesses
// 0 if shared or unsuppoted
// (unsupported indicated by
// address_watchpoint_count == 0)
// All current devices have shared watchpoints
// 1 if unshared
HSAuint64 Reserved: 52; //
}; };
} HSA_DEBUG_PROPERTIES; } HSA_DEBUG_PROPERTIES;