From efe478aed6a240ace826f6bd7e92ecddfb12b860 Mon Sep 17 00:00:00 2001 From: Joseph Greathouse Date: Fri, 22 May 2020 10:39:13 -0500 Subject: [PATCH] Pull out ASIC revision from HSA capability KFD now passes the ASIC revision to user level through some bits in the HSA topology's capability field. Some user-level software wants this because different ASIC revisions may require user-level software to do different things (e.g. patch code for things that are changed in later hardware revisions). Change-Id: I16f2a15ae0875edd01ebdb1f1685ec7865f7049e [ROCm/ROCR-Runtime commit: 5ddd8fb68bdade59e5b49602a224a540f981e220] --- projects/rocr-runtime/include/hsakmttypes.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/projects/rocr-runtime/include/hsakmttypes.h b/projects/rocr-runtime/include/hsakmttypes.h index 9abf4963c5..7a7dc2ad10 100644 --- a/projects/rocr-runtime/include/hsakmttypes.h +++ b/projects/rocr-runtime/include/hsakmttypes.h @@ -212,7 +212,8 @@ typedef union unsigned int SRAM_EDCSupport: 1; // Indicates if GFX internal SRAM EDC/ECC functionality is active unsigned int Mem_EDCSupoort: 1; // Indicates if GFX internal DRAM/HBM EDC/ECC functionality is active unsigned int RASEventNotify: 1; // Indicates if GFX extended RASFeatures and RAS EventNotify status is available - unsigned int Reserved : 10; + unsigned int ASICRevision: 4; // Indicates the ASIC revision of the chip on this node. + unsigned int Reserved : 6; } ui32; } HSA_CAPABILITY;