From f2023220fd9b9f4b9e09310179fd9c156cae94de Mon Sep 17 00:00:00 2001
From: Chris Freehill <Chris.Freehill@amd.com>
Date: Tue, 27 Aug 2019 14:16:43 -0500
Subject: [PATCH] Initial support for gfx1010, gfx1011, gfx1012

Change-Id: I9ec398070c85db08aea72947557c6e1b5f7d541d


[ROCm/ROCR-Runtime commit: 6ebdad5896615f492a3be341c7af91c60c6c9355]
---
 .../runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp   | 2 +-
 .../runtime/hsa-runtime/core/runtime/isa.cpp             | 3 +++
 .../runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp   | 2 ++
 .../rocr-runtime/runtime/hsa-runtime/loader/loaders.cpp  | 9 +++++++++
 .../rocr-runtime/runtime/hsa-runtime/loader/loaders.hpp  | 1 +
 5 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp
index 3a8e68641f..c3f284b086 100644
--- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp
+++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp
@@ -948,7 +948,7 @@ void AqlQueue::ExecutePM4(uint32_t* cmd_data, size_t cmd_size_b) {
     rel_mem[4] = 0;
     rel_mem[5] = 0;
     rel_mem[6] = 0;
-  } else if (agent_->isa()->GetMajorVersion() == 9) {
+  } else if (agent_->isa()->GetMajorVersion() >= 9) {
     // Construct an AQL packet to jump to the PM4 IB.
     struct amd_aql_pm4_ib {
       uint16_t header;
diff --git a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp
index 77631a8fee..2fa7d28722 100755
--- a/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp
+++ b/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp
@@ -218,6 +218,9 @@ const IsaRegistry::IsaMap IsaRegistry::GetSupportedIsas() {
   ISAREG_ENTRY_GEN(9, 0, 6, false, true )
   ISAREG_ENTRY_GEN(9, 0, 8, false, true )
   ISAREG_ENTRY_GEN(9, 0, 8, false, false)
+  ISAREG_ENTRY_GEN(10, 1, 0, false, false)
+  ISAREG_ENTRY_GEN(10, 1, 1, false, false)
+  ISAREG_ENTRY_GEN(10, 1, 2, false, false)
 
   return supported_isas;
 }
diff --git a/projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp b/projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp
index 8bec5b2d56..ccfab36460 100644
--- a/projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp
+++ b/projects/rocr-runtime/runtime/hsa-runtime/libamdhsacode/amd_hsa_code.cpp
@@ -1348,6 +1348,8 @@ namespace code {
           asic = "VI";
         } else if (major_version == 9) {
           asic = "GFX9";
+        } else if (major_version == 10) {
+          asic = "GFX10";
         } else {
           assert(!"unknown compute capability");
         }
diff --git a/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.cpp b/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.cpp
index 439d8930d9..5c72664d51 100644
--- a/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.cpp
+++ b/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.cpp
@@ -92,6 +92,9 @@ namespace loader {
     gfx902.handle = 902;
     gfx903.handle = 903;
     gfx908.handle = 908;
+    gfx1010.handle = 1010;
+    gfx1011.handle = 1011;
+    gfx1012.handle = 1012;
   }
 
   hsa_isa_t OfflineLoaderContext::IsaFromName(const char *name)
@@ -123,6 +126,12 @@ namespace loader {
       return gfx903;
     } else if (sname == "AMD:AMDGPU:9:0:8") {
       return gfx908;
+    } else if (sname == "AMD:AMDGPU:10:1:0") {
+      return gfx1010;
+    } else if (sname == "AMD:AMDGPU:10:1:1") {
+      return gfx1011;
+    } else if (sname == "AMD:AMDGPU:10:1:2") {
+      return gfx1012;
     }
 
     assert(0);
diff --git a/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.hpp b/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.hpp
index dc8addd23c..a16eac078e 100644
--- a/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.hpp
+++ b/projects/rocr-runtime/runtime/hsa-runtime/loader/loaders.hpp
@@ -56,6 +56,7 @@ namespace loader {
     hsa_isa_t invalid;
     hsa_isa_t gfx700, gfx701, gfx800, gfx801, gfx802, gfx803, gfx804, gfx810;
     hsa_isa_t gfx900, gfx901, gfx902, gfx903, gfx908;
+    hsa_isa_t gfx1010, gfx1011, gfx1012;
     std::ostream& out;
     typedef std::set<void*> PointerSet;
     PointerSet pointers;