diff --git a/CMakeLists.txt b/CMakeLists.txt index 234f8f37c2..93fc1e42c1 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -191,7 +191,7 @@ set(PYTEST_NUMPROCS CACHE STRING "Number of parallel threads to use with CPU-oriented tests") message(STATUS "Pytest CPU threadcount: ${PYTEST_NUMPROCS}") -#2 CPU threads available for testing(test-analyze-commands) +# 2 CPU threads available for testing(test-analyze-commands) set(PYTEST_NUMPROCS_ANALYSIS "4" CACHE STRING "Number of parallel threads to use with CPU-oriented tests") @@ -275,8 +275,8 @@ set_tests_properties( add_test( NAME test_analyze_commands COMMAND - ${Python3_EXECUTABLE} -m pytest -n ${PYTEST_NUMPROCS_ANALYSIS} - --verbose --junitxml=tests/test_analyze_commands.xml ${COV_OPTION} + ${Python3_EXECUTABLE} -m pytest -n ${PYTEST_NUMPROCS_ANALYSIS} --verbose + --junitxml=tests/test_analyze_commands.xml ${COV_OPTION} ${PROJECT_SOURCE_DIR}/tests/test_analyze_commands.py WORKING_DIRECTORY ${PROJECT_SOURCE_DIR}) diff --git a/docs/conceptual/pipeline-metrics.rst b/docs/conceptual/pipeline-metrics.rst index 66a791ae8d..7c37ee846a 100644 --- a/docs/conceptual/pipeline-metrics.rst +++ b/docs/conceptual/pipeline-metrics.rst @@ -519,6 +519,13 @@ MFMA instructions are classified by the type of input data they operate on, and - Instructions per :ref:`normalization unit ` + * - MFMA-F8 Instructions + + - The total number of 8-bit floating point :ref:`MFMA ` + instructions issued per :ref:`normalization unit `. This is supported in AMD Instinct MI300 series and later only. + + - Instructions per :ref:`normalization unit ` + * - MFMA-F16 Instructions - The total number of 16-bit floating point :ref:`MFMA ` diff --git a/docs/conceptual/system-speed-of-light.rst b/docs/conceptual/system-speed-of-light.rst index e93392da7e..5652a5e3f9 100644 --- a/docs/conceptual/system-speed-of-light.rst +++ b/docs/conceptual/system-speed-of-light.rst @@ -49,6 +49,16 @@ of ROCm Compute Profiler’s profiling report. - GIOPs + * - :ref:`MFMA ` FLOPs (F8) + + - The total number of 8-bit floating point :ref:`MFMA ` + operations executed per second. This does not include any 16-bit + brain floating point operations from :ref:`VALU ` + instructions. This is also presented as a percent of the peak theoretical + F8 MFMA operations achievable on the specific accelerator. It is supported on AMD Instinct MI300 series and later only. + + - GFLOPs + * - :ref:`MFMA ` FLOPs (BF16) - The total number of 16-bit brain floating point :ref:`MFMA `