initial commit

[ROCm/clr commit: 3694ab2ce8]
This commit is contained in:
foreman
2014-07-04 16:17:05 -04:00
parent b0b5b33fcf
commit f80f2f233c
351 changed files with 113713 additions and 1 deletions
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//
// Copyright (c) 2012 Advanced Micro Devices, Inc. All rights reserved.
//
#ifndef _CL_UTILS_BIF_SECTION_LABELS_HPP_
#define _CL_UTILS_BIF_SECTION_LABELS_HPP_
#ifdef __cplusplus
extern "C" {
#endif
#define PRE 0
#define POST 1
typedef enum {
symOpenclCompilerOptions,
symAMDILCompilerOptions,
symHSACompilerOptions,
symOpenclLinkerOptions,
symOpenclMeta,
symOpenclKernel,
symOpenclStub,
symOpenclGlobal,
symISAMeta,
symISABinary,
symAMDILText,
symAMDILBinary,
symHSAILText,
symHSABinary,
symAMDILFMeta,
symISAText,
symBRIGOperands,
symBRIGDirectives,
symBRIGStrtab,
symX86Barrier,
symAMDILHeader,
symDebugInfo,
symDebugilText,
symDebugilBinary,
symAsmText,
symDLL,
symLast
} oclBIFSymbolID;
struct oclBIFSymbolStruct {
oclBIFSymbolID id;
// pre/post fix of the symbol string
const char* str[2];
// the BIF section that the symbol is stored for GPU/CPU
aclSections sections[2];
};
// These are the symbols that are defined by the BIF 3.0 spec
static const oclBIFSymbolStruct BIF30[26] =
{
// 0: BIF 3.0 compiler options, .comment section via library support.
{symOpenclCompilerOptions,
{ "__OpenCL_", "compiler_options" }, {aclCOMMENT, aclCOMMENT}},
// 1: BIF 3.0 AMDIL compile options, .comment section via -fbin-amdil.
{symAMDILCompilerOptions,
{ "__AMDIL_", "_compiler_options" }, {aclCOMMENT, aclLAST}},
// 2: BIF 3.0 HSAIL compile options, .comment section via -fbin-hsail.
{symHSACompilerOptions,
{ "__HSAIL_", "_compiler_options" }, {aclCOMMENT, aclLAST}},
// 3: BIF 3.0 linker options, .comment section via library support.
{symOpenclLinkerOptions,
{ "__OpenCL_", "linker_options" }, {aclCOMMENT, aclCOMMENT}},
// 4: BIF 3.0 per kernel metadata, .cg section via -fbin-cg for CPU,
// .rodata section via -fbin-exe for GPU
{symOpenclMeta, { "__OpenCL_", "_metadata" }, {aclRODATA, aclCODEGEN}},
// 5: BIF 3.0 per kernel text(x86 only), .cg section via -fbin-cg.
{symOpenclKernel, { "__OpenCL_", "_kernel" }, {aclLAST, aclCODEGEN}},
// 6: BIF 3.0 per kernel stub(x86 only), .cg section via -fbin-cg.
{symOpenclStub, { "__OpenCL_", "_stub" }, {aclLAST, aclCODEGEN}},
// 7: BIF 3.0 per constant buffer data, .rodata section via -fbin-exe.
{symOpenclGlobal, { "__OpenCL_", "_global" }, {aclRODATA, aclRODATA}},
// 8: BIF 3.0 per kernel ISA metadata, .rodata section via -fbin-exe.
{symISAMeta, { "__ISA_", "_metadata" }, {aclRODATA, aclLAST}},
// 9: BIF 3.0 per kernel ISA, .text section via -fbin-exe.
{symISABinary, { "__ISA_", "_binary" }, {aclTEXT, aclLAST}},
// 10: BIF 3.0 per kernel AMDIL source, .internal section via -fbin-amdil.
{symAMDILText, { "__AMDIL_", "_text" }, {aclINTERNAL, aclLAST}},
// 11: BIF 3.0 per kernel AMDIL binary, .internal section via -fbin-amdil.
{symAMDILBinary, { "__AMDIL_", "_binary" }, {aclINTERNAL, aclLAST}},
// 12: BIF 3.0 per kernel HSAIL source, .internal section via -fbin-hsail.
{symHSAILText, { "__HSAIL_", "_text" }, {aclCODEGEN, aclLAST}},
// 13: BIF 3.0 per kernel HSAIL binary, .internal section via -fbin-hsail.
{symHSABinary, { "__BRIG__code", "" }, {aclBRIGcode, aclLAST}},
// 14: BIF 3.0 per function metadata, .internal section via -fbin-amdil.
{symAMDILFMeta, { "__AMDIL_", "_fmetadata" }, {aclINTERNAL, aclLAST}},
// 15: BIF 3.0 per kernel ISA text, .internal section via disassembly.
{symISAText, { "__ISA_", "_text" }, {aclINTERNAL, aclLAST}},
// 16: BIF 3.0 BRIG operands declarations, .brig section via -fbin-brig.
{symBRIGOperands, { "__BRIG__operands","" }, {aclBRIGoprs, aclLAST}},
// 17: BIF 3.0 BRIG directives declarations, .brig section via -fbin-brig.
{symBRIGDirectives, { "__BRIG__directives","" }, {aclBRIGdirs, aclLAST}},
// 18: BIF 3.0 BRIG strtab declarations, .brig section via -fbin-brig.
{symBRIGStrtab, { "__BRIG__strtab","" }, {aclBRIGstrs, aclLAST}},
// 19: BIF 3.0 per kernel barrier metadata, only valid for X86.
{symX86Barrier, { "__X86_", "_barrier" }, {aclLAST, aclLAST}},
// 20: BIF 3.0 per kernel header, .internal section via -fbin-amdil.(Legacy from bif2.x)
{symAMDILHeader, { "__AMDIL_", "_header"}, {aclINTERNAL, aclLAST}},
// 21: BIF 3.0 HSA BRIG or ISA debug info
{symDebugInfo, { "__debug_brig__","__debug_isa__"}, {aclHSADEBUG, aclLAST}},
// 22: BIF 3.0 debugil text, .internal section via -g
{symDebugilText, { "__debugil_text", "" }, {aclINTERNAL, aclLAST}},
// 23: BIF 3.0 debugil binary, .internal section, can be converted from
// __debugil_text
{symDebugilBinary, { "__debugil_binary", "" }, {aclINTERNAL, aclLAST}},
{symAsmText, {"", ""}, {aclLAST, aclCODEGEN}},
{symDLL, {"", ""}, {aclLAST, aclTEXT}},
}; // BIF30
// These are the sections that are defined by the BIF 2.0 spec
static const oclBIFSymbolStruct BIF20[13] =
{
{symOpenclCompilerOptions,
{ "__OpenCL_compile_options", "" }, {aclCOMMENT, aclCOMMENT}},
{symOpenclLinkerOptions,
{ "__OpenCL_linker_options", "" }, {aclCOMMENT, aclCOMMENT}},
{symOpenclKernel, { "__OpenCL_", "_kernel" }, {aclLAST, aclDLL}},
{symISABinary, { "__OpenCL_", "_kernel" }, {aclCAL, aclLAST}},
{symOpenclMeta, { "__OpenCL_", "_metadata" }, {aclRODATA, aclDLL}},
{symAMDILHeader, { "__OpenCL_", "_header" }, {aclRODATA, aclLAST}},
{symOpenclGlobal, { "__OpenCL_", "_global" }, {aclRODATA, aclLAST}},
{symAMDILText, { "__OpenCL_", "_amdil" }, {aclILTEXT, aclLAST}},
{symAMDILFMeta, { "__OpenCL_", "_fmetadata" }, {aclRODATA, aclLAST}},
{symOpenclStub, { "__OpenCL_", "_stub" }, {aclLAST, aclDLL}},
{symDebugilText, {"", ""}, {aclILDEBUG, aclLAST}},
{symAsmText, {"", ""}, {aclLAST, aclASTEXT}},
{symDLL, {"", ""}, {aclLAST, aclDLL}},
}; // BIF20
inline const oclBIFSymbolStruct* findBIFSymbolStruct(
const oclBIFSymbolStruct* symbols, size_t nSymbols, oclBIFSymbolID id)
{
for (size_t i = 0; i < nSymbols; ++i) {
if (id == symbols[i].id) {
return &symbols[i];
}
}
return NULL;
}
inline const oclBIFSymbolStruct* findBIF30SymStruct(oclBIFSymbolID id)
{
size_t nBIF30Symbol = sizeof(BIF30)/sizeof(oclBIFSymbolStruct);
return findBIFSymbolStruct(BIF30, nBIF30Symbol, id);
}
#ifdef __cplusplus
}
#endif
#endif // _CL_UTILS_BIF_SECTION_LABELS_HPP_
@@ -0,0 +1,17 @@
//
// Copyright (c) 2011 Advanced Micro Devices, Inc. All rights reserved.
//
// This is a compatibility header file. Either define the version
// of the compiler library to use or include the version specific
// header file directly.
#ifndef _CL_LIB_UTILS_H_
#define _CL_LIB_UTILS_H_
#if WITH_VERSION_0_8
#include "v0_8/libUtils.h"
#elif WITH_VERSION_0_9
#include "v0_9/libUtils.h"
#else
#error "The compiler library version was not defined."
#include "v0_8/libUtils.h"
#endif
#endif // _CL_LIB_UTILS_H_
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//
// Copyright (c) 2009 Advanced Micro Devices, Inc. All rights reserved.
//
#ifndef _UTILS_OPTIONS_HPP_
#define _UTILS_OPTIONS_HPP_
#include <string>
#include <vector>
#include <cstdio>
#include "top.hpp"
#include "library.hpp"
#include <cassert>
#include <sstream>
#ifdef __linux__
#include <unistd.h>
#endif
#ifdef _WIN32
#include <cstdio>
#endif
namespace amd {
class Device;
namespace option {
// Option Type : Info[0:5]
enum OptionType {
OT_BOOL,
OT_INT32,
OT_UINT32,
OT_CSTRING,
OT_MASK = 0x3f
};
/*
Option's Attributes : Info[6:31]
OxA_<sth> : Only one in each group is required.
OA_<sth> : Each one is independent, all OA_<sth> can be OR'ed together.
*/
// Option Value Attributes
enum OptionValue {
OVA_OPTIONAL = 0x00, // value is optional
OVA_REQUIRED = 0x40, // value is required to appear;
OVA_DISALLOWED = 0x80, // value may not be specified.
OVA_MASK = 0xC0
};
// Option Form Attributes
enum OptionForm {
OFA_NORMAL = 0x000, // normal form, no prefix
OFA_PREFIX_F = 0x100, // -f<flag>, machine-independent
OFA_PREFIX_M = 0x200, // -m<flag>, machine-dependent
OFA_PREFIX_W = 0x300, // -W<flag>, warning (TODO)
OFA_MASK = 0x300
};
// Option Group, at least one must be used.
enum OptionGroup {
OA_RUNTIME = 0x400,
OA_CLC = 0x800,
OA_LINK_EXE = 0x1000,
OA_LINK_LIB = 0x2000
};
// Option Value Separator, at least one must be used.
enum OptionValueSeparator {
OA_SEPARATOR_NONE = 0x4000,
OA_SEPARATOR_EQUAL = 0x8000,
OA_SEPARATOR_SPACE = 0x10000
};
// Option visibility : at least one must be used.
enum OptionVisibility {
OVIS_PUBLIC = 0x00000, // ducumented
OVIS_SUPPORT = 0x20000, // supported, but undocumented
OVIS_INTERNAL = 0x40000, // internal-only, not available in product release
OVIS_MASK = 0x60000
};
// Option other attributes : optional
enum OptionMisc {
OA_MISC_ALIAS = 0x80000 // An alias option is one that refers to another option or options
// and its meaning is hard-coded in setAliasOptionVariable().
};
typedef bool OT_BOOL_t;
typedef int32_t OT_INT32_t;
typedef uint32_t OT_UINT32_t;
typedef const char* OT_CSTRING_t;
// This must be a POD
struct OptionDescriptor {
const char* NameShort; // short option starts with -
const char* NameLong; // long option starts with --
uint32_t Info; // defined by above enums
uint32_t OptionOffset; // member offset to OptionVariable
int64_t DefaultVal; // default value for option of non-string type
int64_t ValMin; // (ValMin, ValMax) is the option's Value range
int64_t ValMax; // for option of non-string type
const char* DefaultString; // default value for string.
const char* Description; // Short Description for this option. -h will show this.
};
#define OPTION_sname(o) ((o)->NameShort)
#define OPTION_lname(o) ((o)->NameLong)
#define OPTION_type(o) ((o)->Info & OT_MASK)
#define OPTION_value(o) ((o)->Info & OVA_MASK)
#define OPTION_form(o) ((o)->Info & OFA_MASK)
#define OPTION_vis(o) ((o)->Info & OVIS_MASK)
#define OPTION_info(o) ((o)->Info)
#define OPTION_offset(o) ((o)->OptionOffset)
#define OPTION_default(o) ((o)->DefaultVal)
#define OPTION_min(o) ((o)->ValMin)
#define OPTION_max(o) ((o)->ValMax)
#define OPTION_defaultstr(o) ((o)->DefaultString)
#define OPTION_desc(o) ((o)->Description)
// OptionVariables must be a POD
struct OptionVariables {
#define OPTION(type, a, sn, ln, var, ideft, imin, imax, sdeft, desc) type##_t var ;
#define NOPTION(type, a, sn, ln, var, ideft, imin, imax, sdeft, desc)
#define FLAG(type, a, sn, var, deft, desc) type##_t var ;
#include "OPTIONS.def"
#undef OPTION
#undef NOPTION
#undef FLAG
};
#define OPTION_valueSeparator(c) (((c) == ' ') || ((c) == '='))
#define OFFSET(var) ((uint32_t)&(((OptionVariable *)0)->var))
enum OptionIdentifier {
#define OPTION(type, a, sn, ln, var, ideft, imin, imax, sdeft, desc) OID_##var ,
#define NOPTION(type, a, sn, ln, var, ideft, imin, imax, sdeft, desc) OID_##var ,
#define FLAG(type, a, sn, var, deft, desc) OID_##var,
#include "OPTIONS.def"
OID_LAST
#undef OPTION
#undef NOPTION
#undef FLAG
};
// Only option that is a RUNTIME option and is not an alias option has an entry in OptionVariables
#define OPTIONHasOVariable(od) \
((OPTION_info(od) & (OA_RUNTIME | OA_MISC_ALIAS)) == OA_RUNTIME)
// DumpFlags defines the values for oVariables->DumpFlags
enum DumpFlags {
DUMP_NONE = 0x00000000, // default
DUMP_CL = 0x00000001, // CL source
DUMP_I = 0x00000002, // pre-processed CL source
DUMP_S = 0x00000004, // x86 assembly text
DUMP_O = 0x00000008, // x86 object
DUMP_DLL = 0x00000010, // x86 DLL (.so)
DUMP_IL = 0x00000020, // per-kernel IL (GPU)
DUMP_ISA = 0x00000040, // per-kernel assembly text (GPU)
DUMP_BIF = 0x00000080, // binary for all kernels (GPU)
DUMP_BC_ORIGINAL = 0x00000100, // input bitcode (generated by clc)
DUMP_BC_LINKED = 0x00000200, // bitcode after linking and before optimization
DUMP_BC_OPTIMIZED = 0x00000400, // bitcode after optimization (llvm opt's output)
DUMP_CGIL = 0x00000800, // output il generated by Codegen (llvm llc's output)
DUMP_DEBUGIL = 0x00001000, // debug il (from MDParser, dwarf refers to)
// For a binary is encrypted, can only dump the following
DUMP_ENCRYPT = (DUMP_DLL | DUMP_BIF),
// For a release product, can only dump the following
DUMP_PRODUCT_FLAGS = (DUMP_CL | DUMP_I | DUMP_S | DUMP_O | DUMP_DLL |
DUMP_IL |DUMP_CGIL | DUMP_DEBUGIL |
DUMP_ISA | DUMP_BIF),
DUMP_ALL = 0x00001FFF // Everything
};
enum OptLevelFlags {
OPT_O0 = 0, // No optimization setting.
OPT_O1 = 1,
OPT_O2 = 2,
OPT_O3 = 3,
OPT_O4 = 4,
OPT_OS = 5,
OPT_Error = 6, // Invalid optimization set
/** Canary Value that guards against enum changes
* @warning This value cannot be changed without updating the appropriate
* tests and should NEVER be decreased.
*/
optLast = 7
};
class Options {
public:
std::string origOptionStr;
OptionVariables *oVariables; // pointer to a struct of all option variables
std::string clcOptions; // options passed into EDG frontend (clc)
std::vector<std::string> clangOptions; // Options passed into Clang frontend.
std::string llvmOptions; // options passed into backend (llvm)
// Given as build option
int WorkGroupSize[3]; // -1: use default
int NumAvailGPRs;
unsigned kernelArgAlign;
Options ();
~Options ();
bool isDumpFlagSet(DumpFlags f) {
return ((oVariables->DumpFlags) & f) && dumpEncrypt(f);
}
// Definition of each entry in flags
// Note: this is 1-bit entry now, it may need to be expanded to
// more than 1 bit later.
enum {
FLAG_UNSEEN = 0,
FLAG_SEEN = 1
};
void setFlag(int option_ndx, uint32_t v) {
int r = option_ndx/32;
int c = option_ndx%32;
uint32_t *p = &flags[r];
uint32_t b = (1 << c);
v = (v << c);
*p = ((*p) & (~b)) | v;
}
uint32_t getFlag(int option_ndx) const {
int r = option_ndx/32;
int c = option_ndx%32;
const uint32_t *p = &flags[r];
uint32_t b = (1 << c);
return 1 & ((*p) >> c);
}
bool isOptionSeen(int option_ndx) const {
return (getFlag(option_ndx) == FLAG_SEEN);
}
int getLLVMArgc() { return llvmargc; }
char** getLLVMArgv() { return llvmargv; }
void setLLVMArgs (int argc, char** argv) {
llvmargc = argc;
llvmargv = argv;
}
void recordMemoryHandle(char* handle) {
MemoryHandles.push_back(handle);
}
// Do post-parse processing After parsing all options,
void postParseInit();
void setBuildNo(unsigned int bnum) { buildNo = bnum; }
unsigned int getBuildNo() const { return buildNo; }
void setCurrKernelName(const char* name) { currKernelName = name; }
const char* getCurrKernelName() const { return currKernelName; }
std::string getDumpFileName(const std::string& ext);
void setPerBuildInfo(const char* val, int encrypt, bool device);
bool isCStrEqual(const char *cs1, const char* cs2);
bool useDefaultWGS() { return UseDefaultWGS; }
void setDefaultWGS(bool V) { UseDefaultWGS = V; }
std::string& optionsLog() { return OptionsLog; }
// Returns whether this set of options equals to another set of options
bool equals(const Options& other, bool ignoreClcOptions=false) const;
// Set the option variables same as defined in "other"
bool setOptionVariablesAs(const Options& other);
private:
std::string fullPath, baseName;
long basename_max;
std::string OptionsLog;
// One bit for each flag.
const int flagsSize;
uint32_t flags[(OID_LAST + 31)/32];
int llvmargc;
char** llvmargv;
// buildNo is a unique number for each device build, save it here so that
// dumping can use it in its file names.
//
// Note that buildNo, dumpFileRoot, and encryptCode are valid only during the lifetime
// of a device build.
unsigned int buildNo;
std::string dumpFileRoot;
const char* currKernelName;
int encryptCode;
std::vector<char*> MemoryHandles;
bool UseDefaultWGS;
bool dumpEncrypt(DumpFlags f) {
return ((encryptCode == 0) || // return true if not encrypted
(f & DUMP_ENCRYPT));
}
void setDumpFileName(const char* val);
public:
LibrarySelector libraryType_;
std::string sourceFileName_;
};
OptionDescriptor* getOptDescTable();
bool init();
bool teardown();
bool parseAllOptions(std::string& options, Options& Opts,
bool linkOptsOnly=false);
inline bool parseLinkOptions(std::string& options, Options& Opts) {
return parseAllOptions(options, Opts, true/*linkOptsOnly*/);
}
} // option
} // amd
#endif // _UTILS_OPTIONS_HPP_
@@ -0,0 +1,40 @@
//
// Copyright (c) 2011 Advanced Micro Devices, Inc. All rights reserved.
//
// This is a compatibility header file. Either define the version
// of the compiler library to use or include the version specific
// header file directly.
#ifndef TARGET_MAPPINGS_H_
#define TARGET_MAPPINGS_H_
#if WITH_VERSION_0_8
#include "v0_8/target_mappings.h"
#define X86TargetMapping X86TargetMapping_0_8
#define X64TargetMapping X64TargetMapping_0_8
#define AMDILTargetMapping AMDILTargetMapping_0_8
#define HSAILTargetMapping HSAILTargetMapping_0_8
#define AMDIL64TargetMapping AMDIL64TargetMapping_0_8
#define HSAIL64TargetMapping HSAIL64TargetMapping_0_8
#elif WITH_VERSION_0_9
#include "v0_9/target_mappings.h"
#define X86TargetMapping X86TargetMapping_0_9
#define X64TargetMapping X64TargetMapping_0_9
#define AMDILTargetMapping AMDILTargetMapping_0_9
#define HSAILTargetMapping HSAILTargetMapping_0_9
#define AMDIL64TargetMapping AMDIL64TargetMapping_0_9
#define HSAIL64TargetMapping HSAIL64TargetMapping_0_9
#define A32TargetMapping A32TargetMapping_0_9
#define A64TargetMapping A64TargetMapping_0_9
#else
#error "The compiler library version was not defined."
#include "v0_8/target_mappings.h"
#define X86TargetMapping X86TargetMapping_0_8
#define X64TargetMapping X64TargetMapping_0_8
#define AMDILTargetMapping AMDILTargetMapping_0_8
#define HSAILTargetMapping HSAILTargetMapping_0_8
#define AMDIL64TargetMapping AMDIL64TargetMapping_0_8
#define HSAIL64TargetMapping HSAIL64TargetMapping_0_8
#endif
#endif // TARGET_MAPPINGS_H_
@@ -0,0 +1,840 @@
//
// Copyright (c) 2011 Advanced Micro Devices, Inc. All rights reserved.
//
#include "acl.h"
#include "aclTypes.h"
#include "v0_7/clTypes.h"
#include "v0_7/clCompiler.h"
#include "libUtils.h"
#include "bif/bifbase.hpp"
#include "utils/target_mappings.h"
#include "utils/versions.hpp"
#include "utils/options.hpp"
#include <cassert>
#include <cstring>
#include "bif/bif.hpp"
extern aclBinary* constructBinary(size_t struct_version,
const aclTargetInfo *target,
const aclBinaryOptions *opts);
// Utility function to set a flag in option structure
// of the aclDevCaps.
void
setFlag(aclDevCaps *caps, compDeviceCaps option)
{
assert((uint32_t)option < ((1 << FLAG_SHIFT_VALUE) *FLAG_ARRAY_SIZE)
&& "The index passed in is outside of the range of valid values!");
caps->flags[option >> FLAG_SHIFT_VALUE] |= FLAG_BITLOC(option);
}
// Utility function to flip a flag in option structure
// of the aclDevCaps.
void
flipFlag(aclDevCaps *caps, compDeviceCaps option)
{
assert((uint32_t)option < ((1 << FLAG_SHIFT_VALUE) *FLAG_ARRAY_SIZE)
&& "The index passed in is outside of the range of valid values!");
caps->flags[option >> FLAG_SHIFT_VALUE] ^= FLAG_BITLOC(option);
}
// Utility function to clear a flag in option structure
// of the aclDevCaps.
void
clearFlag(aclDevCaps *caps, compDeviceCaps option)
{
assert((uint32_t)option < ((1 << FLAG_SHIFT_VALUE) *FLAG_ARRAY_SIZE)
&& "The index passed in is outside of the range of valid values!");
caps->flags[option >> FLAG_SHIFT_VALUE] &= ~FLAG_BITLOC(option);
}
// Utility function to check that a flag in option structure
// of the aclDevCaps is set.
bool
checkFlag(aclDevCaps *caps, compDeviceCaps option)
{
assert((uint32_t)option < ((1 << FLAG_SHIFT_VALUE) *FLAG_ARRAY_SIZE)
&& "The index passed in is outside of the range of valid values!");
return ((uint32_t)(caps->flags[option >> FLAG_SHIFT_VALUE]
& FLAG_BITLOC(option))) == (uint32_t)FLAG_BITLOC(option);
}
void setEncryptCaps(aclDevCaps_0_8 *ptr)
{
clearFlag(ptr, capSaveSOURCE);
clearFlag(ptr, capSaveLLVMIR);
clearFlag(ptr, capSaveCG);
clearFlag(ptr, capSaveSPIR);
clearFlag(ptr, capSaveAMDIL);
clearFlag(ptr, capSaveHSAIL);
clearFlag(ptr, capSaveDISASM);
clearFlag(ptr, capSaveAS);
setFlag(ptr, capSaveEXE);
setFlag(ptr, capEncrypted);
}
void setOptionCaps(amd::option::Options *opts, aclDevCaps_0_8 *ptr)
{
#define COND_SET_FLAG(A) \
(((opts)->oVariables->Bin##A) ? setFlag(ptr, capSave##A) : clearFlag(ptr, capSave##A))
COND_SET_FLAG(SOURCE);
COND_SET_FLAG(LLVMIR);
COND_SET_FLAG(CG);
COND_SET_FLAG(DISASM);
COND_SET_FLAG(AMDIL);
COND_SET_FLAG(HSAIL);
COND_SET_FLAG(AS);
COND_SET_FLAG(SPIR);
COND_SET_FLAG(EXE);
#undef COND_SET_FLAG
}
aclBIF *aclutGetBIF(aclBinary *binary)
{
aclBIF *bif = NULL;
if (binary->struct_size == sizeof(aclBinary_0_8)) {
bif = reinterpret_cast<aclBinary_0_8*>(binary)->bin;
} else if (binary->struct_size == sizeof(aclBinary_0_8_1)) {
bif = reinterpret_cast<aclBinary_0_8_1*>(binary)->bin;
} else {
assert(!"Binary format not supported!");
bif = reinterpret_cast<aclBinary*>(binary)->bin;
}
return bif;
}
aclOptions *aclutGetOptions(aclBinary *binary)
{
aclOptions *opt = NULL;
if (binary->struct_size == sizeof(aclBinary_0_8)) {
opt = reinterpret_cast<aclBinary_0_8*>(binary)->options;
} else if (binary->struct_size == sizeof(aclBinary_0_8_1)) {
opt = reinterpret_cast<aclBinary_0_8_1*>(binary)->options;
} else {
assert(!"Binary format not supported!");
opt = binary->options;
}
return opt;
}
aclBinaryOptions *aclutGetBinOpts(aclBinary *binary)
{
aclBinaryOptions *opt = NULL;
if (binary->struct_size == sizeof(aclBinary_0_8)) {
opt = reinterpret_cast<aclBinaryOptions*>(
&reinterpret_cast<aclBinary_0_8*>(binary)->binOpts);
} else if (binary->struct_size == sizeof(aclBinary_0_8_1)) {
opt = &reinterpret_cast<aclBinary_0_8_1*>(binary)->binOpts;
} else {
assert(!"Binary format not supported!");
opt = &binary->binOpts;
}
return opt;
}
aclTargetInfo *aclutGetTargetInfo(aclBinary *binary)
{
aclTargetInfo *tgt = NULL;
if (binary->struct_size == sizeof(aclBinary_0_8)) {
tgt = &reinterpret_cast<aclBinary_0_8*>(binary)->target;
} else if (binary->struct_size == sizeof(aclBinary_0_8_1)) {
tgt = &reinterpret_cast<aclBinary_0_8_1*>(binary)->target;
} else {
assert(!"Binary format not supported!");
tgt = &binary->target;
}
return tgt;
}
aclDevCaps* aclutGetCaps(aclBinary *binary)
{
aclDevCaps *caps = NULL;
if (binary->struct_size == sizeof(aclBinary_0_8)) {
caps = &reinterpret_cast<aclBinary_0_8*>(binary)->caps;
} else if (binary->struct_size == sizeof(aclBinary_0_8_1)) {
caps = &reinterpret_cast<aclBinary_0_8_1*>(binary)->caps;
} else {
assert(!"Binary format not supported!");
caps = &binary->caps;
}
return caps;
}
// Helper function that returns the
// allocation function from the binary.
AllocFunc
aclutAlloc(const aclBinary *bin)
{
size_t size = (bin ? bin->struct_size : 0);
AllocFunc m = NULL;
switch(size) {
case 0:
case sizeof(aclBinary_0_8):
break;
case sizeof(aclBinary_0_8_1):
m = reinterpret_cast<const aclBinary_0_8_1*>(bin)->binOpts.alloc;
break;
default:
assert(!"Found an unsupported binary!");
m = bin->binOpts.alloc;
break;
}
return (m) ? m : &::malloc;
}
// Helper function that returns the
// allocation function from the compiler.
AllocFunc
aclutAlloc(const aclCompiler *bin)
{
size_t size = (bin ? bin->struct_size : 0);
AllocFunc m = NULL;
switch(size) {
case 0:
case sizeof(aclCompilerHandle_0_8):
break;
case sizeof(aclCompilerHandle_0_8_1):
m = reinterpret_cast<const aclCompilerHandle_0_8_1*>(bin)->alloc;
break;
default:
assert(!"Found an unsupported compiler!");
m = bin->alloc;
break;
}
return (m) ? m : &::malloc;
}
AllocFunc
aclutAlloc(const aclCompilerOptions *opts)
{
size_t size = (opts ? opts->struct_size : 0);
AllocFunc m = NULL;
switch (size) {
case 0:
case sizeof(aclCompilerOptions_0_8):
break;
case sizeof(aclCompilerOptions_0_8_1):
m = reinterpret_cast<const aclCompilerOptions_0_8_1*>(opts)->alloc;
break;
default:
assert(!"Found an unsupported compiler options struct!");
m = opts->alloc;
break;
}
return (m) ? m : &::malloc;
}
// Helper function that returns the
// de-allocation function from the compiler.
FreeFunc
aclutFree(const aclCompiler *bin)
{
size_t size = (bin ? bin->struct_size : 0);
FreeFunc f = NULL;
switch(size) {
case 0:
case sizeof(aclCompilerHandle_0_8):
break;
case sizeof(aclCompilerHandle_0_8_1):
f = reinterpret_cast<const aclCompilerHandle_0_8_1*>(bin)->dealloc;
break;
default:
assert(!"Found an unsupported compiler!");
f = bin->dealloc;
break;
}
return (f) ? f : &::free;
}
// Helper function that returns the
// de-allocation function from the binary.
FreeFunc
aclutFree(const aclBinary *bin)
{
size_t size = (bin ? bin->struct_size : 0);
FreeFunc f = NULL;
switch(size) {
case 0:
case sizeof(aclBinary_0_8):
break;
case sizeof(aclBinary_0_8_1):
f = reinterpret_cast<const aclBinary_0_8_1*>(bin)->binOpts.dealloc;
break;
default:
assert(!"Found an unsupported binary!");
f = bin->binOpts.dealloc;
break;
}
return (f) ? f : &::free;
}
FreeFunc
aclutFree(const aclCompilerOptions *opts)
{
size_t size = (opts ? opts->struct_size : 0);
FreeFunc f = NULL;
switch (size) {
case 0:
case sizeof(aclCompilerOptions_0_8):
break;
case sizeof(aclCompilerOptions_0_8_1):
f = reinterpret_cast<const aclCompilerOptions_0_8_1*>(opts)->dealloc;
break;
default:
assert(!"Found an unsupported compiler options struct!");
f = opts->dealloc;
break;
}
return (f) ? f : &::free;
}
void
aclutCopyBinOpts(aclBinaryOptions *dst, const aclBinaryOptions *src, bool is64)
{
if (dst == src) return;
aclBinaryOptions_0_8 *dst08;
aclBinaryOptions_0_8_1 *dst081;
const aclBinaryOptions_0_8 *src08;
const aclBinaryOptions_0_8_1 *src081;
dst08 = reinterpret_cast<aclBinaryOptions_0_8*>(dst);
dst081 = reinterpret_cast<aclBinaryOptions_0_8_1*>(dst);
src08 = reinterpret_cast<const aclBinaryOptions_0_8*>(src);
src081 = reinterpret_cast<const aclBinaryOptions_0_8_1*>(src);
unsigned size = (src ? src->struct_size : 0);
switch (size) {
case 0:
switch (dst->struct_size) {
case sizeof(aclBinary_0_8):
dst08->elfclass = (is64) ? ELFCLASS64 : ELFCLASS32;
dst08->bitness = ELFDATA2LSB;
dst08->temp_file = "";
dst08->kernelArgAlign = 4;
break;
case sizeof(aclBinary_0_8_1):
dst081->elfclass = (is64) ? ELFCLASS64 : ELFCLASS32;
dst081->bitness = ELFDATA2LSB;
dst081->temp_file = "";
dst081->kernelArgAlign = 4;
dst081->alloc = &::malloc;
dst081->dealloc = &::free;
break;
default:
dst->elfclass = (is64) ? ELFCLASS64 : ELFCLASS32;
dst->bitness = ELFDATA2LSB;
dst->temp_file = "";
dst->kernelArgAlign = 4;
dst->alloc = &::malloc;
dst->dealloc = &::free;
break;
}
break;
case sizeof(aclBinaryOptions_0_8):
switch (dst->struct_size) {
case sizeof(aclBinaryOptions_0_8):
memcpy(dst08, src08, src08->struct_size);
break;
case sizeof(aclBinaryOptions_0_8_1):
dst081->elfclass = src08->elfclass;
dst081->bitness = src08->bitness;
dst081->temp_file = src08->temp_file;
dst081->kernelArgAlign = src08->kernelArgAlign;
dst081->alloc = &::malloc;
dst081->dealloc = &::free;
break;
default:
assert(!"aclBinary format is not supported!");
memcpy(dst, src08, src08->struct_size);
if (!dst->alloc) dst->alloc = &::malloc;
if (!dst->dealloc) dst->dealloc = &::free;
}
break;
case sizeof(aclBinaryOptions_0_8_1):
switch (dst->struct_size) {
case sizeof(aclBinary_0_8):
dst08->elfclass = src081->elfclass;
dst08->bitness = src081->bitness;
dst08->temp_file = src081->temp_file;
dst08->kernelArgAlign = src081->kernelArgAlign;
break;
case sizeof(aclBinaryOptions_0_8_1):
memcpy(dst081, src081, src081->struct_size);
if (!dst->alloc) dst->alloc = &::malloc;
if (!dst->dealloc) dst->dealloc = &::free;
break;
default:
assert(!"aclBinary format is not supported!");
memcpy(dst, src081, src081->struct_size);
if (!dst->alloc) dst->alloc = &::malloc;
if (!dst->dealloc) dst->dealloc = &::free;
}
break;
default:
assert(!"aclBinary format is not supported!");
memcpy(dst, src, src->struct_size);
}
}
void initElfDeviceCaps(aclBinary *elf)
{
if (aclutGetCaps(elf)->encryptCode) {
setEncryptCaps(aclutGetCaps(elf));
return;
}
if (aclutGetOptions(elf)) {
setOptionCaps(reinterpret_cast<amd::option::Options*>(
aclutGetOptions(elf)), aclutGetCaps(elf));
}
}
const char *getDeviceName(const aclTargetInfo &target)
{
if (target.chip_id) {
return aclGetChip(target);
} else if (target.arch_id) {
return aclGetArchitecture(target);
}
return NULL;
}
/*! Function that returns the TargetMapping for
*the specific target device.
*/
static const TargetMapping& getTargetMapping(const aclTargetInfo &target)
{
switch(target.arch_id) {
default:
assert(!"Passed a device id that is invalid!");
break;
case aclX64:
return X64TargetMapping[target.chip_id];
break;
case aclX86:
return X86TargetMapping[target.chip_id];
break;
case aclHSAIL:
return HSAILTargetMapping[target.chip_id];
break;
case aclHSAIL64:
return HSAIL64TargetMapping[target.chip_id];
break;
case aclAMDIL:
return AMDILTargetMapping[target.chip_id];
break;
case aclAMDIL64:
return AMDIL64TargetMapping[target.chip_id];
break;
};
return UnknownTarget;
}
/*! Function that returns the library type from the TargetMapping table for
*the specific target device id.
*/
amd::LibrarySelector getLibraryType(const aclTargetInfo *target)
{
const TargetMapping& Mapping = getTargetMapping(*target);
return Mapping.lib;
}
/*! Function that returns family_enum from the TargetMapping table for
*the specific target device id.
*/
unsigned getFamilyEnum(const aclTargetInfo *target)
{
const TargetMapping& Mapping = getTargetMapping(*target);
return Mapping.family_enum;
}
/*! Function that returns chip_enum from the TargetMapping table for
*the specific target device id.
*/
unsigned getChipEnum(const aclTargetInfo *target)
{
const TargetMapping& Mapping = getTargetMapping(*target);
return Mapping.chip_enum;
}
void
appendLogToCL(aclCompiler *cl, const std::string &logStr)
{
if (logStr.empty()) {
return;
}
unsigned size = logStr.size() + cl->logSize;
if (!size) {
return;
}
char *tmpBuildLog = reinterpret_cast<char*>(aclutAlloc(cl)(size + 2));
memset(tmpBuildLog, 0, size + 2);
if (cl->logSize) {
std::copy(cl->buildLog,cl->buildLog + cl->logSize, tmpBuildLog);
std::copy(logStr.begin(), logStr.end(), tmpBuildLog + cl->logSize + 1);
tmpBuildLog[cl->logSize] = '\n';
} else {
std::copy(logStr.begin(), logStr.end(), tmpBuildLog);
}
cl->logSize += (unsigned int)logStr.size();
if (cl->buildLog) {
aclutFree(cl)(cl->buildLog);
}
cl->buildLog = tmpBuildLog;
}
static void
setElfTarget(bifbase *elfBin, const aclTargetInfo *tgtInfo)
{
uint16_t elf_target = 0;
switch (tgtInfo->arch_id) {
default:
assert(!"creating an elf for an invalid architecture!");
case aclX86:
elfBin->setTarget(EM_386, aclPlatformCompLib);
break;
case aclX64:
elfBin->setTarget(EM_X86_64, aclPlatformCompLib);
break;
case aclHSAIL:
elfBin->setTarget(EM_HSAIL, aclPlatformCompLib);
break;
case aclHSAIL64:
elfBin->setTarget(EM_HSAIL_64, aclPlatformCompLib);
break;
case aclAMDIL:
elfBin->setTarget(EM_AMDIL, aclPlatformCompLib);
break;
case aclAMDIL64:
elfBin->setTarget(EM_AMDIL_64, aclPlatformCompLib);
break;
}
}
// FIXME: this needs to be moved into the BIF classes.
static void
convertBIF30MachineTo2X(bifbase *elfBin, const aclTargetInfo *tgtInfo)
{
uint16_t machine = 0;
uint32_t flags = 0;
aclPlatform pform = aclPlatformLast;
if (elfBin == NULL) return;
elfBin->getTarget(machine, pform);
assert(pform == aclPlatformCompLib
&& "Platform is specified incorrectly!");
if (isCpuTarget(*tgtInfo)) {
assert(!"Not implemented/supported family detected!");
pform = aclPlatformCPU;
} else if (isAMDILTarget(*tgtInfo)) {
const char* chip = aclGetChip(*tgtInfo);
for (unsigned x = 0, y = sizeof(calTargetMapping)/sizeof(calTargetMapping[0]);
x < y; ++x) {
if (!strcmp(chip, calTargetMapping[x])) {
machine = x;
break;
}
}
pform = aclPlatformCAL;
} else {
assert(!"Not implemented/supported family detected!");
}
elfBin->setTarget(machine, pform);
}
// FIXME: This needs to be moved into the elf classes
static void
convertBIF2XMachineTo30(bifbase *elfBin)
{
uint16_t machine = 0;
aclPlatform pform = aclPlatformLast;
if (elfBin == NULL) return;
elfBin->getTarget(machine, pform);
assert(pform != aclPlatformCompLib
&& "Platform is specified incorrectly!");
if (pform == aclPlatformCPU) {
uint16_t type;
elfBin->getType(type);
machine = (type == ELFCLASS32 ? EM_386 : EM_X86_64);
} else if (pform == aclPlatformCAL) {
machine = EM_AMDIL;
} else {
assert(!"Unknown platform found!");
}
pform = aclPlatformCompLib;
elfBin->setTarget(machine, pform);
}
static void
setElfFlags(bifbase *elfBin, const aclTargetInfo *tgtInfo)
{
uint32_t flags = 0;
elfBin->getFlags(flags);
flags &= 0xFFFF0000;
const FamilyMapping *family = familySet + tgtInfo->arch_id;
flags = tgtInfo->chip_id & 0xFFFF;
elfBin->setFlags(flags);
}
static aclBinary*
cloneOclElfNoBIF(const aclBinary *src) {
if (src == NULL) return NULL;
if (src->struct_size == sizeof(aclBinary_0_8_1)) {
aclBinary *dst = constructBinary(src->struct_size,
aclutGetTargetInfo(const_cast<aclBinary*>(src)),
aclutGetBinOpts(const_cast<aclBinary*>(src)));
if (dst == NULL) {
return NULL;
}
aclBinary_0_8_1 *dptr = reinterpret_cast<aclBinary_0_8_1*>(dst);
const aclBinary_0_8_1 *sptr = reinterpret_cast<const aclBinary_0_8_1*>(src);
dptr->target.struct_size = sizeof(aclTargetInfo_0_8);
if (sptr->target.struct_size == sizeof(oclTargetInfo_0_7)) {
dptr->target.arch_id = sptr->target.arch_id;
dptr->target.chip_id = sptr->target.chip_id;
} else if (sptr->target.struct_size == sizeof(aclTargetInfo_0_8)) {
memcpy(&dptr->target, &sptr->target, sptr->target.struct_size);
} else {
assert(!"Unsupported target info detected!");
}
memcpy(&dptr->caps, &sptr->caps, sptr->caps.struct_size);
assert(sizeof(aclDevCaps_0_8) == dptr->caps.struct_size
&& "The caps struct is not version 0.7!");
amd::option::Options *Opts = reinterpret_cast<amd::option::Options*>(
aclutAlloc(src)(sizeof(amd::option::Options)));
Opts = new (Opts) amd::option::Options;
amd::option::Options *sOpts = reinterpret_cast<amd::option::Options*>(
sptr->options);
if (sOpts) {
parseAllOptions(sOpts->origOptionStr, *Opts);
}
dptr->options = reinterpret_cast<aclOptions*>(Opts);
dptr->bin = NULL;
return dst;
} else if (src->struct_size == sizeof(aclBinary_0_8)) {
aclBinary *dst = constructBinary(src->struct_size,
&src->target,
&src->binOpts);
if (dst == NULL) {
return NULL;
}
aclBinary_0_8 *dptr = reinterpret_cast<aclBinary_0_8*>(dst);
const aclBinary_0_8 *sptr = reinterpret_cast<const aclBinary_0_8*>(src);
dptr->target.struct_size = sizeof(aclTargetInfo_0_8);
if (sptr->target.struct_size == sizeof(oclTargetInfo_0_7)) {
dptr->target.arch_id = sptr->target.arch_id;
dptr->target.chip_id = sptr->target.chip_id;
} else if (sptr->target.struct_size == sizeof(aclTargetInfo_0_8)) {
memcpy(&dptr->target, &sptr->target, sptr->target.struct_size);
} else {
assert(!"Unsupported target info detected!");
}
memcpy(&dptr->caps, &sptr->caps, sptr->caps.struct_size);
assert(sizeof(aclDevCaps_0_8) == dptr->caps.struct_size
&& "The caps struct is not version 0.7!");
amd::option::Options *Opts = reinterpret_cast<amd::option::Options*>(
aclutAlloc(src)(sizeof(amd::option::Options)));
Opts = new (Opts) amd::option::Options;
amd::option::Options *sOpts = reinterpret_cast<amd::option::Options*>(
sptr->options);
if (sOpts) {
parseAllOptions(sOpts->origOptionStr, *Opts);
}
dptr->options = reinterpret_cast<aclOptions*>(Opts);
dptr->bin = NULL;
return dst;
} else if (src->struct_size == sizeof(oclElfHandle_0_7)) {
oclElf *dst = constructOclElf(src->struct_size);
if (dst == NULL) {
return NULL;
}
oclElfHandle_0_7 *dptr = reinterpret_cast<oclElfHandle_0_7*>(dst);
const oclElfHandle_0_7 *sptr = reinterpret_cast<const oclElfHandle_0_7*>(src);
dptr->target.struct_size = sptr->target.struct_size;
memcpy(&dptr->target, &sptr->target, sptr->target.struct_size);
assert(sizeof(oclTargetInfo_0_7) == dptr->target.struct_size
&& "The target info struct is not version 0.7!");
memcpy(&dptr->caps, &sptr->caps, sptr->caps.struct_size);
assert(sizeof(elfDevCaps_0_7) == dptr->caps.struct_size
&& "The caps struct is not version 0.7!");
amd::option::Options *Opts = reinterpret_cast<amd::option::Options*>(
aclutAlloc(src)(sizeof(amd::option::Options)));
Opts = new (Opts) amd::option::Options;
amd::option::Options *sOpts = reinterpret_cast<amd::option::Options*>(
sptr->options);
parseAllOptions(sOpts->origOptionStr, *Opts);
dptr->options = reinterpret_cast<bifOptions*>(Opts);
dptr->bin = NULL;
return reinterpret_cast<aclBinary*>(dst);
} else {
assert(!"Elf version not supported!");
}
return NULL;
}
// Create a copy of an ELF and duplicate all sections/symbols
// All sections are copied verbatim.
aclBinary*
createELFCopy(aclBinary *src) {
aclBinary *dst = cloneOclElfNoBIF(src);
if (dst != NULL) {
bifbase *srcBin = reinterpret_cast<bifbase*>(aclutGetBIF(src));
bifbase* dstBin = NULL;
switch (srcBin->getVersion()) {
default:
assert(!"New/unknown version detected!");
dstBin = reinterpret_cast<bifbase*>(aclutAlloc(src)(sizeof(bifbase)));
dstBin = new (dstBin) bifbase(srcBin->getBase());
break;
case aclBIFVersion20:
dstBin = reinterpret_cast<bifbase*>(aclutAlloc(src)(sizeof(bif20)));
dstBin = new (dstBin) bif20(srcBin->get20()); break;
case aclBIFVersion21:
dstBin = reinterpret_cast<bifbase*>(aclutAlloc(src)(sizeof(bif21)));
dstBin = new (dstBin) bif21(srcBin->get21()); break;
case aclBIFVersion30:
dstBin = reinterpret_cast<bifbase*>(aclutAlloc(src)(sizeof(bif30)));
dstBin = new (dstBin) bif30(srcBin->get30()); break;
}
if (dstBin->hasError()) {
aclBinaryFini(dst);
return NULL;
}
dst->bin = reinterpret_cast<aclBIF*>(dstBin);
}
return dst;
}
// Create a BIF2.1 elf from a BIF 2.0 elf.
// All sections are copied and then if
// CAL/DLL or JITBINARY sections are found,
// the type is set to EXEC.
aclBinary*
convertBIF20ToBIF21(aclBinary *src) {
aclBinary *dst = cloneOclElfNoBIF(src);
if (dst != NULL) {
bifbase *srcBin = reinterpret_cast<bifbase*>(aclutGetBIF(src));
assert(srcBin->get20() != NULL && "Passed in an invalid binary!");
bif21 *dstBin = NULL;
dstBin = reinterpret_cast<bif21*>(aclutAlloc(src)(sizeof(bif21)));
dstBin = new (dstBin) bif21(srcBin->get20());
if (dstBin->hasError()) {
aclBinaryFini(dst);
return NULL;
}
dst->bin = reinterpret_cast<aclBIF*>(dstBin);
}
return dst;
}
// Create a BIF3.0 elf from a BIF 2.0 elf.
aclBinary*
convertBIF20ToBIF30(aclBinary *src) {
aclBinary *dst = cloneOclElfNoBIF(src);
if (dst != NULL) {
bifbase *srcBin = reinterpret_cast<bifbase*>(aclutGetBIF(src));
assert(srcBin->get20() != NULL && "Passed in an invalid binary!");
bif30 *dstBin = NULL;
dstBin = reinterpret_cast<bif30*>(aclutAlloc(src)(sizeof(bif30)));
dstBin = new (dstBin) bif30(srcBin->get20());
if (dstBin->hasError()) {
aclBinaryFini(dst);
return NULL;
}
dst->bin = reinterpret_cast<aclBIF*>(dstBin);
convertBIF2XMachineTo30(dstBin);
}
return dst;
}
// Create a BIF2.0 elf from a BIF 2.1 elf.
// All sections except for the COMMENT section is copied
// verbatim and the section is set to NONE.
aclBinary*
convertBIF21ToBIF20(aclBinary *src) {
aclBinary *dst = cloneOclElfNoBIF(src);
if (dst != NULL) {
bifbase *srcBin = reinterpret_cast<bifbase*>(aclutGetBIF(src));
assert(srcBin->get21() != NULL && "Passed in an invalid binary!");
bif20 *dstBin = NULL;
dstBin = reinterpret_cast<bif20*>(aclutAlloc(src)(sizeof(bif20)));
dstBin = new (dstBin) bif20(srcBin->get21());
if (dstBin->hasError()) {
aclBinaryFini(dst);
return NULL;
}
dst->bin = reinterpret_cast<aclBIF*>(dstBin);
}
return dst;
}
// Create a BIF3.0 elf from a BIF 2.1 elf.
// See BIF spec for 2.1 to 3.0 conversion
// and also include the comment section.
aclBinary*
convertBIF21ToBIF30(aclBinary *src) {
aclBinary *dst = cloneOclElfNoBIF(src);
if (dst != NULL) {
bifbase *srcBin = reinterpret_cast<bifbase*>(aclutGetBIF(src));
assert(srcBin->get21() != NULL && "Passed in an invalid binary!");
bif30 *dstBin = NULL;
dstBin = reinterpret_cast<bif30*>(aclutAlloc(src)(sizeof(bif30)));
dstBin = new (dstBin) bif30(srcBin->get21());
if (dstBin->hasError()) {
aclBinaryFini(dst);
return NULL;
}
dst->bin = reinterpret_cast<aclBIF*>(dstBin);
convertBIF2XMachineTo30(dstBin);
}
return dst;
}
// Create a BIF2.0 elf from a BIF 3.0 elf.
// See BIF spec for 3.0 to 2.0 conversion.
aclBinary*
convertBIF30ToBIF20(aclBinary *src) {
aclBinary *dst = cloneOclElfNoBIF(src);
if (dst != NULL) {
bifbase *srcBin = reinterpret_cast<bifbase*>(aclutGetBIF(src));
assert(srcBin->get30() != NULL && "Passed in an invalid binary!");
bif20 *dstBin = NULL;
dstBin = reinterpret_cast<bif20*>(aclutAlloc(src)(sizeof(bif20)));
dstBin = new (dstBin) bif20(srcBin->get30());
if (dstBin->hasError()) {
aclBinaryFini(dst);
return NULL;
}
dst->bin = reinterpret_cast<aclBIF*>(dstBin);
}
return dst;
}
// Create a BIF2.1 elf from a BIF 3.0 elf
// See BIF spec for 3.0 to 2.0 conversion
// but also include the COMMENT section.
aclBinary*
convertBIF30ToBIF21(aclBinary *src) {
aclBinary *dst = cloneOclElfNoBIF(src);
if (dst != NULL) {
bifbase *srcBin = reinterpret_cast<bifbase*>(aclutGetBIF(src));
assert(srcBin->get30() != NULL && "Passed in an invalid binary!");
bif21 *dstBin = NULL;
dstBin = reinterpret_cast<bif21*>(aclutAlloc(src)(sizeof(bif21)));
dstBin = new (dstBin) bif21(srcBin->get30());
if (dstBin->hasError()) {
aclBinaryFini(dst);
return NULL;
}
dst->bin = reinterpret_cast<aclBIF*>(dstBin);
}
return dst;
}
#if !defined(BCMAG)
#define BCMAG "BC"
#define SBCMAG 2
#endif
bool
isBcMagic(const char* p)
{
if (p==NULL || strncmp(p, BCMAG, SBCMAG) != 0) {
return false;
}
return true;
}
@@ -0,0 +1,179 @@
//
// Copyright (c) 2011 Advanced Micro Devices, Inc. All rights reserved.
//
#ifndef _CL_LIB_UTILS_0_8_H_
#define _CL_LIB_UTILS_0_8_H_
#include "v0_8/aclTypes.h"
#include <string>
#include "library.hpp"
// Utility function to set a flag in option structure
// of the aclDevCaps.
void
setFlag(aclDevCaps *elf, compDeviceCaps option);
// Utility function to flip a flag in option structure
// of the aclDevCaps.
void
flipFlag(aclDevCaps *elf, compDeviceCaps option);
// Utility function to clear a flag in option structure
// of the aclDevCaps.
void
clearFlag(aclDevCaps *elf, compDeviceCaps option);
// Utility function to check that a flag in option structure
// of the aclDevCaps is set.
bool
checkFlag(aclDevCaps *elf, compDeviceCaps option);
// Utility function to initialize and elf device capabilities
void
initElfDeviceCaps(aclBinary *elf);
// Append the string to the aclCompiler log string.
void
appendLogToCL(aclCompiler *cl, const std::string &logStr);
const char *getDeviceName(const aclTargetInfo &Target);
// Select the correct library from the target information.
amd::LibrarySelector getLibraryType(const aclTargetInfo *Target);
// get family_enum from the target information.
unsigned getFamilyEnum(const aclTargetInfo *Target);
// get chip_enum from the target information.
unsigned getChipEnum(const aclTargetInfo *Target);
// Create a copy of an ELF and duplicate all sections/symbols
aclBinary*
createELFCopy(aclBinary *src);
// Create a BIF2.1 elf from a BIF 2.0 elf
aclBinary*
convertBIF20ToBIF21(aclBinary *src);
// Create a BIF3.0 elf from a BIF 2.0 elf
aclBinary*
convertBIF20ToBIF30(aclBinary *src);
// Create a BIF2.0 elf from a BIF 2.1 elf
aclBinary*
convertBIF21ToBIF20(aclBinary *src);
// Create a BIF3.0 elf from a BIF 2.1 elf
aclBinary*
convertBIF21ToBIF30(aclBinary *src);
// Create a BIF2.0 elf from a BIF 3.0 elf
aclBinary*
convertBIF30ToBIF20(aclBinary *src);
// Create a BIF2.1 elf from a BIF 3.0 elf
aclBinary*
convertBIF30ToBIF21(aclBinary *src);
// get a pointer to the aclBIF irrespective of the
// binary version.
aclBIF*
aclutGetBIF(aclBinary*);
// Get a pointer to the aclOptions irrespective of
// the binary version.
aclOptions*
aclutGetOptions(aclBinary*);
// Get a pointer to the aclBinaryOptions struct
// irrespective of the binary version.
aclBinaryOptions*
aclutGetBinOpts(aclBinary*);
// Get a pointer to the target info struct
// irrespective of the binary version.
aclTargetInfo*
aclutGetTargetInfo(aclBinary*);
// Get a pointer to the device caps
// irrespective of the binary version.
aclDevCaps*
aclutGetCaps(aclBinary*);
// Copy two binary option structures irrespective
// of the binary version and uses defaults when
// things don't match up.
void
aclutCopyBinOpts(aclBinaryOptions *dst,
const aclBinaryOptions *src,
bool is64bit);
// Helper function that returns the
// allocation function from the binary.
AllocFunc
aclutAlloc(const aclBinary *bin);
// Helper function that returns the
// de-allocation function from the binary.
FreeFunc
aclutFree(const aclBinary *bin);
// Helper function that returns the
// allocation function from the compiler.
AllocFunc
aclutAlloc(const aclCompiler *bin);
// Helper function that returns the
// de-allocation function from the compiler.
FreeFunc
aclutFree(const aclCompiler *bin);
// Helper function that returns the
// allocation function from the compiler options.
AllocFunc
aclutAlloc(const aclCompilerOptions *bin);
// Helper function that returns the
// de-allocation function from the compiler options.
FreeFunc
aclutFree(const aclCompilerOptions *bin);
// Helper predicate
// returns true if p starts with bit code signature.
bool
isBcMagic(const char* p);
inline bool is64BitTarget(const aclTargetInfo& target)
{
return (target.arch_id == aclX64 ||
target.arch_id == aclAMDIL64 ||
target.arch_id == aclHSAIL64);
}
inline bool isCpuTarget(const aclTargetInfo& target)
{
return (target.arch_id == aclX64 || target.arch_id == aclX86);
}
inline bool isGpuTarget(const aclTargetInfo& target)
{
return (target.arch_id == aclAMDIL || target.arch_id == aclAMDIL64 ||
target.arch_id == aclHSAIL || target.arch_id == aclHSAIL64);
}
inline bool isAMDILTarget(const aclTargetInfo& target)
{
return (target.arch_id == aclAMDIL || target.arch_id == aclAMDIL64);
}
inline bool isHSAILTarget(const aclTargetInfo& target)
{
return (target.arch_id == aclHSAIL || target.arch_id == aclHSAIL64);
}
enum scId {
SC_AMDIL = 0,
SC_HSAIL = 1,
SC_LAST,
};
#endif // _CL_LIB_UTILS_0_8_H_
@@ -0,0 +1,282 @@
//
// Copyright (c) 2011 Advanced Micro Devices, Inc. All rights reserved.
//
#ifndef _CL_UTILS_TARGET_MAPPINGS_0_8_H_
#define _CL_UTILS_TARGET_MAPPINGS_0_8_H_
#include "top.hpp"
#include "library.hpp"
#include "aclTypes.h"
#ifndef FAMILY_UNKNOWN
#define FAMILY_UNKNOWN 0
#endif
#ifndef FAMILY_X86
#define FAMILY_X86 1
#endif
#ifndef FAMILY_X64
#define FAMILY_X64 2
#endif
#define ARRAY_SIZEOF(A) (sizeof(A)/sizeof(A[0]))
typedef struct _target_mappings_rec {
const char* family_name;
const char* chip_name;
const char* codegen_name;
amd::LibrarySelector lib;
unsigned chip_enum;
uint64_t chip_options;
bool supported; // a false value means this device is not supported.
bool default_chip; // Chip to select if multiple chips with the same name exist.
unsigned family_enum; // Only used for GPU devices currently, for CPU we should put features.
} TargetMapping;
const TargetMapping UnknownTarget = { "UnknownFamily", "UnknownChip", "UnknownCodeGen",
amd::LibraryUndefined, 0, 0, false, false, FAMILY_UNKNOWN};
const TargetMapping InvalidTarget = { NULL, NULL, NULL,
amd::LibraryUndefined, 0, 0, false, false, FAMILY_UNKNOWN};
typedef struct _family_map_rec {
const TargetMapping* target;
const char* architecture;
const char* triple;
unsigned children_size;
} FamilyMapping;
const FamilyMapping UnknownFamily = { NULL, "UnknownFamily", "unknown", 0 };
const FamilyMapping InvalidFamily = { NULL, NULL, NULL, 0 };
typedef enum {
F_CPU_CMOV = 1,
F_CPU_POPCNT = 2,
F_CPU_MMX = 3,
F_CPU_SSE1 = 4,
F_CPU_SSE2 = 5,
F_CPU_SSE3 = 6,
F_CPU_SSSE3 = 7,
F_CPU_SSE41 = 8,
F_CPU_SSE42 = 9,
F_CPU_SSE4A = 10,
F_CPU_3DNow = 11,
F_CPU_3DNowA = 12,
F_CPU_64Bit = 13,
F_CPU_SBTMem = 14,
F_CPU_FUAMem = 15,
F_CPU_AVX = 16,
F_CPU_CLMUL = 17,
F_CPU_VUAMem = 18,
F_CPU_AES = 19,
F_CPU_CXCHG16B = 20,
F_CPU_AVX2 = 21,
F_CPU_FMA3 = 22,
F_CPU_FMA4 = 23,
F_CPU_MOVBE = 24,
F_CPU_RDRAND = 25,
F_CPU_F16C = 26,
F_CPU_64BitMode = 27,
F_CPU_LZCNT = 28,
F_CPU_BMI = 29,
F_CPU_BMI2 = 30, // LLVM 3.1 only
F_CPU_LeaForSP = 31, // LLVM 3.1 only
F_CPU_FSGSBASE = 32, // LLVM 3.1 only
F_CPU_XOP = 33, // LLVM 3.1 only
F_CPU_ATOM = 34, // LLVM 3.1 only
F_CPU_LAST = 35
} CPUCodeGenFlags;
static const char* CPUCodeGenFlagTable[] =
{
"cmov",
"popcnt",
"mmx",
"sse",
"sse2",
"sse3",
"ssse3",
"sse41",
"sse42",
"sse4a",
"3dnow",
"3dnowa",
"64bit",
"slow-bt-mem",
"fast-unaligned-mem",
"avx",
"clmul",
"vector-unaligned-mem",
"aes",
"cmpxchg16b",
"avx2",
"fma3",
"fma4",
"movbe",
"rdrand",
"f16c",
"fsgsbase",
"lzcnt",
"bmi",
"bmi2",
"lea-sp",
"64bit-mode",
"xop",
"atom"
};
typedef enum {
// Bits for each feature.
F_FP64 = 0x0001,
F_BYTE_ADDRESSABLE = 0x0002,
F_BARRIER_DETECT = 0x0004,
F_IMAGES = 0x0008,
F_MULTI_UAV = 0x0010,
F_MACRO_DB = 0x0020,
F_NO_ALIAS = 0x0040,
F_NO_INLINE = 0x0080,
F_64BIT_PTR = 0x0100,
F_32ON64BIT_PTR = 0x0200,
F_DEBUG = 0x0400,
F_MWGS_256 = 0x0800,
F_MWGS_128 = 0x1000,
F_MWGS_64 = 0x2000,
F_MWGS_32 = 0x4000,
F_MWGS_16 = 0x8000,
F_MD_30 = 0x10000,
F_STACK_UAV = 0x20000,
F_MACRO_CALL = 0x40000,
// Bitmasks for each device type.
F_RV7XX_BASE = F_MACRO_DB|F_BARRIER_DETECT|F_MD_30,
F_RV710 = F_RV7XX_BASE|F_MWGS_32,
F_RV730 = F_RV7XX_BASE|F_MWGS_16,
F_RV770 = F_RV7XX_BASE|F_MWGS_64|F_FP64,
F_EG_BASE = F_BYTE_ADDRESSABLE|F_IMAGES|F_MACRO_DB|F_MD_30,
F_EG_EXT = F_EG_BASE|F_FP64|F_MWGS_256,
F_CEDAR = F_EG_BASE|F_MWGS_128,
F_REDWOOD = F_EG_BASE|F_MWGS_256,
F_JUNIPER = F_EG_BASE|F_MWGS_256,
F_NI_BASE = F_EG_BASE|F_MWGS_256,
F_NI_EXT = F_NI_BASE|F_FP64,
F_SI_BASE = F_NI_EXT|F_STACK_UAV|F_MACRO_CALL,
F_SI_64BIT_PTR = F_SI_BASE|F_64BIT_PTR
} GPUCodeGenFlags;
static const char* GPUCodeGenFlagTable[] = {
"fp64",
"byte_addressable_store",
"barrier_detect",
"images",
"multi_uav",
"macrodb",
"noalias",
"no-inline",
"64bitptr",
"small-global-objects",
"debug",
"mwgs-3-256-1-1",
"mwgs-3-128-1-1",
"mwgs-3-64-1-1",
"mwgs-3-32-1-1",
"mwgs-3-16-1-1",
"metadata30",
"stack-uav",
"macro-call"
};
static const char* calTargetMapping[] = {
"RV600", "RV610", "RV630", "RV670",
"RV770", "RV770", "RV710", "RV730",
"Cypress", "Juniper", "Redwood", "Cedar",
"WinterPark", "BeaverCreek", "Loveland",
"Cayman", "Kauai", "Barts", "Turks", "Caicos",
"Tahiti", "Pitcairn", "Capeverde",
"Devastator", "Scrapper",
"Oland", "Bonaire",
"Spectre", "Spooky", "Kalindi",
"Hainan", "Hawaii",
"Iceland", "Tonga", "Mullins", "", "",
"",
};
#include "utils/v0_8/target_mappings_amdil.h"
#include "utils/v0_8/target_mappings_hsail.h"
#include "utils/v0_8/target_mappings_x86.h"
#include "utils/v0_8/target_mappings_x64.h"
#include "utils/v0_8/target_mappings_amdil64.h"
#include "utils/v0_8/target_mappings_hsail64.h"
// FIXME: Add static asserts to make sure that all of the arrays for TargetMapping match the enum table.
#define DATA_LAYOUT_64BIT "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16" \
"-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:32:32" \
"-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64" \
"-v96:128:128-v128:128:128-v192:256:256-v256:256:256" \
"-v512:512:512-v1024:1024:1024-v2048:2048:2048-a0:0:64" \
"-n32"
#define DATA_LAYOUT_32BIT "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16" \
"-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:32:32" \
"-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64" \
"-v96:128:128-v128:128:128-v192:256:256-v256:256:256" \
"-v512:512:512-v1024:1024:1024-v2048:2048:2048-a0:0:64" \
"-n32"
inline const char* getArchitecture(aclDevType arch_id)
{
switch (arch_id) {
case aclX86:
return "x86";
case aclAMDIL:
return "amdil";
case aclHSAIL:
return "hsail";
case aclX64:
return "x86-64";
case aclHSAIL64:
return "hsail-64";
case aclAMDIL64:
return "amdil64";
default:
return NULL;
}
}
inline const char* getTriple(aclDevType arch_id)
{
switch (arch_id) {
case aclX86:
#ifdef _WIN32
return "i686-pc-mingw32-amdopencl";
#else
return "i686-pc-linux-amdopencl";
#endif
case aclAMDIL:
return "amdil-pc-unknown-amdopencl";
case aclHSAIL:
return "hsail-pc-unknown-amdopencl";
case aclX64:
#ifdef _WIN32
return "x86_64-pc-mingw32-amdopencl";
#else
return "x86_64-pc-linux-amdopencl";
#endif
case aclHSAIL64:
return "hsail64-pc-unknown-amdopencl";
case aclAMDIL64:
return "amdil64-pc-unknown-amdopencl";
default:
return NULL;
}
}
// The contents of this array has to match the sequence defined in
// aclDevType_0_8
static const FamilyMapping familySet[] =
{
UnknownFamily,
{ (const TargetMapping*)&X86TargetMapping_0_8, getArchitecture(aclX86), getTriple(aclX86), ARRAY_SIZEOF(X86TargetMapping_0_8) },
{ (const TargetMapping*)&AMDILTargetMapping_0_8, getArchitecture(aclAMDIL), getTriple(aclAMDIL), ARRAY_SIZEOF(AMDILTargetMapping_0_8) },
{ (const TargetMapping*)&HSAILTargetMapping_0_8, getArchitecture(aclHSAIL), getTriple(aclHSAIL), ARRAY_SIZEOF(HSAILTargetMapping_0_8) },
{ (const TargetMapping*)&X64TargetMapping_0_8, getArchitecture(aclX64), getTriple(aclX64), ARRAY_SIZEOF(X64TargetMapping_0_8) },
{ (const TargetMapping*)&HSAIL64TargetMapping_0_8, getArchitecture(aclHSAIL64), getTriple(aclHSAIL64), ARRAY_SIZEOF(HSAIL64TargetMapping_0_8) },
{ (const TargetMapping*)&AMDIL64TargetMapping_0_8, getArchitecture(aclAMDIL64), getTriple(aclAMDIL64), ARRAY_SIZEOF(AMDIL64TargetMapping_0_8) },
InvalidFamily
};
#endif // _CL_UTILS_TARGET_MAPPINGS_0_8_H_
@@ -0,0 +1,103 @@
//
// Copyright (c) 2012 Advanced Micro Devices, Inc. All rights reserved.
//
#ifndef _CL_UTILS_TARGET_MAPPINGS_AMDIL_0_8_H_
#define _CL_UTILS_TARGET_MAPPINGS_AMDIL_0_8_H_
#include "inc/asic_reg/evergreen_id.h"
#include "inc/asic_reg/r700id.h"
#include "inc/asic_reg/tn_id.h"
#include "inc/asic_reg/sumo_id.h"
#include "inc/asic_reg/northernisland_id.h"
#include "inc/asic_reg/si_id.h"
#include "inc/asic_reg/kv_id.h"
#include "inc/asic_reg/ci_id.h"
#include "inc/asic_reg/vi_id.h"
#include "inc/asic_reg/cz_id.h"
#include "inc/asic_reg/atiid.h"
static const TargetMapping AMDILTargetMapping_0_8[] = {
UnknownTarget,
{ "R7XX", "RV770", "rv770", amd::GPU_Library_7xx, WEKIVA_A11, F_RV770, false, false, FAMILY_RV7XX },
{ "R7XX", "RV770", "rv770", amd::GPU_Library_7xx, WEKIVA_A12, F_RV770, false, true , FAMILY_RV7XX },
{ "R7XX", "RV790", "rv770", amd::GPU_Library_7xx, WEKIVA_A21, F_RV770, false, true , FAMILY_RV7XX },
{ "R7XX", "RV730", "rv730", amd::GPU_Library_7xx, MARIO_A11, F_RV730, false, false, FAMILY_RV7XX },
{ "R7XX", "RV730", "rv730", amd::GPU_Library_7xx, MARIO_A12, F_RV730, false, false, FAMILY_RV7XX },
{ "R7XX", "RV730", "rv730", amd::GPU_Library_7xx, MARIO_A13, F_RV730, false, true , FAMILY_RV7XX },
{ "R7XX", "RV710", "rv710", amd::GPU_Library_7xx, LUIGI_A11, F_RV710, false, false, FAMILY_RV7XX },
{ "R7XX", "RV710", "rv710", amd::GPU_Library_7xx, LUIGI_A12, F_RV710, false, true , FAMILY_RV7XX },
{ "R7XX", "RV710", "rv710", amd::GPU_Library_7xx, LUIGI_APU_A11, F_RV710, false, false, FAMILY_RV7XX },
{ "R7XX", "RV740", "rv770", amd::GPU_Library_7xx, WALDEN_A11, F_RV770, false, false, FAMILY_RV7XX },
{ "R7XX", "RV740", "rv770", amd::GPU_Library_7xx, WALDEN_A12, F_RV770, false, true , FAMILY_RV7XX },
{ "Evergreen", "Cypress", "cypress", amd::GPU_Library_Evergreen, CYPRESS_A11, F_EG_EXT, true , false, FAMILY_EVERGREEN },
{ "Evergreen", "Cypress", "cypress", amd::GPU_Library_Evergreen, CYPRESS_A12, F_EG_EXT, true , true , FAMILY_EVERGREEN },
{ "Evergreen", "Juniper", "juniper", amd::GPU_Library_Evergreen, JUNIPER_A11, F_JUNIPER, true , false, FAMILY_EVERGREEN },
{ "Evergreen", "Juniper", "juniper", amd::GPU_Library_Evergreen, JUNIPER_A12, F_JUNIPER, true , true , FAMILY_EVERGREEN },
{ "Evergreen", "Redwood", "redwood", amd::GPU_Library_Evergreen, REDWOOD_A11, F_REDWOOD, true , false, FAMILY_EVERGREEN },
{ "Evergreen", "Redwood", "redwood", amd::GPU_Library_Evergreen, REDWOOD_A12, F_REDWOOD, true , true , FAMILY_EVERGREEN },
{ "Evergreen", "Cedar", "cedar", amd::GPU_Library_Evergreen, CEDAR_A11, F_CEDAR, true , false, FAMILY_EVERGREEN },
{ "Evergreen", "Cedar", "cedar", amd::GPU_Library_Evergreen, CEDAR_A12, F_CEDAR, true , true , FAMILY_EVERGREEN },
{ "NI", "Cayman", "cayman", amd::GPU_Library_Evergreen, NI_CAYMAN_P_A11, F_NI_EXT, true , true , FAMILY_NI },
{ "NI", "Barts", "barts", amd::GPU_Library_Evergreen, NI_BARTS_PM_A11, F_NI_BASE, true , true , FAMILY_NI },
{ "NI", "Turks", "turks", amd::GPU_Library_Evergreen, NI_TURKS_M_A11, F_NI_BASE, true , true , FAMILY_NI },
{ "NI", "Lombok", "turks", amd::GPU_Library_Evergreen, NI_TURKS_LOMBOK_M_A11, F_NI_BASE, true , true , FAMILY_NI },
{ "NI", "Caicos", "caicos", amd::GPU_Library_Evergreen, NI_CAICOS_V_A11, F_NI_BASE, true , true , FAMILY_NI },
{ "NI", "Kauai", "kauai", amd::GPU_Library_Evergreen, KAUAI_A11, F_NI_BASE, false, false, FAMILY_NI },
{ "Sumo", "BeaverCreek", "redwood", amd::GPU_Library_Evergreen, SUPERSUMO_A0, F_REDWOOD, true , false, FAMILY_SUMO },
{ "Sumo", "BeaverCreek", "redwood", amd::GPU_Library_Evergreen, SUPERSUMO_B0, F_REDWOOD, true , true , FAMILY_SUMO },
{ "Sumo", "WinterPark", "redwood", amd::GPU_Library_Evergreen, SUMO_A0, F_REDWOOD, true , false, FAMILY_SUMO },
{ "Sumo", "WinterPark", "redwood", amd::GPU_Library_Evergreen, SUMO_B0, F_REDWOOD, true , true , FAMILY_SUMO },
{ "Sumo", "Loveland", "cedar", amd::GPU_Library_Evergreen, WRESTLER_A0, F_REDWOOD, true , false, FAMILY_SUMO },
{ "Sumo", "Loveland", "cedar", amd::GPU_Library_Evergreen, WRESTLER_A1, F_REDWOOD, true , false, FAMILY_SUMO },
{ "Sumo", "Loveland", "cedar", amd::GPU_Library_Evergreen, WRESTLER_B0, F_REDWOOD, true , false, FAMILY_SUMO },
{ "Sumo", "Loveland", "cedar", amd::GPU_Library_Evergreen, WRESTLER_C0, F_REDWOOD, true , true , FAMILY_SUMO },
{ "Sumo", "Bheem", "cedar", amd::GPU_Library_Evergreen, BHEEM_A0, F_REDWOOD, true , true , FAMILY_SUMO },
{ "SI", "Tahiti", "tahiti", amd::GPU_Library_SI, SI_TAHITI_P_A11, F_SI_BASE, true ,false, FAMILY_SI },
{ "SI", "Tahiti", "tahiti", amd::GPU_Library_SI, SI_TAHITI_P_A0, F_SI_BASE, true ,false, FAMILY_SI },
{ "SI", "Tahiti", "tahiti", amd::GPU_Library_SI, SI_TAHITI_P_A21, F_SI_BASE, true ,false, FAMILY_SI },
{ "SI", "Tahiti", "tahiti", amd::GPU_Library_SI, SI_TAHITI_P_B0, F_SI_BASE, true ,false, FAMILY_SI },
{ "SI", "Tahiti", "tahiti", amd::GPU_Library_SI, SI_TAHITI_P_A22, F_SI_BASE, true ,false, FAMILY_SI },
{ "SI", "Tahiti", "tahiti", amd::GPU_Library_SI, SI_TAHITI_P_B1, F_SI_BASE, true , true, FAMILY_SI },
{ "SI", "Pitcairn", "pitcairn", amd::GPU_Library_SI, SI_PITCAIRN_PM_A11, F_SI_BASE, true ,false, FAMILY_SI },
{ "SI", "Pitcairn", "pitcairn", amd::GPU_Library_SI, SI_PITCAIRN_PM_A0, F_SI_BASE, true ,false, FAMILY_SI },
{ "SI", "Pitcairn", "pitcairn", amd::GPU_Library_SI, SI_PITCAIRN_PM_A12, F_SI_BASE, true ,false, FAMILY_SI },
{ "SI", "Pitcairn", "pitcairn", amd::GPU_Library_SI, SI_PITCAIRN_PM_A1, F_SI_BASE, true , true, FAMILY_SI },
{ "SI", "Capeverde", "capeverde", amd::GPU_Library_SI, SI_CAPEVERDE_M_A11, F_SI_BASE, true ,false, FAMILY_SI },
{ "SI", "Capeverde", "capeverde", amd::GPU_Library_SI, SI_CAPEVERDE_M_A0, F_SI_BASE, true ,false, FAMILY_SI },
{ "SI", "Capeverde", "capeverde", amd::GPU_Library_SI, SI_CAPEVERDE_M_A12, F_SI_BASE, true ,false, FAMILY_SI },
{ "SI", "Capeverde", "capeverde", amd::GPU_Library_SI, SI_CAPEVERDE_M_A1, F_SI_BASE, true , true, FAMILY_SI },
{ "TN", "Devastator", "trinity", amd::GPU_Library_Evergreen, TN_DEVASTATOR_M_A0, F_NI_EXT, true, false, FAMILY_TN },
{ "TN", "Devastator", "trinity", amd::GPU_Library_Evergreen, TN_DEVASTATOR_M_A1, F_NI_EXT, true, true, FAMILY_TN },
{ "TN", "Devastator", "trinity", amd::GPU_Library_Evergreen, TN_DEVASTATOR_LITE_MV_A0, F_NI_EXT, true, false, FAMILY_TN },
{ "TN", "Devastator", "trinity", amd::GPU_Library_Evergreen, TN_DEVASTATOR_LITE_MV_A1, F_NI_EXT, true, false, FAMILY_TN },
{ "TN", "Devastator", "trinity", amd::GPU_Library_Evergreen, TN_DEVASTATOR_V_A0, F_NI_EXT, true, false, FAMILY_TN },
{ "TN", "Devastator", "trinity", amd::GPU_Library_Evergreen, TN_DEVASTATOR_V_A1, F_NI_EXT, true, false, FAMILY_TN },
{ "TN", "Scrapper", "trinity", amd::GPU_Library_Evergreen, TN_SCRAPPER_V_A0, F_NI_EXT, true, false, FAMILY_TN },
{ "TN", "Scrapper", "trinity", amd::GPU_Library_Evergreen, TN_SCRAPPER_V_A1, F_NI_EXT, true, true, FAMILY_TN },
{ "TN", "Scrapper", "trinity", amd::GPU_Library_Evergreen, TN_DVST_DUO_V_A0, F_NI_EXT, true, false, FAMILY_TN },
{ "KV", "Spectre", "spectre", amd::GPU_Library_CI, KV_SPECTRE_A0, F_SI_BASE, true, true, FAMILY_KV },
{ "KV", "Spooky", "spooky", amd::GPU_Library_CI, KV_SPOOKY_A0, F_SI_BASE, true, true, FAMILY_KV },
{ "KV", "Kalindi", "kalindi", amd::GPU_Library_CI, KB_KALINDI_A0, F_SI_BASE, true, true, FAMILY_KV },
{ "CI", "Hawaii", "hawaii", amd::GPU_Library_CI, CI_HAWAII_P_A0, F_SI_BASE, true, true, FAMILY_CI },
{ "KV", "Mullins", "mullins", amd::GPU_Library_CI, ML_GODAVARI_A0, F_SI_BASE, true, true, FAMILY_KV },
{ "SI", "Oland", "oland", amd::GPU_Library_SI, SI_OLAND_M_A0, F_SI_BASE, true, true, FAMILY_SI },
{ "CI", "Bonaire", "bonaire", amd::GPU_Library_CI, CI_BONAIRE_M_A0, F_SI_BASE, true, false, FAMILY_CI },
{ "SI", "Hainan", "hainan", amd::GPU_Library_SI, SI_HAINAN_V_A0, F_SI_BASE, true, true, FAMILY_SI },
UnknownTarget,
UnknownTarget,
UnknownTarget,
UnknownTarget,
UnknownTarget,
{ "TN", "Devastator", "trinity", amd::GPU_Library_Evergreen, TN_DEVASTATOR_W_A0, F_NI_EXT, true, false, FAMILY_TN },
{ "TN", "Devastator", "trinity", amd::GPU_Library_Evergreen, TN_DEVASTATOR_W_A1, F_NI_EXT, true, false, FAMILY_TN },
{ "TN", "Scrapper", "trinity", amd::GPU_Library_Evergreen, TN_SCRAPPER_LV_A0, F_NI_EXT, true, false, FAMILY_TN },
{ "TN", "Scrapper", "trinity", amd::GPU_Library_Evergreen, TN_SCRAPPER_LV_A1, F_NI_EXT, true, false, FAMILY_TN },
{ "VI", "Iceland", "iceland", amd::GPU_Library_CI, VI_ICELAND_M_A0, F_SI_BASE, true, true, FAMILY_VI },
{ "VI", "Tonga", "tonga", amd::GPU_Library_CI, VI_TONGA_P_A0, F_SI_BASE, true, true, FAMILY_VI },
{ "CI", "Bonaire", "bonaire", amd::GPU_Library_CI, CI_BONAIRE_M_A1, F_SI_BASE, true, true, FAMILY_CI },
InvalidTarget
};
#endif // _CL_UTILS_TARGET_MAPPINGS_AMDIL_0_8_H_
@@ -0,0 +1,51 @@
//
// Copyright (c) 2012 Advanced Micro Devices, Inc. All rights reserved.
//
#ifndef _CL_UTILS_TARGET_MAPPINGS_AMDIL64_0_8_H_
#define _CL_UTILS_TARGET_MAPPINGS_AMDIL64_0_8_H_
#include "inc/asic_reg/si_id.h"
#include "inc/asic_reg/kv_id.h"
#include "inc/asic_reg/ci_id.h"
#include "inc/asic_reg/vi_id.h"
#include "inc/asic_reg/cz_id.h"
#include "inc/asic_reg/atiid.h"
static const TargetMapping AMDIL64TargetMapping_0_8[] = {
UnknownTarget,
{ "SI", "Tahiti", "tahiti", amd::GPU64_Library_SI, SI_TAHITI_P_A11, F_SI_64BIT_PTR, true , false, FAMILY_SI },
{ "SI", "Tahiti", "tahiti", amd::GPU64_Library_SI, SI_TAHITI_P_A0, F_SI_64BIT_PTR, true , false, FAMILY_SI },
{ "SI", "Tahiti", "tahiti", amd::GPU64_Library_SI, SI_TAHITI_P_A21, F_SI_64BIT_PTR, true , false, FAMILY_SI },
{ "SI", "Tahiti", "tahiti", amd::GPU64_Library_SI, SI_TAHITI_P_B0, F_SI_64BIT_PTR, true , false, FAMILY_SI },
{ "SI", "Tahiti", "tahiti", amd::GPU64_Library_SI, SI_TAHITI_P_A22, F_SI_64BIT_PTR, true , false, FAMILY_SI },
{ "SI", "Tahiti", "tahiti", amd::GPU64_Library_SI, SI_TAHITI_P_B1, F_SI_64BIT_PTR, true , true, FAMILY_SI },
{ "SI", "Pitcairn", "pitcairn", amd::GPU64_Library_SI, SI_PITCAIRN_PM_A11, F_SI_64BIT_PTR, true , false, FAMILY_SI },
{ "SI", "Pitcairn", "pitcairn", amd::GPU64_Library_SI, SI_PITCAIRN_PM_A0, F_SI_64BIT_PTR, true , false, FAMILY_SI },
{ "SI", "Pitcairn", "pitcairn", amd::GPU64_Library_SI, SI_PITCAIRN_PM_A12, F_SI_64BIT_PTR, true , false, FAMILY_SI },
{ "SI", "Pitcairn", "pitcairn", amd::GPU64_Library_SI, SI_PITCAIRN_PM_A1, F_SI_64BIT_PTR, true , true, FAMILY_SI },
{ "SI", "Capeverde", "capeverde", amd::GPU64_Library_SI, SI_CAPEVERDE_M_A11, F_SI_64BIT_PTR, true , false, FAMILY_SI },
{ "SI", "Capeverde", "capeverde", amd::GPU64_Library_SI, SI_CAPEVERDE_M_A0, F_SI_64BIT_PTR, true , false, FAMILY_SI },
{ "SI", "Capeverde", "capeverde", amd::GPU64_Library_SI, SI_CAPEVERDE_M_A12, F_SI_64BIT_PTR, true , false, FAMILY_SI },
{ "SI", "Capeverde", "capeverde", amd::GPU64_Library_SI, SI_CAPEVERDE_M_A1, F_SI_64BIT_PTR, true , true, FAMILY_SI },
{ "KV", "Spectre", "spectre", amd::GPU64_Library_CI, KV_SPECTRE_A0, F_SI_64BIT_PTR, true, true, FAMILY_KV },
{ "KV", "Spooky", "spooky", amd::GPU64_Library_CI, KV_SPOOKY_A0, F_SI_64BIT_PTR, true, true, FAMILY_KV },
{ "KV", "Kalindi", "kalindi", amd::GPU64_Library_CI, KB_KALINDI_A0, F_SI_64BIT_PTR, true, true, FAMILY_KV },
{ "CI", "Hawaii", "hawaii", amd::GPU64_Library_CI, CI_HAWAII_P_A0, F_SI_64BIT_PTR, true, true, FAMILY_CI },
{ "KV", "Mullins", "mullins", amd::GPU64_Library_CI, ML_GODAVARI_A0, F_SI_64BIT_PTR, true, true, FAMILY_KV },
{ "SI", "Oland", "oland", amd::GPU64_Library_SI, SI_OLAND_M_A0, F_SI_64BIT_PTR, true, true, FAMILY_SI },
{ "CI", "Bonaire", "bonaire", amd::GPU64_Library_CI, CI_BONAIRE_M_A0, F_SI_64BIT_PTR, true, false, FAMILY_CI },
{ "SI", "Hainan", "hainan", amd::GPU64_Library_SI, SI_HAINAN_V_A0, F_SI_64BIT_PTR, true, true, FAMILY_SI },
UnknownTarget,
UnknownTarget,
UnknownTarget,
UnknownTarget,
UnknownTarget,
{ "VI", "Iceland", "iceland", amd::GPU64_Library_CI, VI_ICELAND_M_A0, F_SI_64BIT_PTR, true, true, FAMILY_VI },
{ "VI", "Tonga", "tonga", amd::GPU64_Library_CI, VI_TONGA_P_A0, F_SI_64BIT_PTR, true, true, FAMILY_VI },
{ "CI", "Bonaire", "bonaire", amd::GPU64_Library_CI, CI_BONAIRE_M_A0, F_SI_64BIT_PTR, true, true, FAMILY_CI },
InvalidTarget
};
#endif // _CL_UTILS_TARGET_MAPPINGS_AMDIL64_0_8_H_
@@ -0,0 +1,33 @@
//
// Copyright (c) 2012 Advanced Micro Devices, Inc. All rights reserved.
//
#ifndef _CL_UTILS_TARGET_MAPPINGS_HSAIL_0_8_H_
#define _CL_UTILS_TARGET_MAPPINGS_HSAIL_0_8_H_
#include "inc/asic_reg/si_id.h"
#include "inc/asic_reg/kv_id.h"
#include "inc/asic_reg/ci_id.h"
#include "inc/asic_reg/cz_id.h"
#include "inc/asic_reg/atiid.h"
static const TargetMapping HSAILTargetMapping_0_8[] = {
UnknownTarget,
{ "KV", "Spectre", "generic", amd::GPU_Library_HSAIL, KV_SPECTRE_A0, 0, true, true, FAMILY_KV },
{ "KV", "Spooky", "generic", amd::GPU_Library_HSAIL, KV_SPOOKY_A0, 0, true, true, FAMILY_KV },
{ "KV", "Kalindi", "generic", amd::GPU_Library_HSAIL, KB_KALINDI_A0, 0, true, true, FAMILY_KV },
{ "KV", "Mullins", "generic", amd::GPU_Library_HSAIL, ML_GODAVARI_A0, 0, true, true, FAMILY_KV },
{ "CI", "Bonaire", "generic", amd::GPU_Library_HSAIL, CI_BONAIRE_M_A0, 0, true, false, FAMILY_CI },
{ "CI", "Bonaire", "generic", amd::GPU_Library_HSAIL, CI_BONAIRE_M_A1, 0, true, true, FAMILY_CI },
{ "CI", "Hawaii", "generic", amd::GPU_Library_HSAIL, CI_HAWAII_P_A0, 0, true, true, FAMILY_CI },
{ "VI", "Iceland", "generic", amd::GPU_Library_HSAIL, VI_ICELAND_M_A0, 0, true, true, FAMILY_VI },
{ "VI", "Tonga", "generic", amd::GPU_Library_HSAIL, VI_TONGA_P_A0, 0, true, true, FAMILY_VI },
UnknownTarget,
UnknownTarget,
UnknownTarget,
UnknownTarget,
UnknownTarget,
InvalidTarget
};
#endif // _CL_UTILS_TARGET_MAPPINGS_HSAIL_0_8_H_
@@ -0,0 +1,32 @@
//
// Copyright (c) 2012 Advanced Micro Devices, Inc. All rights reserved.
//
#ifndef _CL_UTILS_TARGET_MAPPINGS_HSAIL64_0_8_H_
#define _CL_UTILS_TARGET_MAPPINGS_HSAIL64_0_8_H_
#include "inc/asic_reg/si_id.h"
#include "inc/asic_reg/kv_id.h"
#include "inc/asic_reg/ci_id.h"
#include "inc/asic_reg/atiid.h"
static const TargetMapping HSAIL64TargetMapping_0_8[] = {
UnknownTarget,
{ "KV", "Spectre", "generic", amd::GPU_Library_HSAIL, KV_SPECTRE_A0, 0, true, true, FAMILY_KV },
{ "KV", "Spooky", "generic", amd::GPU_Library_HSAIL, KV_SPOOKY_A0, 0, true, true, FAMILY_KV },
{ "KV", "Kalindi", "generic", amd::GPU_Library_HSAIL, KB_KALINDI_A0, 0, true, true, FAMILY_KV },
{ "KV", "Mullins", "generic", amd::GPU_Library_HSAIL, ML_GODAVARI_A0, 0, true, true, FAMILY_KV },
{ "CI", "Bonaire", "generic", amd::GPU_Library_HSAIL, CI_BONAIRE_M_A0, 0, true, false, FAMILY_CI },
{ "CI", "Bonaire", "generic", amd::GPU_Library_HSAIL, CI_BONAIRE_M_A1, 0, true, true, FAMILY_CI },
{ "CI", "Hawaii", "generic", amd::GPU_Library_HSAIL, CI_HAWAII_P_A0, 0, true, true, FAMILY_CI },
{ "VI", "Iceland", "generic", amd::GPU_Library_HSAIL, VI_ICELAND_M_A0, 0, true, true, FAMILY_VI },
{ "VI", "Tonga", "generic", amd::GPU_Library_HSAIL, VI_TONGA_P_A0, 0, true, true, FAMILY_VI },
UnknownTarget,
UnknownTarget,
UnknownTarget,
UnknownTarget,
UnknownTarget,
InvalidTarget
};
#endif // _CL_UTILS_TARGET_MAPPINGS_HSAIL64_0_8_H_
@@ -0,0 +1,46 @@
//
// Copyright (c) 2012 Advanced Micro Devices, Inc. All rights reserved.
//
#ifndef _CL_UTILS_TARGET_MAPPINGS_X64_0_8_H_
#define _CL_UTILS_TARGET_MAPPINGS_X64_0_8_H_
#define CPU_MAPPING_LIB(A, B, C, D, E) { #A, #B, #C, D, 0, E, LP64_SWITCH(false, true), LP64_SWITCH(false, true), FAMILY_X64}
#define CPU_MAPPING(A, B, C, D) CPU_MAPPING_LIB(A, B, C, amd::CPU64_Library_Generic, D)
#define NCPU_MAPPING_LIB(A, B, C, D, E) { #A, #B, #C, D, 0, E, false, false, FAMILY_X64}
#define NCPU_MAPPING(A, B, C, D) { #A, #B, #C, amd::CPU64_Library_Generic, 0, D, false, false, FAMILY_X64}
static const TargetMapping X64TargetMapping_0_8[] = {
UnknownTarget,
CPU_MAPPING(X64, Generic, generic, 0x1),
CPU_MAPPING(NetBurst, Prescott, prescott, 0x1),
CPU_MAPPING(Xeon, Nocona, nocona, 0x1),
CPU_MAPPING(Core, Core2, core2, 0x1),
CPU_MAPPING(Core, Penryn, penryn, 0x1),
CPU_MAPPING(Nehalem, Corei7, corei7, 0x1),
CPU_MAPPING(Nehalem, Nehalem, nehalem, 0x1),
CPU_MAPPING(Nehalem, Westmere, westmere, 0x1),
NCPU_MAPPING_LIB(SandyBridge, Corei7_AVX, sandybridge, amd::CPU64_Library_AVX, 0x2 | 0x1), // LLVM 2.9 only
CPU_MAPPING_LIB(SandyBridge, Corei7_AVX, corei7-avx, amd::CPU64_Library_AVX, 0x2 | 0x1),
CPU_MAPPING(SandyBridge, IvyBridge, core-avx-i, 0x2 | 0x1), // LLVM 3.0
CPU_MAPPING(Haswell, Haswell, core-avx2, 0x4 | 0x2 | 0x1), // LLVM 3.0
CPU_MAPPING(K8, K8, k8, 0x1),
CPU_MAPPING(K8, Opteron, opteron, 0x1),
CPU_MAPPING(K8, Athlon64, athlon64, 0x1),
CPU_MAPPING(K8, AthlonFX, athlon-fx, 0x1),
CPU_MAPPING(K8, K8_SSE3, k8-sse3, 0x1),
CPU_MAPPING(K8, Opteron_SSE3,opteron-sse3, 0x1),
CPU_MAPPING(K8, Athlon64SSE3,athlon64-sse3, 0x1),
CPU_MAPPING(K10, AMDFAM10, amdfam10, 0x1),
NCPU_MAPPING(K10, Barcelona, barcelona, 0x1),
NCPU_MAPPING(K10, Istanbul, istanbul, 0x1),
NCPU_MAPPING(K10, Shanghai, shanghai, 0x1),
CPU_MAPPING(Family14h, Bobcat, btver1, 0x1),
CPU_MAPPING_LIB(Family15h, Bulldozer, bdver1, amd::CPU64_Library_FMA4, 0x8 | 0x1),
CPU_MAPPING_LIB(Family15h, Piledriver, bdver2, amd::CPU64_Library_FMA4, 0x8 | 0x4 | 0x1),
CPU_MAPPING(Atom, Atom, atom, 0x1),
InvalidTarget
};
#undef CPU_MAPPING
#undef NCPU_MAPPING
#undef CPU_MAPPING_LIB
#undef NCPU_MAPPING_LIB
#endif // _CL_UTILS_TARGET_MAPPINGS_X64_0_8_H_
@@ -0,0 +1,73 @@
//
// Copyright (c) 2012 Advanced Micro Devices, Inc. All rights reserved.
//
#ifndef _CL_UTILS_TARGET_MAPPINGS_X86_0_8_H_
#define _CL_UTILS_TARGET_MAPPINGS_X86_0_8_H_
#define CPU_MAPPING_LIB(A, B, C, D, E) { #A, #B, #C, D, 0, E, true, true, FAMILY_X86}
#define CPU_MAPPING(A, B, C, D) CPU_MAPPING_LIB(A, B, C, amd::CPU_Library_Generic, D)
#define NCPU_MAPPING_LIB(A, B, C, D, E) { #A, #B, #C, D, 0, E, false, false, FAMILY_X86}
#define NCPU_MAPPING(A, B, C, D) { #A, #B, #C, amd::CPU_Library_Generic, 0, D, false, false, FAMILY_X86}
static const TargetMapping X86TargetMapping_0_8[] = {
UnknownTarget,
CPU_MAPPING(X86, Generic, generic, 0),
// This has to be specified manually since GCC defines i386 as a macro.
{ "X86", "i386", "i386", amd::CPU_Library_Generic, 0, 0, true, true, FAMILY_X86 },
CPU_MAPPING(X86, i486, i486, 0),
CPU_MAPPING(X86, i586, i586, 0),
CPU_MAPPING(Pentium, Pentium, pentium, 0),
CPU_MAPPING(Pentium_MMX, Pentium_MMX, pentium-mmx, 0),
CPU_MAPPING(X86, i686, i686, 0),
CPU_MAPPING(PentiumPro, PentiumPro, pentiumpro, 0),
CPU_MAPPING(Pentium2, Pentium2, pentium2, 0),
CPU_MAPPING(Pentium3, Pentium3, pentium3, 0),
CPU_MAPPING(Pentium3m, Pentium3m, pentium3m, 0),
CPU_MAPPING(Pentium_M, Pentium_M, pentium-m, 0x1),
CPU_MAPPING(NetBurst, Pentium4, pentium4, 0x1),
CPU_MAPPING(NetBurst, Pentium4m, pentium4m, 0x1),
CPU_MAPPING(Pentium_M, Yonah, yonah, 0x1),
CPU_MAPPING(Pentium4, Prescott, prescott, 0x1),
CPU_MAPPING(Xeon, Nocona, nocona, 0x1),
CPU_MAPPING(Core, Core2, core2, 0x1),
CPU_MAPPING(Core, Penryn, penryn, 0x1),
CPU_MAPPING(Nehalem, Corei7, corei7, 0x1), // Corei3 and Corei5 also
CPU_MAPPING(Nehalem, Nehalem, nehalem, 0x1),
CPU_MAPPING(Nehalem, Westmere, westmere, 0x1),
NCPU_MAPPING_LIB(SandyBridge, Corei7_AVX, sandybridge, amd::CPU64_Library_AVX, 0x2 | 0x1), // LLVM 2.9 only
CPU_MAPPING(SandyBridge, Corei7_AVX, corei7-avx, 0x2 | 0x1), // LLVM 3.0 only
CPU_MAPPING(SandyBridge, IvyBridge, core-avx-i, 0x2 | 0x1), // LLVM 3.0 only
CPU_MAPPING(Haswell, Haswell, core-avx2, 0x4 | 0x2 | 0x1), // LLVM 3.0 only
CPU_MAPPING(K6, K6, k6, 0),
CPU_MAPPING(K6, K6_2, k6-2, 0),
CPU_MAPPING(K6, K6_3, k6-3, 0),
CPU_MAPPING(K7, Athlon, athlon, 0),
CPU_MAPPING(K7, AthlonTBIRD, athlon-tbird, 0),
CPU_MAPPING(K7, Athlon4, athlon-4, 0),
CPU_MAPPING(K7, AthlonXP, athlon-xp, 0),
CPU_MAPPING(K7, AthlonMP, athlon-mp, 0),
CPU_MAPPING(K8, K8, k8, 0x1),
CPU_MAPPING(K8, Opteron, opteron, 0x1),
CPU_MAPPING(K8, Athlon64, athlon64, 0x1),
CPU_MAPPING(K8, AthlonFX, athlon-fx, 0x1),
CPU_MAPPING(K8, K8_SSE3, k8-sse3, 0x1),
CPU_MAPPING(K8, Opteron_SSE3,opteron-sse3, 0x1),
CPU_MAPPING(K8, Athlon64SSE3,athlon64-sse3, 0x1),
CPU_MAPPING(K10, AMDFAM10, amdfam10, 0x1),
NCPU_MAPPING(K10, Barcelona, barcelona, 0x1),
NCPU_MAPPING(K10, Istanbul, istanbul, 0x1),
NCPU_MAPPING(K10, Shanghai, shanghai, 0x1),
CPU_MAPPING(Winchip, Winchip_C6, winchip-c6, 0),
CPU_MAPPING(Winchip, Winchip2, winchip2, 0),
CPU_MAPPING(Via, C3, c3, 0),
CPU_MAPPING(Via, C3_2, c3-2, 0),
CPU_MAPPING(Family14h, Bobcat, btver1, 0x1), // LLVM 3.1 only
CPU_MAPPING_LIB(Family15h, Bulldozer, bdver1, amd::CPU_Library_FMA4, 0x8 | 0x1), // LLVM 3.1 only
CPU_MAPPING_LIB(Family15h, Piledriver, bdver2, amd::CPU_Library_FMA4, 0x8 | 0x4 | 0x1), // LLVM 3.1 only
CPU_MAPPING(Atom, Atom, atom, 0x1), // LLVM 3.1 only
InvalidTarget
};
#undef CPU_MAPPING
#undef NCPU_MAPPING
#undef CPU_MAPPING_LIB
#undef NCPU_MAPPING_LIB
#endif // _CL_UTILS_TARGET_MAPPINGS_X86_0_8_H_
@@ -0,0 +1,53 @@
//
// Copyright (c) 2010 Advanced Micro Devices, Inc. All rights reserved.
//
#ifndef _CL_VERSIONS_HPP_
#define _CL_VERSIONS_HPP_
#include "utils/macros.hpp"
#include "SCLib_Ver.h"
#ifndef AMD_COMPILER_NAME
# define AMD_COMPILER_NAME "AMD COMPILER"
#endif // AMD_COMPILER_NAME
#ifndef AMD_COMPILER_BUILD_NUMBER
# define AMD_COMPILER_BUILD_NUMBER 0
#endif // AMD_COMPILER_BUILD_NUMBER
#ifndef AMD_COMPILER_REVISION_NUMBER
# define AMD_COMPILER_REVISION_NUMBER 0
#endif // AMD_COMPILER_REVISION_NUMBER
#ifndef AMD_SC_COMPILER_REVISION_NUMBER
#define AMD_SC_COMPILER_REVISION_NUMBER SC_BUILD_NUMBER
#endif // AMD_SC_COMPILER_REVISION_NUMBER
#ifndef AMD_COMPILER_MAJOR_VERSION
# define AMD_COMPILER_MAJOR_VERSION 0
#endif // AMD_COMPILER_MAJOR_VERSION
#ifndef AMD_COMPILER_MINOR_VERSION
# define AMD_COMPILER_MINOR_VERSION 8
#endif // AMD_COMPILER_MINOR_VERSION
#ifndef AMD_COMPILER_RELEASE_INFO
# define AMD_COMPILER_RELEASE_INFO
#endif // AMD_COMPILER_RELEASE_INFO
#ifndef AMD_COMPILER_NAME
# define AMD_COMPILER_NAME "AMD Compiler Library"
#endif // AMD_COMPILER_NAME
#define AMD_BUILD_STRING XSTR(AMD_COMPILER_BUILD_NUMBER) \
"." XSTR(AMD_COMPILER_REVISION_NUMBER) "." XSTR(AMD_SC_COMPILER_REVISION_NUMBER)
#ifndef AMD_COMPILER_INFO
# define AMD_COMPILER_INFO "AMD-COMP-LIB-" \
"v" XSTR(AMD_COMPILER_MAJOR_VERSION) "." XSTR(AMD_COMPILER_MINOR_VERSION) \
AMD_COMPILER_RELEASE_INFO DEBUG_ONLY(".dbg") " (" AMD_BUILD_STRING ")"
#endif // AMD_COMPILER_INFO
#endif // _CL_VERSIONS_HPP_