diff --git a/projects/rocr-runtime/include/hsakmt.h b/projects/rocr-runtime/include/hsakmt.h index 9084079882..eb5307e84c 100644 --- a/projects/rocr-runtime/include/hsakmt.h +++ b/projects/rocr-runtime/include/hsakmt.h @@ -610,6 +610,347 @@ hsaKmtDbgAddressWatch( HsaEvent* WatchEvent[] //IN, optional ); +/** + Suspend the execution of a set of queues. A queue that is suspended + allows the context save state to be inspected and modified. If a + queue is already suspended it remains suspended. A suspended queue + can be resumed by hsaKmtDbgQueueResume(). + + If NoGracePeriod is false then the default grace period used for + waiting for waves to complete before context switching is used. If + NoGracePeriod is true then no grace period us used and waves are + context saved as soon as possible. + + If MemFence is true all queues being suspended will perform a + sequentially consistent system scope release that synchronizes with + a sequentially consistent system scope acquire performed by this + call. This ensures any memory updates performed by the suspended + queues are visible to the thread calling this operation. + + Returns: + - HSAKMT_STATUS_SUCCESS if successful. + + - HSAKMT_STATUS_INVALID_HANDLE if any QueueId is invalid. +*/ +HSAKMT_STATUS +HSAKMTAPI +hsaKmtQueueSuspend( + HSAuint32 NumQueues, //IN + HSA_QUEUEID QueueId[], //IN + bool NoGracePeriod, //IN + bool MemFence //IN + ); + +/** + Resume the execution of a set of queues. If a queue is not + suspended by hsaKmtDbgQueueSuspend() then it remains executing. + + If MemFence is true this call will perform a sequentially + consistent system scope release that synchronizes with a + sequentially consistent system scope acquire performed by all + queues being resumed. This ensures any memory updates performed by + the thread calling this operation are visible to the resumed + queues. + + Returns: + - HSAKMT_STATUS_SUCCESS if successful. + + - HSAKMT_STATUS_INVALID_HANDLE if any QueueId is invalid. +*/ +HSAKMT_STATUS +HSAKMTAPI +hsaKmtQueueResume( + HSAuint32 NumQueues, //IN + HSA_QUEUEID QueueId[], //IN + bool MemFence //IN + ); + +/** + Enable debug trap for NodeId. If QueueId is INVALID_QUEUEID then + enable for all queues on NodeId, otherwise enable only for QueueId. + + When debug trap is enabled the trap handler behavior changes + depending on architecture of the node and can include the following: + + - Initialize Trap Temp Registers: All new waves are launched with + specific trap temp registers initialized with: + + - HSA dispatch packet address of the wave. + + - X, Y, Z grid and work-group position of the wave within the + dispatch. + + - The value of TrapData registers. hsaKmtEnableDebugTrap() sets + these to 0 and they can be changed by hsaKmtSetDebugTrapData2(). + + - The scratch backing memory address. + + - Enable wave launch trap override. hsaKmtEnableDebugTrap() sets the + TrapMask to 0 and the TrapOverride to HSA_DBG_TRAP_OVERRIDE_OR and + they can be changed by hsaKmtSetWaveLaunchTrapOverride(). + + If debug trap is already enabled for NodeId, any features controlled + by it are still reset to their default values as defined above. + + Returns: + - HSAKMT_STATUS_SUCCESS if successful. + + - HSAKMT_STATUS_INVALID_HANDLE if: + + - NodeId is invalid + + - QueueId is not INVALID_QUEUE, or is not a valid queue of + NodeId. + + - HSAKMT_STATUS_UNAVAILABLE if debugging is not available to this + process. For example, there may be a limit on number of + processes that can perform debugging at the same time. + + - HSAKMT_STATUS_NOT_SUPPORTED if debug trap is not supported by + NodeId, or if QueueId is not INVALID_QUEUEID and NodeId does not + support per queue enabling. +*/ +HSAKMT_STATUS +HSAKMTAPI +hsaKmtEnableDebugTrap( + HSAuint32 NodeId, //IN + HSA_QUEUEID QueueId //IN + ); + +/** + Disable debug trap enabled by hsaKmtEnableDebugTrap(). If debug trap + is not currently enabled not action is taken. + + Returns: + - HSAKMT_STATUS_SUCCESS if successful. + + - HSAKMT_STATUS_INVALID_HANDLE if NodeId is invalid. + + - HSAKMT_STATUS_NOT_SUPPORTED if debug trap not supported for NodeId. +*/ +HSAKMT_STATUS +HSAKMTAPI +hsaKmtDisableDebugTrap( + HSAuint32 NodeId //IN + ); + +/** + Set the value to use to initialize the TrapData used when + initializing trap temp registers for NodeId when debug trap is enabled. + + An error is returned if debug trap is not currently enabled for + NodeId. Debug trap is enabled by hsaKmtEnableDebugTrap() which + initializes TrapData to 0. + + Returns: + - HSAKMT_STATUS_SUCCESS if successful. + + - HSAKMT_STATUS_NOT_SUPPORTED if debug trap data is not supported + by NodeId. + + - HSAKMT_STATUS_INVALID_HANDLE if NodeId is invalid. + + - HSAKMT_STATUS_INVALID_PARAMETER if TrapDataIndex is larger than + trap-data-count - 1. + + - HSAKMT_STATUS_ERROR if debug trap is not currently enabled by + hsaKmtEnableDebugTrap() for NodeId. +*/ +HSAKMT_STATUS +HSAKMTAPI +hsaKmtSetDebugTrapData2( + HSAuint32 NodeId, //IN + HSAuint32 TrapData0, //IN + HSAuint32 TrapData1 //IN + ); + +/** + Set the trap override mask. When debug trap is enabled by + hsaKmtEnableDebugTrap() each wave launched has its initial + MODE.excp_en register overriden by TrapMask as specified by + TrapOverride. + + An error is returned if debug trap is not currently enabled for + NodeId. Debug trap is enabled by hsaKmtEnableDebugTrap() which + initializes TrapMask to 0 and TrapOverride to + HSA_DBG_TRAP_OVERRIDE_OR. + + Returns: + - HSAKMT_STATUS_SUCCESS if successful. + + - HSAKMT_STATUS_NOT_SUPPORTED if wave launch trap override is not + supported by NodeId. + + - HSAKMT_STATUS_INVALID_HANDLE if NodeId is invalid. + + - HSAKMT_STATUS_INVALID_PARAMETER if TrapOverride is invalid. + + - HSAKMT_STATUS_ERROR if debug trap is not currently enabled by + hsaKmtEnableDebugTrap() for NodeId. +*/ +HSAKMT_STATUS +HSAKMTAPI +hsaKmtSetWaveLaunchTrapOverride( + HSAuint32 NodeId, //IN + HSA_DBG_TRAP_OVERRIDE TrapOverride, //IN + HSA_DBG_TRAP_MASK TrapMask //IN + ); + +/** + Set the mode in which all future waves will be launched for + NodeId. + + Returns: + - HSAKMT_STATUS_SUCCESS if successful. + + - HSAKMT_STATUS_UNAVAILABLE if debugging is not available to this + process. For example, there may be a limit on number of + processes that can perform debugging at the same time. + + - HSAKMT_STATUS_NOT_SUPPORTED if the WaveLaunchMode requested is + not supported by the NodeId. Different implementations and + different nodes within an implementation can support different + sets of launch modes. Only HSA_DBG_WAVE_LAUNCH_MODE_NORMAL mode + is supported by all. + + - HSAKMT_STATUS_INVALID_HANDLE if NodeId is not a valid node. + + - HSAKMT_STATUS_INVALID_PARAMETER if WaveLaunchMode is not a valid + value. +*/ +HSAKMT_STATUS +HSAKMTAPI +hsaKmtSetWaveLaunchMode( + HSAuint32 NodeId, //IN + HSA_DBG_WAVE_LAUNCH_MODE WaveLaunchMode //IN + ); + +/** + Set a debug memory access watch point. A memory access of the kind + specified by WatchMode to an matching address will cause the trap + handler to be entered. An address matches if, after ANDing the + watch-addr-mask-lo..watch-addr-mask-hi bits of WatchAddrMask, it + equals the WatchAddress with the bottom watch-addr-mask-lo bits + cleared. + + WatchId will be in the range 0 to watch-count - 1. The WatchId + value will match the address watch exception reported to the trap + handler. + + hsaKmtGetNodeProperties() can be used to obtain HsaNodeProperties. + watch-addr-mask-lo and watch-addr-mask-hi can be obtained from + HsaNodeProperties.Capabilities.WatchAddrMaskLoBit and + HsaNodeProperties.Capabilities.WatchAddrMaskHiBit respectively. + watch-count can be obtained from + 2^HsaNodeProperties.Capabilities.WatchPointsTotalBits. + + To cause debug memory address watch points to be reported to the + trap handler the address watch exception must be enabled. This can + be accomplished by using hsaKmtSetWaveLaunchTrapOverride() with a + TrapMask that includes HSA_DBG_TRAP_MASK_DBG_ADDRESS_WATCH. + + Returns: + - HSAKMT_STATUS_SUCCESS if successful. + + - HSAKMT_STATUS_NOT_SUPPORTED if debug memory watch points are + not supported for NodeId. + + - HSAKMT_STATUS_UNAVAILABLE if debugging is not available to this + process. For example, there may be a limit on number of + processes that can perform debugging at the same time. + + - HSAKMT_STATUS_INVALID_HANDLE if NodeId or WatchId* is invalid. + + - HSAKMT_STATUS_INVALID_PARAMETER if: + + - WatchAddrMask contains non-0 bits outside the inclusive range + watch-addr-mask-lo to watch-addr-mask-hi. + + - If WatchAddress contain non-0 bits in the inclusive range 0 to + watch-addr-mask-lo. + + - If WatchMode is not one of the values of HSA_DBG_WATCH_MODE. + + - WatchId is NULL. + + - HSAKMT_STATUS_OUT_OF_RESOURCES if no more watch points are + available to set currently. +*/ +HSAKMT_STATUS +HSAKMTAPI +hsaKmtSetAddressWatch( + HSAuint32 NodeId, //IN + HSA_DBG_WATCH_MODE WatchMode, //IN + void* WatchAddress, //IN + HSAuint64 WatchAddrMask, //IN + HSAuint32* WatchId //OUT + ); + +/** + Clear a debug memory access watch point set by + hsaKmtSetAddressWatch(). + + Returns: + - HSAKMT_STATUS_SUCCESS if successful. + + - HSAKMT_STATUS_NOT_SUPPORTED if debug memory watch points are + not supported for NodeId. + + - HSAKMT_STATUS_INVALID_HANDLE if NodeId is invalid or WatchId is not valid for this + NodeId. +*/ +HSAKMT_STATUS +HSAKMTAPI +hsaKmtClearAddressWatch( + HSAuint32 NodeId, //IN + HSAuint32 WatchId //IN + ); + +/** + Enable precise memory operations. + + When precise memory operations are enabled a wave waits for each + memory operation to complete before executing further + operations. This results in more precise reporting of memory related + events such as memory violation or address watch points. + + Returns: + - HSAKMT_STATUS_SUCCESS if successful. + + - HSAKMT_STATUS_UNAVAILABLE if precise memory operations is not + available to this process. For example, the feature may require + specific privileges. + + - HSAKMT_STATUS_NOT_SUPPORTED if precise memory operations is not + supported by NodeId. + + - HSAKMT_STATUS_INVALID_HANDLE if NodeId is invalid. +*/ +HSAKMT_STATUS +HSAKMTAPI +hsaKmtEnablePreciseMemoryOperations( + HSAuint32 NodeId //IN + ); + +/** + Disable precise memory operations enabled by + hsaKmtEnablePreciseMemoryOperations(). If precise memory operations + are not currently enabled no action is taken. + + Returns: + - HSAKMT_STATUS_SUCCESS if successful. + + - HSAKMT_STATUS_INVALID_HANDLE if NodeId is invalid. + + - HSAKMT_STATUS_NOT_SUPPORTED if precise memory operations is not + supported by NodeId. +*/ +HSAKMT_STATUS +HSAKMTAPI +hsaKmtDisablePreciseMemoryOperations( + HSAuint32 NodeId //IN + ); + /** Gets GPU and CPU clock counters for particular Node */ diff --git a/projects/rocr-runtime/include/hsakmttypes.h b/projects/rocr-runtime/include/hsakmttypes.h index 107703e20d..c43e48911e 100644 --- a/projects/rocr-runtime/include/hsakmttypes.h +++ b/projects/rocr-runtime/include/hsakmttypes.h @@ -72,6 +72,8 @@ extern "C" { typedef void* HSA_HANDLE; typedef HSAuint64 HSA_QUEUEID; +// An HSA_QUEUEID that is never a valid queue ID. +#define INVALID_QUEUEID 0xFFFFFFFFFFFFFFFFULL // This is included in order to force the alignments to be 4 bytes so that // it avoids extra padding added by the compiler when a 64-bit binary is generated. @@ -97,13 +99,14 @@ typedef enum _HSAKMT_STATUS HSAKMT_STATUS_NOT_IMPLEMENTED = 10, // KFD function is not implemented for this set of paramters HSAKMT_STATUS_NOT_SUPPORTED = 11, // KFD function is not supported on this node HSAKMT_STATUS_UNAVAILABLE = 12, // KFD function is not available currently on this node (but - // may be at a later time) + // may be at a later time) + HSAKMT_STATUS_OUT_OF_RESOURCES = 13, // KFD function request exceeds the resources currently available. HSAKMT_STATUS_KERNEL_IO_CHANNEL_NOT_OPENED = 20, // KFD driver path not opened HSAKMT_STATUS_KERNEL_COMMUNICATION_ERROR = 21, // user-kernel mode communication failure HSAKMT_STATUS_KERNEL_ALREADY_OPENED = 22, // KFD driver path already opened HSAKMT_STATUS_HSAMMU_UNAVAILABLE = 23, // ATS/PRI 1.1 (Address Translation Services) not available - // (IOMMU driver not installed or not-available) + // (IOMMU driver not installed or not-available) HSAKMT_STATUS_WAIT_FAILURE = 30, // The wait operation failed HSAKMT_STATUS_WAIT_TIMEOUT = 31, // The wait operation timed out @@ -190,13 +193,20 @@ typedef union unsigned int VALimit : 1; // This node GPU has limited VA range for platform // (typical 40bit). Affects shared VM use for 64bit apps unsigned int WatchPointsSupported: 1; // Indicates if Watchpoints are available on the node. - unsigned int WatchPointsTotalBits: 4; // ld(Watchpoints) available. To determine the number use 2^value + unsigned int WatchPointsTotalBits: 4; // Watchpoints available. To determine the number use 2^value unsigned int DoorbellType : 2; // 0: This node has pre-1.0 doorbell characteristic // 1: This node has 1.0 doorbell characteristic // 2,3: reserved for future use - unsigned int AQLQueueDoubleMap : 1; // The unit needs a VA “double map” - unsigned int Reserved : 17; + unsigned int AQLQueueDoubleMap : 1; // The unit needs a VA “double map” + unsigned int WatchAddrMaskLoBit : 4; // Only bits WatchAddrMaskLoBit..WatchAddrMaskHiBit of the + unsigned int WatchAddrMaskHiBit : 6; // watch address mask are used. 0 is the least significant bit. + unsigned int DebugTrapSupported : 1; // Indicates if Debug Trap is supported on the node. + unsigned int TrapDataCount : 2; // Number of 32 bit TrapData registers supported. + unsigned int WaveLaunchTrapOverrideSupported: 1; // Indicates if Wave Launch Trap Override is supported on the node. + unsigned int WaveLaunchModeSupported: 1; // Indicates if Wave Launch Mode is supported on the node. + unsigned int PreciseMemoryOperationsSupported: 1; // Indicates if Precise Memory Operations are supported on the node. + unsigned int Reserved : 1; } ui32; } HSA_CAPABILITY; @@ -690,10 +700,44 @@ typedef enum _HSA_DBG_WATCH_MODE HSA_DBG_WATCH_NONREAD = 1, //Write or Atomic operations only HSA_DBG_WATCH_ATOMIC = 2, //Atomic Operations only HSA_DBG_WATCH_ALL = 3, //Read, Write or Atomic operations - HSA_DBG_WATCH_NUM, - HSA_DBG_WATCH_SIZE = 0xFFFFFFFF + HSA_DBG_WATCH_NUM } HSA_DBG_WATCH_MODE; +typedef enum _HSA_DBG_TRAP_OVERRIDE +{ + HSA_DBG_TRAP_OVERRIDE_OR = 0, // Bitwise OR exception mask with HSA_DBG_TRAP_MASK + HSA_DBG_TRAP_OVERRIDE_REPLACE = 1, // Replace exception mask with HSA_DBG_TRAP_MASK + HSA_DBG_TRAP_OVERRIDE_NUM +} HSA_DBG_TRAP_OVERRIDE; + +typedef enum _HSA_DBG_TRAP_MASK +{ + HSA_DBG_TRAP_MASK_FP_INVALID = 1, // Floating point invalid operation + HSA_DBG_TRAP_MASK_FP_INPUT_DENOMAL = 2, // Floating point input denormal + HSA_DBG_TRAP_MASK_FP_DIVIDE_BY_ZERO = 4, // Floating point divide by zero + HSA_DBG_TRAP_MASK_FP_OVERFLOW = 8, // Floating point overflow + HSA_DBG_TRAP_MASK_FP_UNDERFLOW = 16, // Floating point underflow + HSA_DBG_TRAP_MASK_FP_INEXACT = 32, // Floating point inexact + HSA_DBG_TRAP_MASK_INT_DIVIDE_BY_ZERO = 64, // Integer divide by zero + HSA_DBG_TRAP_MASK_DBG_ADDRESS_WATCH = 128, // Debug address watch + HSA_DBG_TRAP_MASK_DBG_MEMORY_VIOLATION = 256 // Memory violation +} HSA_DBG_TRAP_MASK; + +typedef enum _HSA_DBG_WAVE_LAUNCH_MODE +{ + HSA_DBG_WAVE_LAUNCH_MODE_NORMAL = 0, // Wavefront launched normally. + HSA_DBG_WAVE_LAUNCH_MODE_HALT = 1, // Wavefront launched in halted mode. + HSA_DBG_WAVE_LAUNCH_MODE_KILL = 2, // Wavefront is launched but immediately + // terminated before executing any instructions. + HSA_DBG_WAVE_LAUNCH_MODE_SINGLE_STEP = 3, // Wavefront is launched in single step (debug) + // mode. If debug trap is enabled by + // hsaKmtDbgEnableDebugTrap() then causes a + // trap after executing each instruction, + // otherwise behaves the same as + // HSA_DBG_WAVE_LAUNCH_MODE_NORMAL. + HSA_DBG_WAVE_LAUNCH_MODE_DISABLE = 4, // Disable launching any new waves. + HSA_DBG_WAVE_LAUNCH_MODE_NUM +} HSA_DBG_WAVE_LAUNCH_MODE; //This structure is hardware specific and may change in the future typedef struct _HsaDbgWaveMsgAMDGen2 diff --git a/projects/rocr-runtime/include/linux/kfd_ioctl.h b/projects/rocr-runtime/include/linux/kfd_ioctl.h index fdedc63c30..4597e045f8 100644 --- a/projects/rocr-runtime/include/linux/kfd_ioctl.h +++ b/projects/rocr-runtime/include/linux/kfd_ioctl.h @@ -186,6 +186,37 @@ struct kfd_ioctl_dbg_wave_control_args { __u32 buf_size_in_bytes; /*including gpu_id and buf_size */ }; +/* KFD_IOC_DBG_TRAP_ENABLE: + * data1: 0=disable, 1=enable + * data2: queue ID (for future use) + */ +#define KFD_IOC_DBG_TRAP_ENABLE 0 + +/* KFD_IOC_DBG_TRAP_SET_TRAP_DATA: + * data1: SPI_GDBG_TRAP_DATA0 + * data2: SPI_GDBG_TRAP_DATA1 + */ +#define KFD_IOC_DBG_TRAP_SET_TRAP_DATA 1 + +/* KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE: + * data1: override mode: 0=OR, 1=REPLACE + * data2: mask + */ +#define KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE 2 + +/* KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE: + * data1: 0=normal, 1=halt, 2=kill, 3=singlestep, 4=disable + * data2: unused + */ +#define KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE 3 + +struct kfd_ioctl_dbg_trap_args { + __u32 gpu_id; /* to KFD */ + __u32 op; /* to KFD */ + __u32 data1; /* to KFD */ + __u32 data2; /* to KFD */ +}; + /* Matching HSA_EVENTTYPE */ #define KFD_IOC_EVENT_SIGNAL 0 #define KFD_IOC_EVENT_NODECHANGE 1 @@ -547,7 +578,10 @@ struct kfd_ioctl_cross_memory_copy_args { #define AMDKFD_IOC_CROSS_MEMORY_COPY \ AMDKFD_IOWR(0x20, struct kfd_ioctl_cross_memory_copy_args) +#define AMDKFD_IOC_DBG_TRAP \ + AMDKFD_IOW(0x21, struct kfd_ioctl_dbg_trap_args) + #define AMDKFD_COMMAND_START 0x01 -#define AMDKFD_COMMAND_END 0x21 +#define AMDKFD_COMMAND_END 0x22 #endif diff --git a/projects/rocr-runtime/src/debug.c b/projects/rocr-runtime/src/debug.c index 34dcc8970c..fc32b925d8 100644 --- a/projects/rocr-runtime/src/debug.c +++ b/projects/rocr-runtime/src/debug.c @@ -267,3 +267,90 @@ int debug_get_reg_status(uint32_t node_id, bool *is_debugged) *is_debugged = is_device_debugged[node_id]; return 0; } + +static HSAKMT_STATUS debug_trap(HSAuint32 NodeId, + HSAuint32 op, + HSAuint32 data1, + HSAuint32 data2) +{ + uint32_t gpu_id; + HSAKMT_STATUS result; + HsaNodeProperties NodeProperties = {0}; + struct kfd_ioctl_dbg_trap_args args = {0}; + + CHECK_KFD_OPEN(); + + if (validate_nodeid(NodeId, &gpu_id) != HSAKMT_STATUS_SUCCESS) + return HSAKMT_STATUS_INVALID_HANDLE; + + result = hsaKmtGetNodeProperties(NodeId, &NodeProperties); + + if (result != HSAKMT_STATUS_SUCCESS) + return result; + + if (!NodeProperties.Capability.ui32.DebugTrapSupported) + return HSAKMT_STATUS_NOT_SUPPORTED; + + memset(&args, 0x00, sizeof(args)); + args.gpu_id = gpu_id; + args.op = op; + args.data1 = data1; + args.data2 = data2; + + long err = kmtIoctl(kfd_fd, AMDKFD_IOC_DBG_TRAP, &args); + + if (err == 0) + result = HSAKMT_STATUS_SUCCESS; + else + result = HSAKMT_STATUS_ERROR; + + return result; +} + +HSAKMT_STATUS HSAKMTAPI hsaKmtEnableDebugTrap(HSAuint32 NodeId, + HSA_QUEUEID QueueId) +{ + if (QueueId != INVALID_QUEUEID) + return HSAKMT_STATUS_NOT_SUPPORTED; + + return debug_trap(NodeId, KFD_IOC_DBG_TRAP_ENABLE, 1, QueueId); +} + +HSAKMT_STATUS HSAKMTAPI hsaKmtDisableDebugTrap(HSAuint32 NodeId) +{ + return debug_trap(NodeId, KFD_IOC_DBG_TRAP_ENABLE, 0, 0); +} + +HSAKMT_STATUS HSAKMTAPI hsaKmtSetDebugTrapData2(HSAuint32 NodeId, + HSAuint32 TrapData0, + HSAuint32 TrapData1) +{ + return debug_trap(NodeId, + KFD_IOC_DBG_TRAP_SET_TRAP_DATA, + TrapData0, + TrapData1); +} + +HSAKMT_STATUS HSAKMTAPI hsaKmtSetWaveLaunchTrapOverride( + HSAuint32 NodeId, + HSA_DBG_TRAP_OVERRIDE TrapOverride, + HSA_DBG_TRAP_MASK TrapMask) +{ + if (TrapOverride >= HSA_DBG_TRAP_OVERRIDE_NUM) + return HSAKMT_STATUS_INVALID_PARAMETER; + + return debug_trap(NodeId, + KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE, + TrapOverride, + TrapMask); +} + +HSAKMT_STATUS HSAKMTAPI hsaKmtSetWaveLaunchMode( + HSAuint32 NodeId, + HSA_DBG_WAVE_LAUNCH_MODE WaveLaunchMode) +{ + return debug_trap(NodeId, + KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE, + WaveLaunchMode, + 0); +} diff --git a/projects/rocr-runtime/src/libhsakmt.ver b/projects/rocr-runtime/src/libhsakmt.ver index 436e33bf8c..91b7721764 100644 --- a/projects/rocr-runtime/src/libhsakmt.ver +++ b/projects/rocr-runtime/src/libhsakmt.ver @@ -56,6 +56,11 @@ hsaKmtGetTileConfig; hsaKmtQueryPointerInfo; hsaKmtSetMemoryUserData; hsaKmtGetQueueInfo; +hsaKmtEnableDebugTrap; +hsaKmtDisableDebugTrap; +hsaKmtSetDebugTrapData2; +hsaKmtSetWaveLaunchTrapOverride; +hsaKmtSetWaveLaunchMode; local: *; };