libhsakmt: Update kfd_ioctl.h
Import the latest version from the kernel tree. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Change-Id: If5f998ad55085ebd5020adaa382181204d834e3e
このコミットが含まれているのは:
Felix Kuehling
+99
-12
@@ -32,9 +32,11 @@
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* - 1.4 - Indicate new SRAM EDC bit in device properties
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* - 1.5 - Add SVM API
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* - 1.6 - Query clear flags in SVM get_attr API
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* - 1.7 - Checkpoint Restore (CRIU) API
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* - 1.8 - CRIU - Support for SDMA transfers with GTT BOs
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*/
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#define KFD_IOCTL_MAJOR_VERSION 1
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#define KFD_IOCTL_MINOR_VERSION 6
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#define KFD_IOCTL_MINOR_VERSION 8
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/*
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* Debug revision change log
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@@ -65,9 +67,13 @@
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* 8.0 - Expand runtime information given to the debugger
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* 8.1 - Allow the debugger to set the exception mask
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* 9.0 - Handle multiple exceptions from single trap signal
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* 10.0 - Query debug event returns both queue_id and gpu_id
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* 10.1 - Add additional debug capability information
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* 10.2 - Reserved
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* 10.3 - Pass context_save_restore_area size to user-space
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*/
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#define KFD_IOCTL_DBG_MAJOR_VERSION 9
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#define KFD_IOCTL_DBG_MINOR_VERSION 0
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#define KFD_IOCTL_DBG_MAJOR_VERSION 10
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#define KFD_IOCTL_DBG_MINOR_VERSION 3
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struct kfd_ioctl_get_version_args {
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__u32 major_version; /* from KFD */
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@@ -141,7 +147,8 @@ struct kfd_queue_snapshot_entry {
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__u32 gpu_id;
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__u32 ring_size;
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__u32 queue_type;
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__u32 reserved[18];
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__u32 ctx_save_restore_area_size;
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__u32 reserved[17];
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};
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struct kfd_dbg_device_info_entry {
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@@ -261,6 +268,7 @@ struct kfd_ioctl_dbg_wave_control_args {
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#define KFD_INVALID_GPUID 0xffffffff
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#define KFD_INVALID_QUEUEID 0xffffffff
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#define KFD_INVALID_FD 0xffffffff
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enum kfd_dbg_trap_override_mode {
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KFD_DBG_TRAP_OVERRIDE_OR = 0,
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@@ -442,8 +450,8 @@ struct kfd_runtime_info {
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/* KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT:
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* exception_mask: exception to clear (IN) on query and report (OUT)
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* ptr: unused
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* data1: source id (OUT)
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* data2: unused
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* data1: queue id (OUT)
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* data2: gpu id (OUT)
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* data3: unused
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* data4: unused
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*
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@@ -838,6 +846,7 @@ enum kfd_smi_event {
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};
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#define KFD_SMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1))
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#define KFD_SMI_EVENT_MSG_SIZE 96
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struct kfd_ioctl_smi_events_args {
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__u32 gpuid; /* to KFD */
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@@ -919,6 +928,81 @@ struct kfd_ioctl_spm_args {
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__u32 has_data_loss;
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};
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/**************************************************************************************************
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* CRIU IOCTLs (Checkpoint Restore In Userspace)
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*
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* When checkpointing a process, the userspace application will perform:
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* 1. PROCESS_INFO op to determine current process information. This pauses execution and evicts
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* all the queues.
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* 2. CHECKPOINT op to checkpoint process contents (BOs, queues, events, svm-ranges)
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* 3. UNPAUSE op to un-evict all the queues
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*
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* When restoring a process, the CRIU userspace application will perform:
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*
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* 1. RESTORE op to restore process contents
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* 2. RESUME op to start the process
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*
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* Note: Queues are forced into an evicted state after a successful PROCESS_INFO. User
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* application needs to perform an UNPAUSE operation after calling PROCESS_INFO.
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*/
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enum kfd_criu_op {
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KFD_CRIU_OP_PROCESS_INFO,
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KFD_CRIU_OP_CHECKPOINT,
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KFD_CRIU_OP_UNPAUSE,
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KFD_CRIU_OP_RESTORE,
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KFD_CRIU_OP_RESUME,
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};
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/**
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* kfd_ioctl_criu_args - Arguments perform CRIU operation
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* @devices: [in/out] User pointer to memory location for devices information.
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* This is an array of type kfd_criu_device_bucket.
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* @bos: [in/out] User pointer to memory location for BOs information
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* This is an array of type kfd_criu_bo_bucket.
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* @priv_data: [in/out] User pointer to memory location for private data
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* @priv_data_size: [in/out] Size of priv_data in bytes
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* @num_devices: [in/out] Number of GPUs used by process. Size of @devices array.
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* @num_bos [in/out] Number of BOs used by process. Size of @bos array.
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* @num_objects: [in/out] Number of objects used by process. Objects are opaque to
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* user application.
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* @pid: [in/out] PID of the process being checkpointed
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* @op [in] Type of operation (kfd_criu_op)
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*
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* Return: 0 on success, -errno on failure
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*/
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struct kfd_ioctl_criu_args {
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__u64 devices; /* Used during ops: CHECKPOINT, RESTORE */
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__u64 bos; /* Used during ops: CHECKPOINT, RESTORE */
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__u64 priv_data; /* Used during ops: CHECKPOINT, RESTORE */
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__u64 priv_data_size; /* Used during ops: PROCESS_INFO, RESTORE */
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__u32 num_devices; /* Used during ops: PROCESS_INFO, RESTORE */
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__u32 num_bos; /* Used during ops: PROCESS_INFO, RESTORE */
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__u32 num_objects; /* Used during ops: PROCESS_INFO, RESTORE */
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__u32 pid; /* Used during ops: PROCESS_INFO, RESUME */
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__u32 op;
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};
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struct kfd_criu_device_bucket {
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__u32 user_gpu_id;
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__u32 actual_gpu_id;
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__u32 drm_fd;
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__u32 pad;
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};
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struct kfd_criu_bo_bucket {
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__u64 addr;
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__u64 size;
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__u64 offset;
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__u64 restored_offset; /* During restore, updated offset for BO */
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__u32 gpu_id; /* This is the user_gpu_id */
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__u32 alloc_flags;
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__u32 dmabuf_fd;
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__u32 pad;
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};
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/* CRIU IOCTLs - END */
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/**************************************************************************************************/
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/* Register offset inside the remapped mmio page
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*/
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enum kfd_mmio_remap {
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@@ -1094,7 +1178,7 @@ struct kfd_ioctl_svm_args {
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__u32 op;
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__u32 nattr;
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/* Variable length array of attributes */
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struct kfd_ioctl_svm_attribute attrs[0];
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struct kfd_ioctl_svm_attribute attrs[];
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};
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/**
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@@ -1177,16 +1261,16 @@ struct kfd_ioctl_set_xnack_mode_args {
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#define AMDKFD_IOC_WAIT_EVENTS \
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AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args)
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#define AMDKFD_IOC_DBG_REGISTER \
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#define AMDKFD_IOC_DBG_REGISTER_DEPRECATED \
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AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args)
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#define AMDKFD_IOC_DBG_UNREGISTER \
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#define AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED \
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AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args)
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#define AMDKFD_IOC_DBG_ADDRESS_WATCH \
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#define AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED \
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AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args)
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#define AMDKFD_IOC_DBG_WAVE_CONTROL \
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#define AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED \
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AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args)
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#define AMDKFD_IOC_SET_SCRATCH_BACKING_VA \
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@@ -1240,8 +1324,11 @@ struct kfd_ioctl_set_xnack_mode_args {
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#define AMDKFD_IOC_SET_XNACK_MODE \
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AMDKFD_IOWR(0x21, struct kfd_ioctl_set_xnack_mode_args)
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#define AMDKFD_IOC_CRIU_OP \
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AMDKFD_IOWR(0x22, struct kfd_ioctl_criu_args)
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#define AMDKFD_COMMAND_START 0x01
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#define AMDKFD_COMMAND_END 0x22
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#define AMDKFD_COMMAND_END 0x23
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/* non-upstream ioctls */
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#define AMDKFD_IOC_IPC_IMPORT_HANDLE \
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