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Apply constexpr on global constant varaibles

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When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.

Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef
This commit is contained in:
Tao Sang
2020-07-14 20:10:24 -04:00
committato da Tao Sang
parent 2800fc2fa3
commit fdef6f722f
62 ha cambiato i file con 224 aggiunte e 227 eliminazioni
Scarica il file Patch Scarica il file Diff Expand all files Collapse all files
rocclr/device/gpu/gpublit.cpp
+2 -2
Vedi File
@@ -766,7 +766,7 @@ struct FormatConvertion {
};
// The list of rejected data formats and corresponding conversion
static const FormatConvertion RejectedData[] = {
static constexpr FormatConvertion RejectedData[] = {
{CL_UNORM_INT8, CL_UNSIGNED_INT8}, {CL_UNORM_INT16, CL_UNSIGNED_INT16},
{CL_SNORM_INT8, CL_UNSIGNED_INT8}, {CL_SNORM_INT16, CL_UNSIGNED_INT16},
{CL_HALF_FLOAT, CL_UNSIGNED_INT16}, {CL_FLOAT, CL_UNSIGNED_INT32},
@@ -774,7 +774,7 @@ static const FormatConvertion RejectedData[] = {
{CL_UNORM_INT_101010, CL_UNSIGNED_INT8}, {CL_SIGNED_INT32, CL_UNSIGNED_INT32}};
// The list of rejected channel's order and corresponding conversion
static const FormatConvertion RejectedOrder[] = {
static constexpr FormatConvertion RejectedOrder[] = {
{CL_A, CL_R}, {CL_RA, CL_RG}, {CL_LUMINANCE, CL_R}, {CL_INTENSITY, CL_R},
{CL_RGB, CL_RGBA}, {CL_BGRA, CL_RGBA}, {CL_ARGB, CL_RGBA}, {CL_sRGB, CL_RGBA},
{CL_sRGBx, CL_RGBA}, {CL_sRGBA, CL_RGBA}, {CL_sBGRA, CL_RGBA}};
rocclr/device/gpu/gpublit.hpp
+4 -4
Vedi File
@@ -157,7 +157,7 @@ class DmaBlitManager : public device::HostBlitManager {
) const;
protected:
const static uint MaxPinnedBuffers = 4;
static constexpr uint MaxPinnedBuffers = 4;
//! Synchronizes the blit operations if necessary
inline void synchronize() const;
@@ -365,8 +365,8 @@ class KernelBlitManager : public DmaBlitManager {
) const;
private:
static const size_t MaxXferBuffers = 2;
static const uint TransferSplitSize = 3;
static constexpr size_t MaxXferBuffers = 2;
static constexpr uint TransferSplitSize = 3;
//! Copies a buffer object to an image object
bool copyBufferToImageKernel(device::Memory& srcMemory, //!< Source memory object
@@ -413,7 +413,7 @@ class KernelBlitManager : public DmaBlitManager {
amd::Monitor* lockXferOps_; //!< Lock transfer operation
};
static const char* BlitName[KernelBlitManager::BlitTotal] = {
static constexpr const char* BlitName[KernelBlitManager::BlitTotal] = {
"copyImage", "copyImage1DA", "copyImageToBuffer",
"copyBufferToImage", "copyBufferRect", "copyBufferRectAligned",
"copyBuffer", "copyBufferAligned", "fillBuffer",
rocclr/device/gpu/gpuconstbuf.hpp
+1 -1
Vedi File
@@ -30,7 +30,7 @@ namespace gpu {
class ConstBuffer : public Memory {
public:
//! Vector size of the constant buffer
static const size_t VectorSize = 16;
static constexpr size_t VectorSize = 16;
//! Constructor for the ConstBuffer class
ConstBuffer(VirtualGPU& gpu, //!< Virtual GPU device object
rocclr/device/gpu/gpudebugger.hpp
+1 -1
Vedi File
@@ -29,7 +29,7 @@
#include "device/hwdebug.hpp"
#include "acl.h"
static const int NumberReserveVgprs = 4;
static constexpr int NumberReserveVgprs = 4;
namespace gpu {
rocclr/device/gpu/gpudefs.hpp
+32 -32
Vedi File
@@ -41,44 +41,44 @@ extern bool getFuncInfoFromImage(CALimage image, CALfuncInfo* pFuncInfo);
namespace gpu {
//! Maximum number of the supported global atomic counters
const static uint MaxAtomicCounters = 8;
static constexpr uint MaxAtomicCounters = 8;
//! Maximum number of the supported samplers
const static uint MaxSamplers = 16;
static constexpr uint MaxSamplers = 16;
//! Maximum number of supported read images
const static uint MaxReadImage = 128;
static constexpr uint MaxReadImage = 128;
//! Maximum number of supported write images
const static uint MaxWriteImage = 8;
static constexpr uint MaxWriteImage = 8;
//! Maximum number of supported read/write images for OCL20
const static uint MaxReadWriteImage = 64;
static constexpr uint MaxReadWriteImage = 64;
//! Maximum number of supported constant arguments
const static uint MaxConstArguments = 8;
static constexpr uint MaxConstArguments = 8;
//! Maximum number of supported kernel UAV arguments
const static uint MaxUavArguments = 1024;
static constexpr uint MaxUavArguments = 1024;
//! Maximum number of pixels for a 1D image created from a buffer
const static size_t MaxImageBufferSize = 1 << 27;
static constexpr size_t MaxImageBufferSize = 1 << 27;
//! Maximum number of pixels for a 1D image created from a buffer
const static size_t MaxImageArraySize = 2048;
static constexpr size_t MaxImageArraySize = 2048;
//! Maximum number of supported constant buffers
const static uint MaxConstBuffers = MaxConstArguments + 8;
static constexpr uint MaxConstBuffers = MaxConstArguments + 8;
//! Maximum number of constant buffers for arguments
const static uint MaxConstBuffersArguments = 2;
static constexpr uint MaxConstBuffersArguments = 2;
//! Define offline CAL implementation
const static uint CalOfflineImpl = 0xffffffff;
static constexpr uint CalOfflineImpl = 0xffffffff;
//! Alignment restriciton for the pinned memory
const static size_t PinnedMemoryAlignment = 4 * Ki;
static constexpr size_t PinnedMemoryAlignment = 4 * Ki;
//! HSA path specific defines for images
const static uint HsaImageObjectSize = 48;
const static uint HsaImageObjectAlignment = 16;
const static uint HsaSamplerObjectSize = 32;
const static uint HsaSamplerObjectAlignment = 16;
static constexpr uint HsaImageObjectSize = 48;
static constexpr uint HsaImageObjectAlignment = 16;
static constexpr uint HsaSamplerObjectSize = 32;
static constexpr uint HsaSamplerObjectAlignment = 16;
//! HSA path specific defines for images
const static uint DeviceQueueMaskSize = 32;
static constexpr uint DeviceQueueMaskSize = 32;
//! Defines all supported ASIC families
enum AsicFamilies { Family7xx, Family8xx, FamilyTotal };
@@ -97,7 +97,7 @@ struct AMDDeviceInfo {
};
static const AMDDeviceInfo DeviceInfo[] = {
static constexpr AMDDeviceInfo DeviceInfo[] = {
// Machine targetName machineTarget
/* CAL_TARGET_600 */ {ED_ATI_CAL_MACHINE_R600_ISA, "", "", 0, 0, 0, 0, 0, 0, 0},
/* CAL_TARGET_610 */ {ED_ATI_CAL_MACHINE_R610_ISA, "", "", 0, 0, 0, 0, 0, 0, 0},
@@ -199,17 +199,17 @@ enum gfx_handle {
gfx906 = 906
};
static const char* Gfx700 = "amdgcn-amd-amdhsa--gfx700";
static const char* Gfx701 = "amdgcn-amd-amdhsa--gfx701";
static const char* Gfx800 = "amdgcn-amd-amdhsa--gfx800";
static const char* Gfx801 = "amdgcn-amd-amdhsa--gfx801+xnack";
static const char* Gfx804 = "amdgcn-amd-amdhsa--gfx804";
static const char* Gfx810 = "amdgcn-amd-amdhsa--gfx810+xnack";
static const char* Gfx900 = "amdgcn-amd-amdhsa--gfx900";
static const char* Gfx902 = "amdgcn-amd-amdhsa--gfx902+xnack";
static const char* Gfx903 = "amdgcn-amd-amdhsa--gfx902"; // NOTE: gfx903 is gfx902 with xnack
static const char* Gfx904 = "amdgcn-amd-amdhsa--gfx904";
static const char* Gfx906 = "amdgcn-amd-amdhsa--gfx906";
static constexpr const char* Gfx700 = "amdgcn-amd-amdhsa--gfx700";
static constexpr const char* Gfx701 = "amdgcn-amd-amdhsa--gfx701";
static constexpr const char* Gfx800 = "amdgcn-amd-amdhsa--gfx800";
static constexpr const char* Gfx801 = "amdgcn-amd-amdhsa--gfx801+xnack";
static constexpr const char* Gfx804 = "amdgcn-amd-amdhsa--gfx804";
static constexpr const char* Gfx810 = "amdgcn-amd-amdhsa--gfx810+xnack";
static constexpr const char* Gfx900 = "amdgcn-amd-amdhsa--gfx900";
static constexpr const char* Gfx902 = "amdgcn-amd-amdhsa--gfx902+xnack";
static constexpr const char* Gfx903 = "amdgcn-amd-amdhsa--gfx902"; // NOTE: gfx903 is gfx902 with xnack
static constexpr const char* Gfx904 = "amdgcn-amd-amdhsa--gfx904";
static constexpr const char* Gfx906 = "amdgcn-amd-amdhsa--gfx906";
// Supported OpenCL versions
enum OclVersion { OpenCL10, OpenCL11, OpenCL12, OpenCL20, OpenCL21 };
@@ -224,7 +224,7 @@ struct MemoryFormat {
CalFormat calFormat_; //!< CAL image format
};
static const MemoryFormat MemoryFormatMap[] = {
static constexpr MemoryFormat MemoryFormatMap[] = {
// R
{{CL_R, CL_UNORM_INT8}, {GSL_CHANNEL_ORDER_R, CM_SURF_FMT_INTENSITY8}},
{{CL_R, CL_UNORM_INT16}, {GSL_CHANNEL_ORDER_R, CM_SURF_FMT_R16}},
@@ -384,7 +384,7 @@ struct MemFormatStruct {
uint components_;
};
static const MemFormatStruct MemoryFormatSize[] = {
static constexpr MemFormatStruct MemoryFormatSize[] = {
{CM_SURF_FMT_INTENSITY8, 1,
1}, /**< 1 component, normalized unsigned 8-bit integer value per component */
{CM_SURF_FMT_RG8, 2,
rocclr/device/gpu/gpudevice.hpp
+4 -4
Vedi File
@@ -205,10 +205,10 @@ class Device : public NullDevice, public CALGSLDevice {
class Heap : public amd::EmbeddedObject {
public:
//! The size of a heap element in bytes
static const size_t ElementSize = 4;
static constexpr size_t ElementSize = 4;
//! The type of a heap element in bytes
static const cmSurfFmt ElementType = CM_SURF_FMT_R32I;
static constexpr cmSurfFmt ElementType = CM_SURF_FMT_R32I;
Heap() : resource_(NULL), baseAddress_(0) {}
@@ -280,7 +280,7 @@ class Device : public NullDevice, public CALGSLDevice {
//! Transfer buffers
class XferBuffers : public amd::HeapObject {
public:
static const size_t MaxXferBufListSize = 8;
static constexpr size_t MaxXferBufListSize = 8;
//! Default constructor
XferBuffers(const Device& device, Resource::MemoryType type, size_t bufSize)
@@ -369,7 +369,7 @@ class Device : public NullDevice, public CALGSLDevice {
Chunk() : buf_(NULL), flags_(NULL) {}
};
static const uint MaskBits = 32;
static constexpr uint MaskBits = 32;
const Device& dev_; //!< GPU device for the chunk manager
amd::Monitor ml_; //!< Global lock for the SRD manager
std::vector<Chunk> pool_; //!< Pool of SRD buffers
rocclr/device/gpu/gpukernel.cpp
+3 -3
Vedi File
@@ -159,7 +159,7 @@ struct BufDataConst {
};
};
static const BufDataConst BufType[] = {{"g", KernelArg::PointerGlobal, {1, 0, 0, 0}},
static constexpr BufDataConst BufType[] = {{"g", KernelArg::PointerGlobal, {1, 0, 0, 0}},
{"p", KernelArg::PointerPrivate, {1, 1, 1, 0}},
{"l", KernelArg::PointerLocal, {1, 1, 1, 0}},
{"uav", KernelArg::PointerGlobal, {1, 1, 1, 0}},
@@ -167,10 +167,10 @@ static const BufDataConst BufType[] = {{"g", KernelArg::PointerGlobal, {1, 0, 0,
{"hl", KernelArg::PointerHwLocal, {1, 1, 1, 0}},
{"hp", KernelArg::PointerHwPrivate, {1, 1, 1, 0}},
{"hc", KernelArg::PointerHwConst, {1, 1, 1, 0}}};
static const uint BufTypeTotal = sizeof(BufType) / sizeof(BufDataConst);
static constexpr uint BufTypeTotal = sizeof(BufType) / sizeof(BufDataConst);
//! The mathlib constants for each kernel execution
static const float MathLibConst[4] = {0.0f, 0.5f, 1.0f, 2.0f};
static constexpr float MathLibConst[4] = {0.0f, 0.5f, 1.0f, 2.0f};
bool expect(const std::string& str, size_t* pos, const std::string& sym) {
bool result = true;
rocclr/device/gpu/gpukernel.hpp
+3 -3
Vedi File
@@ -294,7 +294,7 @@ struct KernelArg : public amd::HeapObject {
}
//! Special case for vectors with component size <= 16bit
const static uint VectorSizeLimit = 4;
static constexpr uint VectorSizeLimit = 4;
size_t specialVector() const;
};
@@ -360,7 +360,7 @@ class NullKernel : public device::Kernel {
public:
typedef std::vector<KernelArg*> arguments_t;
const static uint UavIdUndefined = 0xffff;
static constexpr uint UavIdUndefined = 0xffff;
enum Flags {
LimitWorkgroup = 1 << 0, //!< Limits the workgroup size
@@ -782,7 +782,7 @@ class HSAILKernel : public device::Kernel {
};
// Max number of possible extra (hidden) kernel arguments
static const uint MaxExtraArgumentsNum = 6;
static constexpr uint MaxExtraArgumentsNum = 6;
HSAILKernel(std::string name, HSAILProgram* prog, std::string compileOptions, uint extraArgsNum);
rocclr/device/gpu/gpumemory.hpp
+2 -2
Vedi File
@@ -232,10 +232,10 @@ class Buffer : public gpu::Memory {
Buffer& operator=(const Buffer&);
//! The size of buffer element in bytes
static const size_t ElementSize = 4;
static constexpr size_t ElementSize = 4;
//! The type of buffer element
static const cmSurfFmt ElementType = CM_SURF_FMT_R32I;
static constexpr cmSurfFmt ElementType = CM_SURF_FMT_R32I;
};
class Image : public gpu::Memory {
rocclr/device/gpu/gpuprintf.cpp
+2 -2
Vedi File
@@ -236,8 +236,8 @@ int PrintfDbg::checkVectorSpecifier(const std::string& fmt, size_t startPos, siz
return vectorSize;
}
static const size_t ConstStr = 0xffffffff;
static const char Separator[] = ",\0";
static constexpr size_t ConstStr = 0xffffffff;
static constexpr char Separator[] = ",\0";
size_t PrintfDbg::outputArgument(const std::string& fmt, bool printFloat, size_t size,
const uint32_t* argument) const {
rocclr/device/gpu/gpuprintf.hpp
+1 -1
Vedi File
@@ -54,7 +54,7 @@ class Memory;
class PrintfDbg : public amd::HeapObject {
public:
//! Debug buffer size per workitem
static const uint WorkitemDebugSize = 4096;
static constexpr uint WorkitemDebugSize = 4096;
//! Default constructor
PrintfDbg(Device& device, FILE* file = NULL);
rocclr/device/gpu/gpuschedcl.cpp
+11 -11
Vedi File
@@ -164,17 +164,17 @@ typedef struct _HwDispatch {
uint padd41; // 0x00000021
} HwDispatch;
\n
static const uint WavefrontSize = 64;
static const uint MaxWaveSize = 0x400;
static const uint UsrRegOffset = 0x240;
static const uint Pm4Nop = 0xC0001002;
static const uint Pm4UserRegs = 0xC0007602;
static const uint Pm4CopyReg = 0xC0044000;
static const uint PrivateSegEna = 0x1;
static const uint DispatchEna = 0x2;
static const uint QueuePtrEna = 0x4;
static const uint KernelArgEna = 0x8;
static const uint FlatScratchEna = 0x20;
static constexpr uint WavefrontSize = 64;
static constexpr uint MaxWaveSize = 0x400;
static constexpr uint UsrRegOffset = 0x240;
static constexpr uint Pm4Nop = 0xC0001002;
static constexpr uint Pm4UserRegs = 0xC0007602;
static constexpr uint Pm4CopyReg = 0xC0044000;
static constexpr uint PrivateSegEna = 0x1;
static constexpr uint DispatchEna = 0x2;
static constexpr uint QueuePtrEna = 0x4;
static constexpr uint KernelArgEna = 0x8;
static constexpr uint FlatScratchEna = 0x20;
\n
uint GetCmdTemplateHeaderSize() { return sizeof(HwDispatchHeader); }
\n
rocclr/device/gpu/gputimestamp.hpp
+2 -2
Vedi File
@@ -116,8 +116,8 @@ class TimeStampCache : public amd::HeapObject {
void freeTimeStamp(TimeStamp* ts) { freedTS_.push_back(ts); }
private:
static const uint TimerSlotSize = TimeStamp::CommandTotal * sizeof(uint64_t);
static const uint TimerBufSize = TimerSlotSize * 4096;
static constexpr uint TimerSlotSize = TimeStamp::CommandTotal * sizeof(uint64_t);
static constexpr uint TimerBufSize = TimerSlotSize * 4096;
//! Disable copy constructor
TimeStampCache(const TimeStampCache&);
rocclr/device/gpu/gputrap.hpp
+2 -2
Vedi File
@@ -116,7 +116,7 @@ end
*******************************************************************************/
/// shader codes with "asic(TAHITI)" instruction
static const uint32_t RuntimeTrapCode[] = {
static constexpr uint32_t RuntimeTrapCode[] = {
0x7e008200, 0xbf8c0000, 0xbef8036c, 0x8779ff6d, 0x0000ffff, 0x8879ff79, 0x01000000, 0xbefa03ff,
0x00002000, 0xbefb03ff, 0x00024fac, 0x80f8ff78, 0x00000100, 0xbef70300, 0xc2007900, 0xbf8c0000,
0xbeee0300, 0xc2007901, 0xbf8c0000, 0xbeef0300, 0xbe800377, 0xbef60398, 0x8078766e, 0x8779ff6f,
@@ -128,7 +128,7 @@ static const uint32_t RuntimeTrapCode[] = {
/// shader codes with "asic(VI)" instruction
static const uint32_t RuntimeTrapCodeVi[] = {
static constexpr uint32_t RuntimeTrapCodeVi[] = {
0x7e006a00, 0xbf8c0000, 0xbef8006c, 0x8679ff6d, 0x0000ffff, 0x8779ff79, 0x01000000, 0xbefa00ff,
0x00002000, 0xbefb00ff, 0x00024fac, 0x80f8ff78, 0x00000100, 0xbef70000, 0xc022003c, 0x00000000,
0xbf8c0000, 0xbeee0000, 0xc022003c, 0x00000004, 0xbf8c0000, 0xbeef0000, 0xbe800077, 0xbef60098,
rocclr/device/gpu/gslbe/src/rt/EventQueue.h
+1 -1
Vedi File
@@ -39,7 +39,7 @@ enum EQManagerConfig
class EventQueue {
public:
static const unsigned int c_staticQueueSize = EQManager_HIGH;
static constexpr unsigned int c_staticQueueSize = EQManager_HIGH;
EventQueue();
~EventQueue();
rocclr/device/gpu/gslbe/src/rt/GSLDeviceGL.cpp
+1 -1
Vedi File
@@ -42,7 +42,7 @@ typedef struct cmFormatXlateRec{
} cmFormatXlateParams;
// relates full range of cm surface formats to those supported by CAL
static const cmFormatXlateParams cmFormatXlateTable [] = {
static constexpr cmFormatXlateParams cmFormatXlateTable [] = {
{CM_SURF_FMT_LUMINANCE8, CM_SURF_FMT_R8I, GSL_CHANNEL_ORDER_R},
{CM_SURF_FMT_LUMINANCE16, CM_SURF_FMT_R16, GSL_CHANNEL_ORDER_R},
{CM_SURF_FMT_LUMINANCE16F, CM_SURF_FMT_R16F, GSL_CHANNEL_ORDER_R},
rocclr/device/gpu/gslbe/src/rt/backend.h
+1 -1
Vedi File
@@ -207,7 +207,7 @@ enum EngineType
struct GpuEvent
{
static const unsigned int InvalidID = ((1<<30) - 1);
static constexpr unsigned int InvalidID = ((1<<30) - 1);
EngineType engineId_; ///< type of the id
unsigned int id; ///< actual event id