P4 to Git Change 1275749 by wchau@wchau_WIN_OCL_HSA on 2016/06/02 13:38:16

SWDEV-89502 - [OCL] Support AMD DVR Core functionalities.  Add OCL support for DOPP for desktop and present texture (OCL RT changes)

Affected files ...

... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_gl.cpp#50 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/amdocl/cl_svm.cpp#17 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/khronos/headers/opencl1.2/CL/cl_ext.h#11 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/khronos/headers/opencl2.0/CL/cl_ext.h#25 edit
... //depot/stg/opencl/drivers/opencl/api/opencl/khronos/headers/opencl2.1/CL/cl_ext.h#4 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpukernel.cpp#316 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpukernel.hpp#124 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpuvirtual.cpp#403 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLDeviceGL.cpp#26 edit
... //depot/stg/opencl/drivers/opencl/runtime/platform/kernel.hpp#16 edit


[ROCm/clr commit: 7acdb2390f]
This commit is contained in:
foreman
2016-06-02 14:15:36 -04:00
parent e99eac3ec2
commit ff4b0be6f4
5 changed files with 48 additions and 9 deletions
@@ -472,7 +472,7 @@ VirtualGPU::create(bool profiling, uint rtCUs, uint deviceQueueSize,
}
//!@todo This is not a generic solution and
// may have issues with > 8 queues
idx = index() % (dev().engines().numComputeRings() +
idx = index() % (dev().engines().numComputeRings() +
dev().engines().numComputeRingsRT());
}
// hwRing_ should be set 0 if forced to have single scratch buffer
@@ -1839,11 +1839,23 @@ VirtualGPU::submitKernelInternalHSA(
pKernelInfo = &kernelInfo;
}
// Set up the dispatch information
KernelDispatchInfo dispatchInfo;
dispatchInfo.aqlPacket = aqlPkt;
dispatchInfo.mems = vmMems();
dispatchInfo.numMems = cal_.memCount_;
dispatchInfo.scratch = scratch;
dispatchInfo.scratchOffset = scratchOffset;
dispatchInfo.cpuAqlCode = hsaKernel.cpuAqlCode();
dispatchInfo.hsaQueueVA = hsaQueueMem_->vmAddress();
dispatchInfo.kernelInfo = pKernelInfo;
dispatchInfo.wavesPerSH = hsaKernel.getWavesPerSH(this);
dispatchInfo.lastDoppSubmission = kernel.parameters().getExecNewVcop();
GpuEvent gpuEvent;
// Run AQL dispatch in HW
eventBegin(MainEngine);
cs()->AqlDispatch(aqlPkt, vmMems(), cal_.memCount_, scratch, scratchOffset,
hsaKernel.cpuAqlCode(), hsaQueueMem_->vmAddress(), pKernelInfo, hsaKernel.getWavesPerSH(this));
cs()->AqlDispatch(&dispatchInfo);
eventEnd(MainEngine, gpuEvent);
if (dbgManager && (NULL != dbgManager->postDispatchCallBackFunc())) {
@@ -2143,7 +2155,7 @@ VirtualGPU::submitKernelInternal(
}
// Execute the kernel
if (gpuKernel.run(*this, &gpuEvent, lastRun)) {
if (gpuKernel.run(*this, &gpuEvent, lastRun, kernel.parameters().getExecNewVcop())) {
//! @todo A flush is necessary to make sure
// that 2 consecutive runs won't access to the same
// private/local memory. CAL has to generate cache flush