16 Commits

Author SHA1 Message Date
Lytovchenko, Danylo 18dc7b2d24 SWDEV-123456 - use explicit PR head SHA for clang-format (#623)
* SWDEV-123456 - use explicit PR head SHA for clang-format

* SWDEV-123456 - set new runners name

[ROCm/clr commit: 704fea29cf]
2025-06-26 10:46:02 +02:00
Lytovchenko, Danylo e8988efb74 SWDEV-123456 - use only specific lines (#573)
* SWDEV-123456 - use only specific lines

* SWDEV-123456 - only run clang on diff between PR target and current

[ROCm/clr commit: ccb31fdf9d]
2025-06-25 10:54:29 +02:00
Lytovchenko, Danylo 4383a50bd9 SWDEV-123456 - allow merge commits in the log (#605)
[ROCm/clr commit: 0f4ad06629]
2025-06-24 13:13:59 +02:00
Lytovchenko, Danylo e2e5ad827d SWDEV-123456 - use new hosted runners for clang actions (#604)
* SWDEV-123456 - use new hosted runners for clang actions

* SWDEV-123456 - set specific runner for validation PRs

[ROCm/clr commit: be289f7fc7]
2025-06-24 09:02:00 +02:00
Lytovchenko, Danylo 38cf648f0e SWDEV-123456 - fix historical AI codeql (#576)
[ROCm/clr commit: f3003d674b]
2025-06-20 08:45:15 +02:00
Lytovchenko, Danylo d42c7875a6 SWDEV-123456 - add AI CodeQL workflows (#558)
[ROCm/clr commit: a2550e0a9e]
2025-06-17 09:30:58 +02:00
Lytovchenko, Danylo 89b5c1d9bf SWDEV-123456 auto clang-format (#482)
* SWDEV-123456 - add clang-format script and pre-commit hook

[ROCm/clr commit: 580a8759dd]
2025-06-05 14:28:12 +02:00
Lytovchenko, Danylo 694582d67a SWDEV-123456 - Only run keyword scan against amd-staging (#399)
[ROCm/clr commit: 1bb0ea69b1]
2025-05-28 10:09:35 +02:00
Lytovchenko, Danylo 436c25aa47 SWDEV-12345 Add PR title and commit message validation (#349)
[ROCm/clr commit: 7f6020d599]
2025-05-26 15:13:31 +02:00
Lytovchenko, Danylo e3a6d00822 SWDEV-123456 - Add PR description validation (#354)
[ROCm/clr commit: e12c7200b9]
2025-05-26 15:13:15 +02:00
Lytovchenko, Danylo 600f07f580 SWDEV-123456 - add keywords scan (#395)
[ROCm/clr commit: d42622b4c0]
2025-05-26 15:12:43 +02:00
Mallya, Ameya Keshava 29be7230eb fixed syntax to mainline
[ROCm/clr commit: 98f1db181c]
2025-04-01 09:51:41 -07:00
Mallya, Ameya Keshava f117699bef !verify functionality
[ROCm/clr commit: ae1d0ef8a1]
2025-03-31 13:14:08 -07:00
Mallya, Ameya Keshava 594c7e6704 Adding KWS check for amd-mainline
[ROCm/clr commit: 24184e151c]
2025-03-28 08:05:47 -07:00
Mallya, Ameya Keshava 61a6b9bf60 Added KWS check
[ROCm/clr commit: cde722ad71]
2025-03-12 10:12:06 -07:00
Mallya, Ameya Keshava 5c27fe7c8e Added rocm-ci-caller
[ROCm/clr commit: 35dcd43c59]
2025-03-12 10:05:57 -07:00