37 Commity

Autor SHA1 Zpráva Datum
Jin Jung d4758bc29e SWDEV-570501 - Add Windows support for hipGraphicsGLRegisterBuffer (#2323) 2026-01-12 13:10:46 -06:00
Jin Jung deaf8ab38a SWDEV-567119 - Windows GL Interop Support (#1892) 2025-12-08 11:03:59 -05:00
Jin Jung 291ff6c468 SWDEV-558855 - Enable Interop Map Buffer on Windows (#1748)
* Support Windows HANDLE in interop_map_buffer

* Refactored Windows HANDLE in interop_map_buffer

* ROCr System Dependent Handle Type

* Fix for ROCr Handle Conversion Bug

* Remove Windows Header
2025-11-07 12:47:01 -08:00
David Yat Sin 38ea4370c1 rocr: Fix doorbell ring
When compiling with -O0, some compilers generate a xchg instruction for
the __atomic_store(...) built-in. Using xchg on MMIO memory is
undefined-behavior and may be ignored on certain CPUs.


[ROCm/ROCR-Runtime commit: f011a9506d]
2025-05-20 09:19:10 -04:00
Luna Nova 9a0f0858fa rocr: set underlying type of hsa_region
Set underlying type of hsa_region_info_t, hsa_amd_region_info_t
to int.

Change-Id: Ibf97a025eec6176d8e28af8009e9bd6795ca061f


[ROCm/ROCR-Runtime commit: 166b08346b]
2025-02-06 16:25:03 -05:00
Tony Gutierrez 64e2d37be8 rocr/aie: Add initial support for AIE agents
This change adds the initial classes for the AIE agent and AIE AQL
queue.

An AIE agent list is added to the core runtime object.

Change-Id: I84b02f52171b80726dfb2c8431582a3ea2986eb3


[ROCm/ROCR-Runtime commit: 8ea62f1cea]
2024-08-27 14:47:05 -07:00
Swati Rawat 68d697cb63 Tagging APIs from hsa_ext_amd.h for Doxygen
Change-Id: I2ab2358985442647cedbd99eca5b1140cb0b0680
Signed-off-by: David Yat Sin <David.YatSin@amd.com>


[ROCm/ROCR-Runtime commit: 4cb5c509f9]
2024-08-19 12:17:20 -04:00
David Yat Sin 8165c03e7b PC Sampling: Create PC Sampling interfaces
Create new interface group for PC Sampling

Change-Id: I59b4cfe9f8d1ae313dc28be1d2ed49f750d8212b


[ROCm/ROCR-Runtime commit: 0bc244e10a]
2024-04-11 12:52:23 -04:00
Joseph Huber 3f872d8c97 Add executable symbol info for the wavefront size
The wavefront size is currently only exposed as an agent level
attribute. This is not correctyl, because while the agent has a default
wave front size that is usually correct, it can easily be overridden via
options like -mwavefrontsize64 on various ISAs. The wavefrontsize
attribute is actually more of a calling convention that is consistent
within a callgraph. Because the root of each call graph is a kernel in
this architecture, we need to be able to query this on a per-kernel
basis. This information is already avialable in the kernel descriptor
packet, but it wasn't exported.

This patch adds HSA_CODE_SYMBOL_INFO_KERNEL_WAVEFRONT_SIZE as a new
option to query on the executable symbol.

Change-Id: I744815c89cc9d4c82f25479bdd48ae1f32e859ff


[ROCm/ROCR-Runtime commit: 9e26cbac14]
2024-02-09 15:55:30 +00:00
Joseph Huber 298e6cc495 Improve endianness check
Update the `hsa.h` header to use the gcc / clang `__BYTE_ORDER__`
macros where available to more accurately autodetect endianness for
the target.

Change-Id: I7312f3badcba9287a30eb14882b91e2a247acc5f


[ROCm/ROCR-Runtime commit: 4971150576]
2024-01-16 21:29:39 +00:00
David Yat Sin ff72129092 Add queries for HSA Ext interface version
Change-Id: I26860fb1364cd3a33cdc9b284ac807b2702bb241


[ROCm/ROCR-Runtime commit: ed1b0b9b1a]
2023-12-06 13:58:52 -05:00
David Yat Sin 38ce852b12 Add RISC-V support
Patch provided by user Xeonacid via github:
https://github.com/RadeonOpenCompute/ROCR-Runtime/pull/172/

Change-Id: I5f9086b536383093e7995b9cfdc19dab213f0265


[ROCm/ROCR-Runtime commit: 251601b20b]
2023-12-04 15:05:22 +00:00
David Yat Sin eb664927dd Add LoongArch64 Support
Patch submitted by user Xinmudotmoe on github

Change-Id: I58fd035b4ec4856f20d63747ababd49fa9764348


[ROCm/ROCR-Runtime commit: 1a7de9588e]
2023-10-26 11:36:16 -04:00
David Yat Sin 48cb2f5a9e Add query for Xnack enabled
Add system query for whether Xnack is enabled on a system.

Change-Id: I2832110e4f33f6a951d13acd06636442debf27ae


[ROCm/ROCR-Runtime commit: 22becfb1e8]
2023-09-19 00:25:30 +00:00
David Yat Sin 203934445a Support mapping and unmapping memory handles
Add support for mapping and unmapping memory handles to virtual
address ranges.

This is part of patch series for Virtual Memory API.

Change-Id: If512d49ff4211e68f2064249add607a3200e458a


[ROCm/ROCR-Runtime commit: 179dcf1c77]
2023-07-21 15:17:01 -04:00
David Yat Sin 2a5f4263a8 Add check/query for virtual memory API support
Checks whether version of libdrm library installed on current
system supports the amdgpu_device_get_fd API. This API is
required to support the virtual memory API functions. The
amdgpu_device_get_fd function was introduced in libdrm-2.4.109.
Using a runtime check test instead of static dependency to be
able to support previous APIs on older versions of libdrm.
Add query for virtual memory API support.

This is part of patch series for Virtual Memory API.

Change-Id: Iec831eb24b5d1689c392e50ae86f4d52d4870ac4


[ROCm/ROCR-Runtime commit: e65edb35fc]
2023-07-21 15:17:01 -04:00
Shweta Khatri 76cc9034ff Defined a new extended scope memory region
Added HSA_AMD_MEMORY_POOL_GLOBAL_FLAG_EXT_SCOPE_FINE_GRAINED flag to enable extended scope memory region
where the device-scope atomics act as system-scope atomics

Change-Id: I79fc3207cb630dfc68bed2f8aabd75f35fe80b12


[ROCm/ROCR-Runtime commit: 77bf357647]
2023-06-20 11:00:05 -04:00
Sean Keely deee152909 Add support for exporting portable handles to GPU allocations.
Adds hsa_amd_portable_export_dmabuf and hsa_amd_portable_close_dmabuf
which allow obtaining dmabuf handles to rocr allocations.  These handles
may be shared with other APIs to support cross vendor & cross device
memory sharing.
Adds query to return whether dmabuf export is supported

Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Signed-off-by: David Yat Sin <David.YatSin@amd.com>

Change-Id: I7f98501087d9563d07fc2cb428cc886b1e518b1e


[ROCm/ROCR-Runtime commit: 42243c1e8f]
2023-03-06 12:39:01 -05:00
David Yat Sin d022746cb7 Use mwaitx when busy-waiting signals
Use mwaitx instructions when busy waiting for signals to reduce CPU
energy usage.
This can be disabled by setting HSA_ENABLE_MWAITX=0

Change-Id: Ic207895a491b2bf6dacba47ef0921df3faad5b5a


[ROCm/ROCR-Runtime commit: cc48dfdbff]
2023-02-22 16:55:43 +00:00
David Yat Sin 51b4fb691a Add max enum value to hsa_agent_info_t
Add max enum value to force size of enum and avoid clang compile
warnings.

Change-Id: I9cdf529517cc605a5039c3a924fd718ece16029d


[ROCm/ROCR-Runtime commit: 86e4cb1ddd]
2022-08-10 11:11:36 -04:00
Sean Keely 1aae64e251 Revert "Revert SVM and XNACK support."
This reverts commit da41352a93.

Conflicts:
	opensrc/hsa-runtime/core/util/flag.h

Change-Id: I16daf41588e6139126d66af54b0693de2e7e39f3


[ROCm/ROCR-Runtime commit: 77046a1aaa]
2021-04-21 14:49:43 -05:00
Sean Keely da41352a93 Revert SVM and XNACK support.
KFD is not ready yet.

Change-Id: I61deb292ddb92185d33504c2115169888d56e211


[ROCm/ROCR-Runtime commit: 5bd153974d]
2021-04-02 02:10:59 -04:00
Sean Keely dd42ca6dbe Squash merge of cfreehil/amd-temp-gfx90a onto amd-staging.
Includes some workarounds and HMM.
Conflicts:
	opensrc/hsa-runtime/core/runtime/amd_topology.cpp
	opensrc/hsa-runtime/core/util/flag.h

Change-Id: I22976f07964a43dbb228a6231777dbd599112b8d


[ROCm/ROCR-Runtime commit: 7333c77e22]
2021-04-02 02:10:15 -04:00
Sean Keely abd712f33f Update copyright date.
Change-Id: If4bf4c20cf051878bfe759080bb7345d884dd53d


[ROCm/ROCR-Runtime commit: ce19721c88]
2020-06-19 22:34:01 -04:00
Tony fbb4e4c2c3 Make HSA_QUEUE_TYPE_COOPERATIVE a queue type value
- Correct defintion of HSA_QUEUE_TYPE_COOPERATIVE to be a queue type
  and not a bit mask.
- Correct implementation of hsa_queue_type_t to treat is as an
  enumeration type and not a bit mask. In particular
  HSA_QUEUE_TYPE_COOPERATIVE is a distinct queue type that uses the
  multi producer protocol, and is not a bit set value.

Change-Id: I9415be8853671e5511e16e306caf16020e8c84af


[ROCm/ROCR-Runtime commit: bccb25fc33]
2020-05-07 19:24:19 -04:00
Sean Keely 3bcde37b58 Initial GWS queue support.
Queues should transition to ref counting for all queues eventually.
That cleanup will be part of shared queue pooling support.

Change-Id: I217ff5d573156678b9559da6fb81baa8cd31c617


[ROCm/ROCR-Runtime commit: 0a43a107b1]
2019-12-09 21:21:17 -05:00
Sean Keely fe44e57a6c Expose ROCr build ID.
Adds HSA_AMD_SYSTEM_INFO_BUILD_VERSION=0x200 to hsa_system_info_t.
This returns a const char* pointing at the build string (git describe).

Change-Id: I73e6612482bf6ffc4037fd365808eb9211a650ad


[ROCm/ROCR-Runtime commit: cd8e5c1da8]
2018-08-20 20:44:32 -05:00
Sean Keely 379b5579a9 Respect new memory model requirements at queue destroy.
Spec requires GPU release fences and CPU acquire fences at queue destroy.
Also update the recognized status codes.

Change-Id: If9166f5149f65417c7057ff7c0f69f6ac094d6ab


[ROCm/ROCR-Runtime commit: b6f0248f53]
2018-04-04 08:13:00 -04:00
Evgeny ce82829fc1 hsa-runtime integration
Change-Id: I48968966ffe164218ebff88d0e3a1268e96bf1dd


[ROCm/ROCR-Runtime commit: 4174f07fd1]
2017-07-05 10:55:30 -04:00
Sean Keely d984194fa5 Use fixed size type for queue type arguments.
Change-Id: I81b605c9cc9b18bcef043a4f0292212241ce5987


[ROCm/ROCR-Runtime commit: bc43f97964]
2017-02-07 01:22:30 -05:00
Konstantin Zhuravlyov e10cd184ef Update code object/isa/loader to hsa v1.1
- Includes Sean's latest changes
- Cleanups/improvements
- Fixes for few bugs that crept over from previous releases

Change-Id: I839dc4895bf13ebd0afc8843424387a9fef667b0


[ROCm/ROCR-Runtime commit: c2c993e0d8]
2016-08-22 15:03:23 -04:00
Konstantin Zhuravlyov a03e79c3c0 Remove loaded code object api
Change-Id: If20a6a3d15e25658b9e0aaf9ef8f3f33b2e0dd5c


[ROCm/ROCR-Runtime commit: 93ac77979c]
2016-07-07 13:09:30 -04:00
Konstantin Zhuravlyov b43cdae36b Implement new load map API.
Change-Id: I5f148fe66f899b2fa6a2e75430afa988f38db58d

[ROCm/ROCR-Runtime commit: 0e4cab3001]
2016-06-28 11:32:19 -04:00
Zhuravlyov, Konstantin (x21446) MA 92a990b426 Clean up extensions and provide public extension/API to query host address given device address:
- Partially remove 'amd_load_map' extension because it is not used and will not be used
- Remove 'hsa_amd_query_kernel_host_address' API
- Add 'hsa_ext_amd_loaded_code_object' extension
- Add 'hsa_ext_amd_loaded_code_object_query_host_address' API
	- Most likely to be used by debugger, profiler, and hcc (printf)
- Update affected sources
	- 'hsa_system_extension_supported'
	- 'hsa_system_get_extension_table'
	- SoftCP path
- Integrate CLs 1250699, 1251204, 1251214 from stg sc

ReviewBoardURL: http://ocltc.amd.com/reviews/r/10091/
Testing: smoke (ok), teamcity (ok), samples on fiji (AQL and SoftCP) (ok)

[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1251223]


[ROCm/ROCR-Runtime commit: f6565a2f70]
2016-03-24 19:00:30 -05:00
James Edwards (xN/A) TX 8504fcb6ca Separate open source core runtime code from DK makefiles.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1250152]


[ROCm/ROCR-Runtime commit: 7d2bc9d113]
2016-03-22 18:10:13 -05:00
James Edwards (xN/A) TX 6da3325470 Remove opensrc test files.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1249961]


[ROCm/ROCR-Runtime commit: 7d1e6c3a57]
2016-03-22 13:39:51 -05:00
James Edwards (xN/A) TX 67e6064a6a Check open source core runtime code into perforce. This includes license and README files.
[git-p4: depot-paths = "//depot/stg/hsa/drivers/hsa/runtime/": change = 1249136]


[ROCm/ROCR-Runtime commit: c9ffe0004e]
2016-03-20 15:39:40 -05:00