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Auteur SHA1 Bericht Datum
Aurelien Bouteiller 44d43901b1 Remove unused parts of dlmalloc to improve coverity score (#106) 
[ROCm/rocshmem commit: 87179b1ffd]
 2025-05-07 13:05:04 -04:00
Aurelien Bouteiller 87179b1ffd Remove unused parts of dlmalloc to improve coverity score (#106) 2025-05-07 13:05:04 -04:00
Yiltan 95bce1c2ba Added initial changelog (#105) 
[ROCm/rocshmem commit: 644857d375]
 2025-05-07 11:39:14 -04:00
Yiltan 644857d375 Added initial changelog (#105) 2025-05-07 11:39:14 -04:00
Zhang, Victor fbabd2b69d SWDEV-528142 - add error check for KernelParameters::capture (#276) 
* SWDEV-528142 - add error check for KernelParameters::capture

* Update kernel.cpp

---------

Co-authored-by: victzhan <victzhan@amd.com>

[ROCm/clr commit: f960433dcd]
 2025-05-07 09:52:09 -04:00
Zhang, Victor f960433dcd SWDEV-528142 - add error check for KernelParameters::capture (#276) 
* SWDEV-528142 - add error check for KernelParameters::capture

* Update kernel.cpp

---------

Co-authored-by: victzhan <victzhan@amd.com>
 2025-05-07 09:52:09 -04:00
adapryor 33924ea79e Profiler - Fix SIMD Utilization 
Change-Id: I6775cce9901a714d20e80c8c17e7a563edeb48a4
 2025-05-07 00:56:52 -05:00
adapryor 0702a6a5a2 Profiler - Fix SIMD Utilization 
Change-Id: I6775cce9901a714d20e80c8c17e7a563edeb48a4


[ROCm/rdc commit: 33924ea79e]
 2025-05-07 00:56:52 -05:00
Galantsev, Dmitrii e0b9bf1dcb CMAKE - Fix lintian issues 
Change-Id: Ie0099a27986eec017ea1e554c15dc06e6bd35c76
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/rocm_smi_lib commit: a355bb6664]
 2025-05-07 00:35:09 -05:00
Galantsev, Dmitrii a355bb6664 CMAKE - Fix lintian issues 
Change-Id: Ie0099a27986eec017ea1e554c15dc06e6bd35c76
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
 2025-05-07 00:35:09 -05:00
Afzal Patel 47d8573462 add amdgpu drm include directory (#579) 
* add amdgpu drm include directory

* modify find_path

* add additional paths to address ci fail

[ROCm/rocdecode commit: b84146fb42]
 2025-05-06 21:59:00 -04:00
Afzal Patel b84146fb42 add amdgpu drm include directory (#579) 
* add amdgpu drm include directory

* modify find_path

* add additional paths to address ci fail
 2025-05-06 21:59:00 -04:00
christian-heusel 5cc61b714d rocr:Add missing cstdint include 2025-05-06 20:52:48 -04:00
christian-heusel 6c8a2da29a rocr:Add missing cstdint include 
[ROCm/ROCR-Runtime commit: 5cc61b714d]
 2025-05-06 20:52:48 -04:00
Galantsev, Dmitrii bd82e881f5 [SWDEV-529762] CMAKE - Fix lintian issues (#325) 
Change-Id: Ide3563a876cb530d0e80676e78f36f18a233a3ba

Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
 2025-05-06 17:59:47 -05:00
Galantsev, Dmitrii 51088382c8 [SWDEV-529762] CMAKE - Fix lintian issues (#325) 
Change-Id: Ide3563a876cb530d0e80676e78f36f18a233a3ba

Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>

[ROCm/amdsmi commit: bd82e881f5]
 2025-05-06 17:59:47 -05:00
Galantsev, Dmitrii fa8b89f4ae CMAKE - Format with cmake-format 
Change-Id: I08e71fc5060b1f6e0168225cc5fe66886c2044bd
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
 2025-05-06 17:28:14 -05:00
Galantsev, Dmitrii 1e8bc4dc96 CMAKE - Format with cmake-format 
Change-Id: I08e71fc5060b1f6e0168225cc5fe66886c2044bd
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/rdc commit: fa8b89f4ae]
 2025-05-06 17:28:14 -05:00
Galantsev, Dmitrii f89beb90f5 CMAKE - Add cmake-format 
Change-Id: I4036859491934ed26303530d0dc1afb4f1b0d0cd
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
 2025-05-06 17:28:14 -05:00
Galantsev, Dmitrii a4e9002fc1 CMAKE - Add cmake-format 
Change-Id: I4036859491934ed26303530d0dc1afb4f1b0d0cd
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/rdc commit: f89beb90f5]
 2025-05-06 17:28:14 -05:00
vedithal-amd 98367932a3 Use gpu model series instead of gpu model name for testing (#696) 
[ROCm/rocprofiler-compute commit: dbb7f4d493]
 2025-05-06 18:23:08 -04:00
vedithal-amd dbb7f4d493 Use gpu model series instead of gpu model name for testing (#696) 2025-05-06 18:23:08 -04:00
vedithal-amd bd04d43108 Fix PC sampling analysis config issue (#697) 
[ROCm/rocprofiler-compute commit: abd500593b]
 2025-05-06 18:22:15 -04:00
vedithal-amd abd500593b Fix PC sampling analysis config issue (#697) 2025-05-06 18:22:15 -04:00
Galantsev, Dmitrii 42c77a5912 CMAKE - Format with cmake-format 
Change-Id: I5b86b7b83e3d151c3d6e1c216ecb28f1313d538a
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
 2025-05-06 17:09:53 -05:00
Galantsev, Dmitrii c6c01ee675 CMAKE - Format with cmake-format 
Change-Id: I5b86b7b83e3d151c3d6e1c216ecb28f1313d538a
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/amdsmi commit: 42c77a5912]
 2025-05-06 17:09:53 -05:00
Galantsev, Dmitrii 17b01e2456 CI - Add cmake-format to workflows 
Change-Id: Iba0ab896a42abecf389e6b92811343e1fd51c302
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
 2025-05-06 17:09:53 -05:00
Galantsev, Dmitrii bc0567f017 CI - Add cmake-format to workflows 
Change-Id: Iba0ab896a42abecf389e6b92811343e1fd51c302
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/amdsmi commit: 17b01e2456]
 2025-05-06 17:09:53 -05:00
Galantsev, Dmitrii 02c0786a2c Profiler - Add SIMD_UTILIZATION (#171) 
Change-Id: I19d5acd80dbed8c4fc4e1c85eec71ca89398d299

Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
 2025-05-06 13:20:03 -07:00
Galantsev, Dmitrii b6488d150d Profiler - Add SIMD_UTILIZATION (#171) 
Change-Id: I19d5acd80dbed8c4fc4e1c85eec71ca89398d299

Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>

[ROCm/rdc commit: 02c0786a2c]
 2025-05-06 13:20:03 -07:00
Jayaprakash, Karthik cde2a250ec SWDEV-493805 - Cleaning up launch parameters arguments. (#241) 
[ROCm/clr commit: fa55557f46]
 2025-05-06 15:06:13 -04:00
Jayaprakash, Karthik fa55557f46 SWDEV-493805 - Cleaning up launch parameters arguments. (#241) 2025-05-06 15:06:13 -04:00
Arif, Maisam ee14ef7b95 [SWDEV-531364] Removed Python API debug statements (#351) 
Removed Python API debug statements

Change-Id: Ifc17a7b49b11bce56075d620a9b0e7cbbdb5f417

Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
 2025-05-06 14:01:59 -05:00
Arif, Maisam 29ba48ddfc [SWDEV-531364] Removed Python API debug statements (#351) 
Removed Python API debug statements

Change-Id: Ifc17a7b49b11bce56075d620a9b0e7cbbdb5f417

Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>

[ROCm/amdsmi commit: ee14ef7b95]
 2025-05-06 14:01:59 -05:00
Charis Poag da1024cf96 [SWDEV-528647/SWDEV-528450] Follow up Fix incorrect domain 
Changes:
- Misc improvements
- Domain showed incorrectly for devices with different domains
  ex.
  GPU: 3
      BDF: 3000:01:00.0

  Fix provides in proper format -
    GPU: 3
        BDF: 0003:01:00.0

Change-Id: Ida4a0acb4922f3c2cb61a9e9cd0b7d1be31061a8
Signed-off-by: Charis Poag <Charis.Poag@amd.com>
 2025-05-06 12:50:43 -05:00
Charis Poag 4f626e536f [SWDEV-528647/SWDEV-528450] Follow up Fix incorrect domain 
Changes:
- Misc improvements
- Domain showed incorrectly for devices with different domains
  ex.
  GPU: 3
      BDF: 3000:01:00.0

  Fix provides in proper format -
    GPU: 3
        BDF: 0003:01:00.0

Change-Id: Ida4a0acb4922f3c2cb61a9e9cd0b7d1be31061a8
Signed-off-by: Charis Poag <Charis.Poag@amd.com>


[ROCm/amdsmi commit: da1024cf96]
 2025-05-06 12:50:43 -05:00
jeffqjiangNew 6e1cd70811 Error resilience: Added a few error handling measures. (#581) 
* * Error resilience: Added a few error handling measures.
 - AV1: Added check flags to sequence header and frame header to indicate if the headers are parsed without errors. The flags are used to check if the parsing process which refers to the headers can proceed or stop.
 - AV1: Added divide by 0 check on tile columns in tile group parsing.
 - AV1: Added invalid OBU size check in AV1 elementary stream parsing in bitstream reader.
 - All codecs: Added divide by 0 check in display aspect ratio calculation.

* * Error resilience: Fixed a typo in an error message.

[ROCm/rocdecode commit: a861d6f1d2]
 2025-05-06 12:02:51 -04:00
jeffqjiangNew a861d6f1d2 Error resilience: Added a few error handling measures. (#581) 
* * Error resilience: Added a few error handling measures.
 - AV1: Added check flags to sequence header and frame header to indicate if the headers are parsed without errors. The flags are used to check if the parsing process which refers to the headers can proceed or stop.
 - AV1: Added divide by 0 check on tile columns in tile group parsing.
 - AV1: Added invalid OBU size check in AV1 elementary stream parsing in bitstream reader.
 - All codecs: Added divide by 0 check in display aspect ratio calculation.

* * Error resilience: Fixed a typo in an error message.
 2025-05-06 12:02:51 -04:00
Ramakrishnan, Ranjith bbd2edcca3 Remove the backward compatibility code for file reorganization (#14) 
Remove the backward compatibilty code for file reorganization

File reorg backward compatibility support is no longer required

[ROCm/rocm-core commit: 33d87ba25d]
 2025-05-06 08:43:03 -07:00
Ramakrishnan, Ranjith 33d87ba25d Remove the backward compatibility code for file reorganization (#14) 
Remove the backward compatibilty code for file reorganization

File reorg backward compatibility support is no longer required
 2025-05-06 08:43:03 -07:00
Bertan Dogancay c75ebd9147 Merge pull request #1662 from BertanDogancay/2.25 
[SYNC] 2.25.1-1

[ROCm/rccl commit: 590ad6acc2]
 2025-05-06 09:39:09 -04:00
Bertan Dogancay 590ad6acc2 Merge pull request #1662 from BertanDogancay/2.25 
[SYNC] 2.25.1-1
 2025-05-06 09:39:09 -04:00
Chaudhary, Jatin Jaikishan f02f7ed89d SWDEV-461087 - fp4/fp6/fp8 ocp header (#29) 
Change-Id: I019d768a770ebe5973cce737e91850e2400d10bb

[ROCm/hip commit: b4ff023d37]
 2025-05-06 15:32:47 +05:30
Chaudhary, Jatin Jaikishan b4ff023d37 SWDEV-461087 - fp4/fp6/fp8 ocp header (#29) 
Change-Id: I019d768a770ebe5973cce737e91850e2400d10bb
 2025-05-06 15:32:47 +05:30
Dittakavi, Satyanvesh 086a1c289a SWDEV-529831 - Return error if the program is empty (#257) 
[ROCm/clr commit: 607f8f26fd]
 2025-05-06 15:12:12 +05:30
Dittakavi, Satyanvesh 607f8f26fd SWDEV-529831 - Return error if the program is empty (#257) 2025-05-06 15:12:12 +05:30
Chaudhary, Jatin Jaikishan b5f67d4804 SWDEV-529854 - __hmax/__hmin should handle nan's (#246) 
[ROCm/clr commit: a71c6eb1a0]
 2025-05-06 09:42:15 +01:00
Chaudhary, Jatin Jaikishan a71c6eb1a0 SWDEV-529854 - __hmax/__hmin should handle nan's (#246) 2025-05-06 09:42:15 +01:00
Chaudhary, Jatin Jaikishan a12739ecd9 SWDEV-529927 - add missing operations for fp16/bf16 (#238) 
[ROCm/clr commit: b1ebf33850]
 2025-05-06 09:41:21 +01:00
Chaudhary, Jatin Jaikishan b1ebf33850 SWDEV-529927 - add missing operations for fp16/bf16 (#238) 2025-05-06 09:41:21 +01:00