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Author SHA1 Message Date
Flora Cui 2cc279dbbc rocr: try DefaultSignal if interrupt is disabled 
Reviewed-by: Shane Xiao <shane.xiao@amd.com>
Change-Id: I5d3a3813f56990f3aca61be23215faeb0a9629cb
Signed-off-by: Flora Cui <flora.cui@amd.com>
 2025-01-02 11:09:20 +08:00
Flora Cui 5587fa5224 rocr: try DefaultSignal if interrupt is disabled 
Reviewed-by: Shane Xiao <shane.xiao@amd.com>
Change-Id: I5d3a3813f56990f3aca61be23215faeb0a9629cb
Signed-off-by: Flora Cui <flora.cui@amd.com>


[ROCm/ROCR-Runtime commit: 2cc279dbbc]
 2025-01-02 11:09:20 +08:00
Giovanni Baraldi edc9228dab SWDEV-490031: Adding ops 16,32,64 metrics for rdc 
Change-Id: Ia694a79425aeda15ecbb3fef993d880220651ef7
 2024-12-31 04:17:12 -06:00
Giovanni Baraldi 4ab71520ac SWDEV-490031: Adding ops 16,32,64 metrics for rdc 
Change-Id: Ia694a79425aeda15ecbb3fef993d880220651ef7


[ROCm/rocprofiler commit: edc9228dab]
 2024-12-31 04:17:12 -06:00
Marko Arandjelovic 44ff3ba1cc SWDEV-506234 - Refactor validation in hip_memory 
Change-Id: I9d69695e4b6668e6de00f1f6b060862872358340


[ROCm/clr commit: 7e152bb0f3]
 2024-12-31 00:35:25 +02:00
Marko Arandjelovic 7e152bb0f3 SWDEV-506234 - Refactor validation in hip_memory 
Change-Id: I9d69695e4b6668e6de00f1f6b060862872358340
 2024-12-31 00:35:25 +02:00
gabrpham a62f424b90 Fixed reset event issues 
Issues include:
	SWDEV-480250
	SWDEV-480255
	SWDEV-480248

Signed-off-by: gabrpham <Gabriel.Pham@amd.com>
Change-Id: Icf12211e4b136f26fce18f09a7bf8b7e9cd20691


[ROCm/rocm_smi_lib commit: 6f51cd651e]
 2024-12-30 13:12:46 -05:00
gabrpham 6f51cd651e Fixed reset event issues 
Issues include:
	SWDEV-480250
	SWDEV-480255
	SWDEV-480248

Signed-off-by: gabrpham <Gabriel.Pham@amd.com>
Change-Id: Icf12211e4b136f26fce18f09a7bf8b7e9cd20691
 2024-12-30 13:12:46 -05:00
Shane Xiao 2d40493c31 rocr: Fix missed read lock in ExecutableImpl::FindHostAddress 
Change-Id: Ide9b5cc3aa235d3768ebbfd8dc1560bf70fd0743
Signed-off-by: Shane Xiao <shane.xiao@amd.com>
Reviewed-by: Qiang Yu <qiang.yu@amd.com>
 2024-12-30 06:43:25 -05:00
Shane Xiao 6e0b1642b3 rocr: Fix missed read lock in ExecutableImpl::FindHostAddress 
Change-Id: Ide9b5cc3aa235d3768ebbfd8dc1560bf70fd0743
Signed-off-by: Shane Xiao <shane.xiao@amd.com>
Reviewed-by: Qiang Yu <qiang.yu@amd.com>


[ROCm/ROCR-Runtime commit: 2d40493c31]
 2024-12-30 06:43:25 -05:00
Tim Huang 0f507e7690 rocrtst: add gfx1153 to the default targets 
Change-Id: I6cce4f924c236ea83cbe0ab9402c0cabdb202356
Signed-off-by: Tim Huang <tim.huang@amd.com>
 2024-12-30 02:06:01 -05:00
Tim Huang 8a853c2539 rocrtst: add gfx1153 to the default targets 
Change-Id: I6cce4f924c236ea83cbe0ab9402c0cabdb202356
Signed-off-by: Tim Huang <tim.huang@amd.com>


[ROCm/ROCR-Runtime commit: 0f507e7690]
 2024-12-30 02:06:01 -05:00
Tim Huang e515b0bca5 rocr: add ISA target support for GC version 11.5.3 
This add support for GC version 11.5.3

Change-Id: I1d55e33198620d3493967558c25c636d5f7ab347
Signed-off-by: Tim Huang <tim.huang@amd.com>
 2024-12-30 01:44:53 -05:00
Tim Huang 30f1a5f582 rocr: add ISA target support for GC version 11.5.3 
This add support for GC version 11.5.3

Change-Id: I1d55e33198620d3493967558c25c636d5f7ab347
Signed-off-by: Tim Huang <tim.huang@amd.com>


[ROCm/ROCR-Runtime commit: e515b0bca5]
 2024-12-30 01:44:53 -05:00
zichguan-amd a255533afd SWDEV-495789 - revert Fix ambiguity of fma for _Float16 for libc++ (#1976) 
Change-Id: I45ae4711a047f4484a018b9409c9f6ecf09720ce


[ROCm/clr commit: b8ba4ccf9c]
 2024-12-29 10:56:32 -05:00
zichguan-amd b8ba4ccf9c SWDEV-495789 - revert Fix ambiguity of fma for _Float16 for libc++ (#1976) 
Change-Id: I45ae4711a047f4484a018b9409c9f6ecf09720ce
 2024-12-29 10:56:32 -05:00
Avinash Kethineedi 9b162d4065 Merge pull request #22 from avinashkethineedi/functional_tests 
[ROCm/rocshmem commit: 4a3c3d54fb]
 2024-12-27 20:49:55 +05:30
Avinash Kethineedi 4a3c3d54fb Merge pull request #22 from avinashkethineedi/functional_tests 2024-12-27 20:49:55 +05:30
Swati Rawat 4e4d0ced00 adding link to rocm.docs 
Change-Id: I99e89c85838d54f2992eac10c1b5ee2ced3c9485


[ROCm/roctracer commit: a73046d6b5]
 2024-12-27 09:30:46 +00:00
Swati Rawat a73046d6b5 adding link to rocm.docs 
Change-Id: I99e89c85838d54f2992eac10c1b5ee2ced3c9485
 2024-12-27 09:30:46 +00:00
Pryor, Adam 60b7359161 Implementation for adding pcie_total (#40) 
* Implementation for adding pcie_total

Signed-off-by: adapryor <Adam.pryor@amd.com>
Change-Id: I4b0cfd7095e9d984e939283ee7169d01f55a1847
Signed-off-by: adapryor <Adam.pryor@amd.com>

* Updates

Signed-off-by: adapryor <Adam.pryor@amd.com>
Change-Id: I021f29083de651cab9fbe7db98acbe20f65948d4

* Updates

Signed-off-by: adapryor <Adam.pryor@amd.com>
Change-Id: I42f3207b745fa787dabe30a85c8e063159d1337d

---------

Signed-off-by: adapryor <Adam.pryor@amd.com>
 2024-12-26 18:36:41 -06:00
Pryor, Adam 20f3ba845c Implementation for adding pcie_total (#40) 
* Implementation for adding pcie_total

Signed-off-by: adapryor <Adam.pryor@amd.com>
Change-Id: I4b0cfd7095e9d984e939283ee7169d01f55a1847
Signed-off-by: adapryor <Adam.pryor@amd.com>

* Updates

Signed-off-by: adapryor <Adam.pryor@amd.com>
Change-Id: I021f29083de651cab9fbe7db98acbe20f65948d4

* Updates

Signed-off-by: adapryor <Adam.pryor@amd.com>
Change-Id: I42f3207b745fa787dabe30a85c8e063159d1337d

---------

Signed-off-by: adapryor <Adam.pryor@amd.com>

[ROCm/rdc commit: 60b7359161]
 2024-12-26 18:36:41 -06:00
avinashkethineedi 7a0bf44b83 Updated driver.sh and tester.hpp with sequential numbering for test identification 
* Enabled Ping Pong tests
* Removed test commands for multi-workgroup collective tests


[ROCm/rocshmem commit: 23172c9150]
 2024-12-26 21:28:21 +00:00
avinashkethineedi 23172c9150 Updated driver.sh and tester.hpp with sequential numbering for test identification 
* Enabled Ping Pong tests
* Removed test commands for multi-workgroup collective tests
 2024-12-26 21:28:21 +00:00
avinashkethineedi ca4142de78 Updated default case of functional tests with empty test 
[ROCm/rocshmem commit: e40e6a63fa]
 2024-12-26 19:33:23 +00:00
avinashkethineedi e40e6a63fa Updated default case of functional tests with empty test 2024-12-26 19:33:23 +00:00
Nilesh M Negi f1bada26ef [BUILD] Fix ASAN build if GPU targets has xnack+ (#1474) 
Signed-off-by: nileshnegi <Nilesh.Negi@amd.com>

[ROCm/rccl commit: fd03b5b6a5]
 2024-12-26 12:13:36 -06:00
Nilesh M Negi fd03b5b6a5 [BUILD] Fix ASAN build if GPU targets has xnack+ (#1474) 
Signed-off-by: nileshnegi <Nilesh.Negi@amd.com>
 2024-12-26 12:13:36 -06:00
Edgar Gabriel 3cf91156f9 Merge pull request #20 from edgargabriel/topic/remove-internal-dir 
remove internal directory

[ROCm/rocshmem commit: 12aeab1a59]
 2024-12-26 09:21:09 -06:00
Edgar Gabriel 12aeab1a59 Merge pull request #20 from edgargabriel/topic/remove-internal-dir 
remove internal directory
 2024-12-26 09:21:09 -06:00
Bhardwaj, Gopesh 93421ab066 update PR template (#90) 
[ROCm/rocprofiler-sdk commit: 1ca289699e]
 2024-12-26 11:24:58 +05:30
Bhardwaj, Gopesh 1ca289699e update PR template (#90) 2024-12-26 11:24:58 +05:30
Amit Pandey 81a25f9614 SWDEV-490256 - Fix uri_decode logic to handle Memory URI. 
Uri decoder logic currently silently ignores processing of memory uri.
This patch enables the existing logic to handle the processing of offset
and size related to loaded code-object having memory URI.

Change-Id: If03579cefb11d91f667410464dc89404df9270a3


[ROCm/clr commit: 11cd37ce0b]
 2024-12-25 11:07:16 -05:00
Amit Pandey 11cd37ce0b SWDEV-490256 - Fix uri_decode logic to handle Memory URI. 
Uri decoder logic currently silently ignores processing of memory uri.
This patch enables the existing logic to handle the processing of offset
and size related to loaded code-object having memory URI.

Change-Id: If03579cefb11d91f667410464dc89404df9270a3
 2024-12-25 11:07:16 -05:00
Indic, Vladimir c79b0a2eb6 Enable PC sampling on MI300A CI runners (#88) 
Co-authored-by: Bhardwaj, Gopesh <Gopesh.Bhardwaj@amd.com>

[ROCm/rocprofiler-sdk commit: abf7280aae]
 2024-12-25 10:39:22 +01:00
Indic, Vladimir abf7280aae Enable PC sampling on MI300A CI runners (#88) 
Co-authored-by: Bhardwaj, Gopesh <Gopesh.Bhardwaj@amd.com>
 2024-12-25 10:39:22 +01:00
Bhardwaj, Gopesh d75abf3ae2 Disabling counter-collection-buffer test for MI325 (#89) 
Disabling counter-collection-buffer for MI325

[ROCm/rocprofiler-sdk commit: 0b13a14014]
 2024-12-25 10:44:21 +05:30
Bhardwaj, Gopesh 0b13a14014 Disabling counter-collection-buffer test for MI325 (#89) 
Disabling counter-collection-buffer for MI325
 2024-12-25 10:44:21 +05:30
Prike Liang c5a5b785bf rocrtst/test_common: correct the amdgcn header path 
Change-Id: Iae31668d16253ee0bfda82f207463d19b2e0973a
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
 2024-12-24 12:44:22 -05:00
Prike Liang 5a42f09755 rocrtst/test_common: correct the amdgcn header path 
Change-Id: Iae31668d16253ee0bfda82f207463d19b2e0973a
Signed-off-by: Prike Liang <Prike.Liang@amd.com>


[ROCm/ROCR-Runtime commit: c5a5b785bf]
 2024-12-24 12:44:22 -05:00
Baraldi, Giovanni d93586b57a SWDEV-492607: Fix for bvh (#87) 
Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com>

[ROCm/rocprofiler-sdk commit: 0a8c31842d]
 2024-12-24 15:47:13 +01:00
Baraldi, Giovanni 0a8c31842d SWDEV-492607: Fix for bvh (#87) 
Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com>
 2024-12-24 15:47:13 +01:00
Yiltan 4692053198 Merge pull request #21 from Yiltan/global-exit-fix 
IPC backend now aborts with rocshmem_global_exit()

[ROCm/rocshmem commit: c87fa8183a]
 2024-12-24 08:52:04 -05:00
Yiltan c87fa8183a Merge pull request #21 from Yiltan/global-exit-fix 
IPC backend now aborts with rocshmem_global_exit()
 2024-12-24 08:52:04 -05:00
Swati Rawat af4cec86d8 fixing license date 
Change-Id: I6d0eeaea6cfd91d9512a742d397852389b7b592e


[ROCm/roctracer commit: f9854f357a]
 2024-12-24 09:46:44 +00:00
Swati Rawat f9854f357a fixing license date 
Change-Id: I6d0eeaea6cfd91d9512a742d397852389b7b592e
 2024-12-24 09:46:44 +00:00
Jaydeep Patel f20f399915 SWDEV-505276 - Parent graph of orig node and original graph of cloned node should be same. 
Change-Id: I6ebc21cc42e41ad5d952a69fb3b3cb095f32cffb


[ROCm/clr commit: dff8197b1d]
 2024-12-24 04:32:14 -05:00
Jaydeep Patel dff8197b1d SWDEV-505276 - Parent graph of orig node and original graph of cloned node should be same. 
Change-Id: I6ebc21cc42e41ad5d952a69fb3b3cb095f32cffb
 2024-12-24 04:32:14 -05:00
Marko Arandjelovic 4bae839601 SWDEV-499927 - Fix param handling in hipMemAccess APIs 
Change-Id: If7c168e28fc94137abf33e4083b7af9515f24298


[ROCm/hipother commit: 011c022e70]
 2024-12-23 20:05:27 -05:00
Marko Arandjelovic 011c022e70 SWDEV-499927 - Fix param handling in hipMemAccess APIs 
Change-Id: If7c168e28fc94137abf33e4083b7af9515f24298
 2024-12-23 20:05:27 -05:00