On some systems, pthread_addr_setaffinity_np does not exist, so we need
to use pthread_setaffinity_np on thread after pthread_create
Provided by Julian Samaroo on github
https: //github.com/RadeonOpenCompute/ROCR-Runtime/pull/143
Change-Id: I4649f94333f2d7b0a5993b370a4bfc48d92acecb
On some systems, pthread_addr_setaffinity_np does not exist, so we need
to use pthread_setaffinity_np on thread after pthread_create
Provided by Julian Samaroo on github
https: //github.com/RadeonOpenCompute/ROCR-Runtime/pull/143
Change-Id: I4649f94333f2d7b0a5993b370a4bfc48d92acecb
[ROCm/ROCR-Runtime commit: 6333fdecf3]
* Initial overhaul of Analyze mode. Basic CLI is enabled.
Signed-off-by: colramos-amd <colramos@amd.com>
* Merge branch '2.x' of github.com:AMDResearch/omniperf into 2.x-dev
Signed-off-by: colramos-amd <colramos@amd.com>
* fix comment typo
Signed-off-by: Karl W Schulz <karl.schulz@amd.com>
* Move error logging to util.py
Signed-off-by: colramos-amd <colramos@amd.com>
* Move perfmon_configs dir into omniperf_soc dir. Rename config dirs for clarity
Signed-off-by: colramos-amd <colramos@amd.com>
* Add a supported_archs property to Omniperf base class
Signed-off-by: colramos-amd <colramos@amd.com>
* Add css assets for GUI styling
Signed-off-by: colramos-amd <colramos@amd.com>
* Re-organize roofline class. Improved useability
Signed-off-by: colramos-amd <colramos@amd.com>
* Enable standalone GUI
Signed-off-by: colramos-amd <colramos@amd.com>
* Remove outdated metric_configs. This was moved to omniperf_soc dir
Signed-off-by: colramos-amd <colramos@amd.com>
* Fix small bug in GUI to enable Mi100 visualization
Signed-off-by: colramos-amd <colramos@amd.com>
---------
Signed-off-by: colramos-amd <colramos@amd.com>
Signed-off-by: Karl W Schulz <karl.schulz@amd.com>
Signed-off-by: Cole Ramos <colramos@amd.com>
Co-authored-by: Karl W Schulz <karl.schulz@amd.com>
- Disable tests that are failing on Linux during PSDB stress testing
Change-Id: I1711d2d67afd3d23a27f84684a06602236cece45
[ROCm/hip-tests commit: 24e2f429ca]
* * rocDecode/HEVC: Fixed a POC calculation error in some corner cases.
* * rocDecode/HEVC: Added a newline between two functions. No functional changes.
[ROCm/rocdecode commit: 1cdbac7d70]
* * rocDecode/HEVC: Fixed a POC calculation error in some corner cases.
* * rocDecode/HEVC: Added a newline between two functions. No functional changes.
When an offset is applied to the source or destination pointers plus the kind is set to
hipMemcpyDefault and the source or destination is allocated with hipMallocManaged
hipMemCpy2D erroneously fails with hipErrorInvalidValue.
Change-Id: I0db4c17514f743652d8f9a2691da6601a2abb2a1
[ROCm/clr commit: d3bfb55d7a]
When an offset is applied to the source or destination pointers plus the kind is set to
hipMemcpyDefault and the source or destination is allocated with hipMallocManaged
hipMemCpy2D erroneously fails with hipErrorInvalidValue.
Change-Id: I0db4c17514f743652d8f9a2691da6601a2abb2a1
- Add support for only CPU if only the hsmp driver is driver is present.
- Add support for both the amdgpu and amdcpu's if both the amdgpu driver and cpu's are present.
- Add support for socket power metrics
- Add support for hsmp proto type version, prochot status, read current fclkmclk freq
and current cclk freq limit, c0 residency, lclk dpm level range, socket frequency range
- Add CPU socket current frequency limit.
- Update tool for API's IO bandwidth, XGMI bandwidth,
power telemetry rails, APB enable and APB disable API's
- Add support set_pow_limit, set_xgmi_link_width, set_lclk_dpm_level, core_boost_limit,
curr_active_freq_core_limit, set_soc_boost_limit and set_core_boost_limit.
- Add support for the following cpu related API's in tool
core_energy, socket energy, set power efficiency mode, ddr bandwidth,
cpu temperature, dimm temperature range rate, dimm power consumption
and dimm thermal temperature.
- Add support for set_gmi3_link_width, set_pcie_lnk_rate, set_df_pstate_range
Change-Id: I5a35d1cceeb7df0bc8b7116df7c27bb7f376e839
- Add support for only CPU if only the hsmp driver is driver is present.
- Add support for both the amdgpu and amdcpu's if both the amdgpu driver and cpu's are present.
- Add support for socket power metrics
- Add support for hsmp proto type version, prochot status, read current fclkmclk freq
and current cclk freq limit, c0 residency, lclk dpm level range, socket frequency range
- Add CPU socket current frequency limit.
- Update tool for API's IO bandwidth, XGMI bandwidth,
power telemetry rails, APB enable and APB disable API's
- Add support set_pow_limit, set_xgmi_link_width, set_lclk_dpm_level, core_boost_limit,
curr_active_freq_core_limit, set_soc_boost_limit and set_core_boost_limit.
- Add support for the following cpu related API's in tool
core_energy, socket energy, set power efficiency mode, ddr bandwidth,
cpu temperature, dimm temperature range rate, dimm power consumption
and dimm thermal temperature.
- Add support for set_gmi3_link_width, set_pcie_lnk_rate, set_df_pstate_range
Change-Id: I5a35d1cceeb7df0bc8b7116df7c27bb7f376e839
[ROCm/amdsmi commit: 19030e5b72]
1. provide prototype and documentation for esmi specific api.
define structures and update classes as required
2. update cmake files as required and add esmi api to the
amdsmi esmi integration example.
Change-Id: I753ec176f9b381e74c9646525dfd9075237bf8d9
1. provide prototype and documentation for esmi specific api.
define structures and update classes as required
2. update cmake files as required and add esmi api to the
amdsmi esmi integration example.
Change-Id: I753ec176f9b381e74c9646525dfd9075237bf8d9
[ROCm/amdsmi commit: 65eed73f4d]
Changes:
- Add new engine field vcn_activity (from 1.4/1.5
gpu_metrics
- Updated log output to enhance view of gpu_metric
data as json pretty print
- Added new fields provided in 1.5
- Added unit overview in python API, CLI is WIP
Signed-off-by: Charis Poag <Charis.Poag@amd.com>
Change-Id: I7d9f29e7ecc35dcd0697814c222cdd02b0d5518e
Changes:
- Add new engine field vcn_activity (from 1.4/1.5
gpu_metrics
- Updated log output to enhance view of gpu_metric
data as json pretty print
- Added new fields provided in 1.5
- Added unit overview in python API, CLI is WIP
Signed-off-by: Charis Poag <Charis.Poag@amd.com>
Change-Id: I7d9f29e7ecc35dcd0697814c222cdd02b0d5518e
[ROCm/amdsmi commit: 8f3861e1d9]
Fix sporatic segment fault in texture test
via retaining image in texture object which
references the image.
The image will be released when the texture
object is destroyed.
Change-Id: Ic3fefa2d5dda6afebd1acd4d41ad310b138af6dd
[ROCm/clr commit: d6d235a111]
Fix sporatic segment fault in texture test
via retaining image in texture object which
references the image.
The image will be released when the texture
object is destroyed.
Change-Id: Ic3fefa2d5dda6afebd1acd4d41ad310b138af6dd
Recent changes disabled system memory allocation
in the abstraciton layer. That requires memory
allocation/destruction in ROCR. Add destruction logic.
Change-Id: I68fe6b0a620ca743fe5850052ea0efa8bb7931c2
[ROCm/clr commit: a6d480e098]
Recent changes disabled system memory allocation
in the abstraciton layer. That requires memory
allocation/destruction in ROCR. Add destruction logic.
Change-Id: I68fe6b0a620ca743fe5850052ea0efa8bb7931c2
* * rocDecode/HEVC: Fixed the random crash associated with undecodable RASL pictures.
- When a CRA picutre occurs, all the pictures in the DPB are emptied. However, the following RASL (Random Access Skipped Leading) picture can still reference these emptied pictures, making them undecodeble.
- We initialized the reference picture lists with (0xFF), representing invalid picture index. Normally these invalid indices are replaced by valid values during RPS decoding. However, on undecodable RASL pictures, we can not find an existing reference picture in DPB, leaving the invalid index untouched and resulting invalid indexing later on.
- Now we initialize the reference picture lists with a valid value 0. Also we add index range check on reference buffer at VA-API layer to avoid invalid memory access.
* * rocDecode/HEVC: Fixed a typo in sampel app message.
* *rocDecode/HEVC: Fixed a bug in reference picture list modification parsing.
- This fixed the test failure of two conformance streams.
[ROCm/rocdecode commit: c9cfcde12d]
* * rocDecode/HEVC: Fixed the random crash associated with undecodable RASL pictures.
- When a CRA picutre occurs, all the pictures in the DPB are emptied. However, the following RASL (Random Access Skipped Leading) picture can still reference these emptied pictures, making them undecodeble.
- We initialized the reference picture lists with (0xFF), representing invalid picture index. Normally these invalid indices are replaced by valid values during RPS decoding. However, on undecodable RASL pictures, we can not find an existing reference picture in DPB, leaving the invalid index untouched and resulting invalid indexing later on.
- Now we initialize the reference picture lists with a valid value 0. Also we add index range check on reference buffer at VA-API layer to avoid invalid memory access.
* * rocDecode/HEVC: Fixed a typo in sampel app message.
* *rocDecode/HEVC: Fixed a bug in reference picture list modification parsing.
- This fixed the test failure of two conformance streams.
* * rocDecode/HEVC: Fixed the random crash associated with undecodable RASL pictures.
- When a CRA picutre occurs, all the pictures in the DPB are emptied. However, the following RASL (Random Access Skipped Leading) picture can still reference these emptied pictures, making them undecodeble.
- We initialized the reference picture lists with (0xFF), representing invalid picture index. Normally these invalid indices are replaced by valid values during RPS decoding. However, on undecodable RASL pictures, we can not find an existing reference picture in DPB, leaving the invalid index untouched and resulting invalid indexing later on.
- Now we initialize the reference picture lists with a valid value 0. Also we add index range check on reference buffer at VA-API layer to avoid invalid memory access.
* * rocDecode/HEVC: Fixed a typo in sampel app message.
[ROCm/rocdecode commit: 0fbd030b5d]
* * rocDecode/HEVC: Fixed the random crash associated with undecodable RASL pictures.
- When a CRA picutre occurs, all the pictures in the DPB are emptied. However, the following RASL (Random Access Skipped Leading) picture can still reference these emptied pictures, making them undecodeble.
- We initialized the reference picture lists with (0xFF), representing invalid picture index. Normally these invalid indices are replaced by valid values during RPS decoding. However, on undecodable RASL pictures, we can not find an existing reference picture in DPB, leaving the invalid index untouched and resulting invalid indexing later on.
- Now we initialize the reference picture lists with a valid value 0. Also we add index range check on reference buffer at VA-API layer to avoid invalid memory access.
* * rocDecode/HEVC: Fixed a typo in sampel app message.
David Yat Sin
Cole Ramos
dependabot[bot]
Rakesh Roy
Giovanni Lenzi Baraldi
jeffqjiangNew
Ioannis Assiouras
Naveen Krishna Chatradhi
Anusha GodavarthySurya
PedramAlizadeh
Ranjith Ramakrishnan
gobhardw
guanyu12
Rupam Chetia
Charis Poag
taosang2
German Andryeyev