Updated amd-smi-lib README with CLI install instructions
Updated version of the python interface and the CLI tool
to 0.1.0 due to the ESMI header changes
Change-Id: If175cdcb9ce0352b6e7e7ce4cc0940a80c11501b
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Updated amd-smi-lib README with CLI install instructions
Updated version of the python interface and the CLI tool
to 0.1.0 due to the ESMI header changes
Change-Id: If175cdcb9ce0352b6e7e7ce4cc0940a80c11501b
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
[ROCm/amdsmi commit: 72638192f7]
Because hipRTC is now using the newer
AMD_COMGR_COMPILE_SOURCE_WITH_DEVICE_LIBS_TO_BC, and now that this
action has been fixed for HIP compilations in Comgr, hipRTC no
longer needs separate Comgr call to link in the device libs.
Change-Id: Ibf9024cbaaab825584566e8d0b5fce60d7063dd8
[ROCm/clr commit: 283dd8352d]
Because hipRTC is now using the newer
AMD_COMGR_COMPILE_SOURCE_WITH_DEVICE_LIBS_TO_BC, and now that this
action has been fixed for HIP compilations in Comgr, hipRTC no
longer needs separate Comgr call to link in the device libs.
Change-Id: Ibf9024cbaaab825584566e8d0b5fce60d7063dd8
Added fallback in amdsmi_init.py to access /opt/rocm/share/amd_smi
if python package is not installed
Made libamd_smi.so detection more reliable
Added PyYaml dependency to pyproject.toml
Added python3-clang dependency in CMakeLists
Updated python3 version dependency in CMakeLists
Update Readme
Added Release Notes
Change-Id: Ie3b85fde7563dd84dce499f229aac1f94bcc2989
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Added fallback in amdsmi_init.py to access /opt/rocm/share/amd_smi
if python package is not installed
Made libamd_smi.so detection more reliable
Added PyYaml dependency to pyproject.toml
Added python3-clang dependency in CMakeLists
Updated python3 version dependency in CMakeLists
Update Readme
Added Release Notes
Change-Id: Ie3b85fde7563dd84dce499f229aac1f94bcc2989
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
[ROCm/amdsmi commit: da50f4f078]
Adding support for gfx941 and gfx942 ISAs.
gfx940 ISA will use sc0:1 sc1:1 on load/store operations
gfx942 ISA will use default load/store operations
Change-Id: If1efbef86f59e2cf2d48fe359cd4166405a0a579
Adding support for gfx941 and gfx942 ISAs.
gfx940 ISA will use sc0:1 sc1:1 on load/store operations
gfx942 ISA will use default load/store operations
Change-Id: If1efbef86f59e2cf2d48fe359cd4166405a0a579
[ROCm/ROCR-Runtime commit: 41f6d0426d]
RUNPATH in libraries will be : $ORIGIN
RUNPATH in binaries will be : $ORIGIN/../lib
Change-Id: I87b6a7d1f58f20499c3a0913d03701ac687d910d
[ROCm/clr commit: 31d1420c54]
When compiling in ASAN mode, remap the first page of device allocations
to system memory. ASAN's memory allocator uses a small amount of extra
memory to store data for housekeeping purpose. But because this memory
is from the GPU memory pool, it might have uncommon memory type for host
to access. Mapping this section of memory to the host makes this memory
accessible to ASAN.
Change-Id: I36f659d616a4d15558372592439a8723c5c84a69
Signed-off-by: Bing Ma <Bing.Ma@amd.com>
When compiling in ASAN mode, remap the first page of device allocations
to system memory. ASAN's memory allocator uses a small amount of extra
memory to store data for housekeeping purpose. But because this memory
is from the GPU memory pool, it might have uncommon memory type for host
to access. Mapping this section of memory to the host makes this memory
accessible to ASAN.
Change-Id: I36f659d616a4d15558372592439a8723c5c84a69
Signed-off-by: Bing Ma <Bing.Ma@amd.com>
[ROCm/ROCR-Runtime commit: 50e754d08b]
Graham Sider
Nicholas Curtis
Ioannis Assiouras
Maisam Arif
Ziyue Yang
gobhardw
Hao Zhou
ROCm CI Service Account
agunashe
Jacob Lambert
AravindanC
David Yat Sin
Jaydeep Patel
Ranjith Ramakrishnan
Ammar ELWazir