76333 Commits
Author SHA1 Message Date
German Andryeyev 992830bab7 SWDEV-295555 - Add SVM mode query
The new query MemRangeAttribute::CoherencyMode can return current
coherency mode for the provided memory region. Coherency mode can
be one of the following types: FineGrain, CoarseGrain and
Indeterminate

Change-Id: Ib66feeeb14f57a8b1cc731c65bb3d0276d297ff7
2021-08-22 23:56:08 -07:00
Todd tiantuo Li 9458b7ea4d SWDEV-1 - Rembrandt support
Change-Id: Id5c37e130fb2c0bdc01b84997c85324121ec4df9


[ROCm/clr commit: ec411737aa]
2021-08-22 23:56:08 -07:00
Todd tiantuo Li ec411737aa SWDEV-1 - Rembrandt support
Change-Id: Id5c37e130fb2c0bdc01b84997c85324121ec4df9
2021-08-22 23:56:08 -07:00
Chauncey Hui 9595b4ee4e SWDEV-2 - Change OpenCL version number from 3349 to 3350
[ROCm/clr commit: 4bd84c2189]
2021-08-22 23:56:08 -07:00
Chauncey Hui 4bd84c2189 SWDEV-2 - Change OpenCL version number from 3349 to 3350 2021-08-22 23:56:08 -07:00
Jason Tang 4e818587a2 SWDEV-297294 - Fix TargetID typo
Change-Id: I351e38cbcaaf926f0561c96cf6e455e7167fd4be


[ROCm/clr commit: f42103c6a8]
2021-08-22 23:56:08 -07:00
Jason Tang f42103c6a8 SWDEV-297294 - Fix TargetID typo
Change-Id: I351e38cbcaaf926f0561c96cf6e455e7167fd4be
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko 48cbefdacf SWDEV-292408 - [PAL] Always force high clocks for HIP
Redshift sees around a 3x performance uplift this change.

Turning this on for OpenCL might cause unwanted behaviour, due to
apps like RSX running in the background all the time.

Change-Id: I9f32d5f2e05b6697a8aaa9ddf74474b5531bb7e1


[ROCm/clr commit: 2f00782829]
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko 2f00782829 SWDEV-292408 - [PAL] Always force high clocks for HIP
Redshift sees around a 3x performance uplift this change.

Turning this on for OpenCL might cause unwanted behaviour, due to
apps like RSX running in the background all the time.

Change-Id: I9f32d5f2e05b6697a8aaa9ddf74474b5531bb7e1
2021-08-22 23:56:08 -07:00
Chauncey Hui 23f1ed96c7 SWDEV-2 - Change OpenCL version number from 3348 to 3349
[ROCm/clr commit: 465a370216]
2021-08-22 23:56:08 -07:00
Chauncey Hui 465a370216 SWDEV-2 - Change OpenCL version number from 3348 to 3349 2021-08-22 23:56:08 -07:00
German Andryeyev b26c568a90 SWDEV-296329 - Add lock protection for Timestamp update
There is a possible race condition when signal reuse can have
access to a destroyed Timestamp object, because the callback
was running asynchronously. Use reference counter and lock
to allow asynchronous timestamp update

Change-Id: I6224f7c62cb0a03a7466fcc512e5e5afb06736fa


[ROCm/clr commit: ec89348291]
2021-08-22 23:56:08 -07:00
German Andryeyev ec89348291 SWDEV-296329 - Add lock protection for Timestamp update
There is a possible race condition when signal reuse can have
access to a destroyed Timestamp object, because the callback
was running asynchronously. Use reference counter and lock
to allow asynchronous timestamp update

Change-Id: I6224f7c62cb0a03a7466fcc512e5e5afb06736fa
2021-08-22 23:56:08 -07:00
Chauncey Hui ed845c3844 SWDEV-2 - Change OpenCL version number from 3347 to 3348
[ROCm/clr commit: 7d9fcd6c67]
2021-08-22 23:56:08 -07:00
Chauncey Hui 7d9fcd6c67 SWDEV-2 - Change OpenCL version number from 3347 to 3348 2021-08-22 23:56:08 -07:00
anusha GodavarthySurya 8af8d5bdc1 SWDEV-297215 - Set image descriptor as per the HSA specification for hsa_ext_image_descriptor_t
Change-Id: I0af0f09120f15a42349ec4de491df8aee7bfd46d


[ROCm/clr commit: 1884e4ca77]
2021-08-22 23:56:08 -07:00
anusha GodavarthySurya 1884e4ca77 SWDEV-297215 - Set image descriptor as per the HSA specification for hsa_ext_image_descriptor_t
Change-Id: I0af0f09120f15a42349ec4de491df8aee7bfd46d
2021-08-22 23:56:08 -07:00
Chauncey Hui 09660203c3 SWDEV-2 - Change OpenCL version number from 3346 to 3347
[ROCm/clr commit: 01a3857f5e]
2021-08-22 23:56:08 -07:00
Chauncey Hui 01a3857f5e SWDEV-2 - Change OpenCL version number from 3346 to 3347 2021-08-22 23:56:08 -07:00
Vladislav Sytchenko a4306451fe SWDEV-283981 - [PAL] Support hostcall SQ interrupt
Note that this requires base driver CL#2340320+ to have SQ interrupt
functionality enabled by default.

Change-Id: I04b936819ebe1eb7cf5de1db4fafe83af3a1b5f6


[ROCm/clr commit: 4171e9e0a3]
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko 4171e9e0a3 SWDEV-283981 - [PAL] Support hostcall SQ interrupt
Note that this requires base driver CL#2340320+ to have SQ interrupt
functionality enabled by default.

Change-Id: I04b936819ebe1eb7cf5de1db4fafe83af3a1b5f6
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko 135551359e SWDEV-273235 - Add ROCclrCompilerOptions cmake module
This module will be used to add any specific compiler options to ROCclr
and it's clients.

Currently it only adds a workaround to remove the MSVC flag /GR, which
is added by default CMake <3.20. This resolves the conflict of PAL
adding /GR-.

Change-Id: If83adb271bcec86812a6e9de940da3920fc75393


[ROCm/clr commit: ce9182e62b]
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko ce9182e62b SWDEV-273235 - Add ROCclrCompilerOptions cmake module
This module will be used to add any specific compiler options to ROCclr
and it's clients.

Currently it only adds a workaround to remove the MSVC flag /GR, which
is added by default CMake <3.20. This resolves the conflict of PAL
adding /GR-.

Change-Id: If83adb271bcec86812a6e9de940da3920fc75393
2021-08-22 23:56:08 -07:00
Chauncey Hui 1390a62a68 SWDEV-2 - Change OpenCL version number from 3345 to 3346
[ROCm/clr commit: 7873ef0601]
2021-08-22 23:56:08 -07:00
Chauncey Hui 7873ef0601 SWDEV-2 - Change OpenCL version number from 3345 to 3346 2021-08-22 23:56:08 -07:00
Rahul Garg 7f97db9c71 SWDEV-293742 - Remove external refs
Change-Id: Ib9e25a6beb97cc042bb3cc50338686a8dd09e21c


[ROCm/clr commit: e9c115ad78]
2021-08-22 23:56:08 -07:00
Rahul Garg e9c115ad78 SWDEV-293742 - Remove external refs
Change-Id: Ib9e25a6beb97cc042bb3cc50338686a8dd09e21c
2021-08-22 23:56:08 -07:00
Jason Tang 8235cb4462 SWDEV-296911 - Enable clgl interop for both MesaGL and OrcaGL
Change-Id: Ie3ad85a8335b1fc751812c09bb0cd30aad38dcae


[ROCm/clr commit: f165737096]
2021-08-22 23:56:08 -07:00
Jason Tang f165737096 SWDEV-296911 - Enable clgl interop for both MesaGL and OrcaGL
Change-Id: Ie3ad85a8335b1fc751812c09bb0cd30aad38dcae
2021-08-22 23:56:08 -07:00
Alex Xie 1ca153409c SWDEV-288853 - [OpenCL]: ASIC 1013 Bringup
This a cherry pick from the ASIC's branch.

Change-Id: Ic6e888f8fa96103d1e79432dd75e68faabd8cf6c


[ROCm/clr commit: ce5cc020af]
2021-08-22 23:56:08 -07:00
Alex Xie ce5cc020af SWDEV-288853 - [OpenCL]: ASIC 1013 Bringup
This a cherry pick from the ASIC's branch.

Change-Id: Ic6e888f8fa96103d1e79432dd75e68faabd8cf6c
2021-08-22 23:56:08 -07:00
kjayapra-amd c3e74a54e3 SWDEV-295144 - Change uint64_t to size_t to fix failure on 32-bit opencl.
Change-Id: I5c28e9c606dec1c956f3f48071d8a0271adfff22


[ROCm/clr commit: 788ae8595b]
2021-08-22 23:56:08 -07:00
kjayapra-amd 788ae8595b SWDEV-295144 - Change uint64_t to size_t to fix failure on 32-bit opencl.
Change-Id: I5c28e9c606dec1c956f3f48071d8a0271adfff22
2021-08-22 23:56:08 -07:00
Chauncey Hui ff622c4b4e SWDEV-2 - Change OpenCL version number from 3344 to 3345
[ROCm/clr commit: 650601c00e]
2021-08-22 23:56:08 -07:00
Chauncey Hui 650601c00e SWDEV-2 - Change OpenCL version number from 3344 to 3345 2021-08-22 23:56:08 -07:00
anusha GodavarthySurya fce3b20213 SWDEV-295251 - Avoid marker if queue is empty for DD to fix MT issue
Change-Id: I80be39ace9d93347f81ef8acd7858d43bc4a3f1e


[ROCm/clr commit: 682151f39d]
2021-08-22 23:56:08 -07:00
anusha GodavarthySurya 682151f39d SWDEV-295251 - Avoid marker if queue is empty for DD to fix MT issue
Change-Id: I80be39ace9d93347f81ef8acd7858d43bc4a3f1e
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko 1560d8d6fe SWDEV-240806 - Fix Windows build
Fixes error "All control paths should return a value".

Change-Id: I4718688b55b24862465e15ea0d64b32fa44b3299


[ROCm/clr commit: de53cd1903]
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko de53cd1903 SWDEV-240806 - Fix Windows build
Fixes error "All control paths should return a value".

Change-Id: I4718688b55b24862465e15ea0d64b32fa44b3299
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko 4a2da6ea45 SWDEV-293519 - [PAL] Limit mgpu SVM logic only to mgpu cases
Below logic allocates the host buffer whenever a subbuffer is created
from a SVM allocation. This is only needed for multi-device contexts.

HIP does not support multi-device contexts, hence this logic just ends
up performing unnecessary system allocations.

Change-Id: I8eae635f7c5289c52ef73434218c1658b788a456


[ROCm/clr commit: ffbf368f4c]
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko ffbf368f4c SWDEV-293519 - [PAL] Limit mgpu SVM logic only to mgpu cases
Below logic allocates the host buffer whenever a subbuffer is created
from a SVM allocation. This is only needed for multi-device contexts.

HIP does not support multi-device contexts, hence this logic just ends
up performing unnecessary system allocations.

Change-Id: I8eae635f7c5289c52ef73434218c1658b788a456
2021-08-22 23:56:08 -07:00
Chauncey Hui 840d5bbdb5 SWDEV-2 - Change OpenCL version number from 3343 to 3344
[ROCm/clr commit: 255f27fd7a]
2021-08-22 23:56:08 -07:00
Chauncey Hui 255f27fd7a SWDEV-2 - Change OpenCL version number from 3343 to 3344 2021-08-22 23:56:08 -07:00
anusha GodavarthySurya 730977698a SWDEV-240806 - Add methods to update kernel command parameters
Change-Id: Iba90a31f9c5d6d4f2b60b7ccf903325c03d4d245


[ROCm/clr commit: 050d54b503]
2021-08-22 23:56:08 -07:00
anusha GodavarthySurya 050d54b503 SWDEV-240806 - Add methods to update kernel command parameters
Change-Id: Iba90a31f9c5d6d4f2b60b7ccf903325c03d4d245
2021-08-22 23:56:08 -07:00
anusha GodavarthySurya aae046174c SWDEV-295251 - Remove waitEvent check in append
Change-Id: I994f3e7c67ed29c4ee46229c8bcd1448fc7f59ec


[ROCm/clr commit: de5168fdef]
2021-08-22 23:56:08 -07:00
anusha GodavarthySurya de5168fdef SWDEV-295251 - Remove waitEvent check in append
Change-Id: I994f3e7c67ed29c4ee46229c8bcd1448fc7f59ec
2021-08-22 23:56:08 -07:00
Chauncey Hui d46973bdc3 SWDEV-2 - Change OpenCL version number from 3342 to 3343
[ROCm/clr commit: 3d4fb78a45]
2021-08-22 23:56:08 -07:00
Chauncey Hui 3d4fb78a45 SWDEV-2 - Change OpenCL version number from 3342 to 3343 2021-08-22 23:56:08 -07:00
Aaron Liu 8979836575 SWDEV-294027 - [Lnx][YC] Add Yellow Carp support
Only add Roc path and don't use Pal path.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Change-Id: I7117e2dc3c3ad4c8d563e9bbdc721f70ddba51fd


[ROCm/clr commit: c6574cb906]
2021-08-22 23:56:08 -07:00