MT doesn't use GPU waits, but CPU for sync between engines.
Change the threshold values for CPU waits for direct dispatch.
That will bring behavior closer to MT.
Change-Id: Ia41c3cb812614962aff2746b6cf858f1bf77dda2
Add the hard limit of allocation size to be 1/2 available vram
to avoid allocation failure when allocation size equals to vram size.
Add printing block size in each round to report progress for long running
test
Add the block size skip info in result form(if any tests skipped).
Affected test:
rocrtstPerf.Memory_Async_Copy
Data Size Avg Time(us) Avg BW(GB/s) MinTime(us) Peak BW(GB/s)
128M 638759.570200 0.195692 637569.991000 0.196057
256M 1270058.822400 0.196841 1268425.758000 0.197095
Notice: Data Size larger than 512M is skipped due to hard limit of 1/2 vram size
Signed-off-by: Mengbing Wang <mengbing.wang@amd.com>
Change-Id: I4c4cea74a608272cc29d222b9399af26b34d7473
Add the hard limit of allocation size to be 1/2 available vram
to avoid allocation failure when allocation size equals to vram size.
Add printing block size in each round to report progress for long running
test
Add the block size skip info in result form(if any tests skipped).
Affected test:
rocrtstPerf.Memory_Async_Copy
Data Size Avg Time(us) Avg BW(GB/s) MinTime(us) Peak BW(GB/s)
128M 638759.570200 0.195692 637569.991000 0.196057
256M 1270058.822400 0.196841 1268425.758000 0.197095
Notice: Data Size larger than 512M is skipped due to hard limit of 1/2 vram size
Signed-off-by: Mengbing Wang <mengbing.wang@amd.com>
Change-Id: I4c4cea74a608272cc29d222b9399af26b34d7473
[ROCm/ROCR-Runtime commit: cf10c3bc35]
KFD changes are ready, all SVM tests should pass now. Skip SVM tests if
the SVM API is not supported.
Change-Id: I5e358565a0458eea45eae0aaf4969ce3a36574a7
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
KFD changes are ready, all SVM tests should pass now. Skip SVM tests if
the SVM API is not supported.
Change-Id: I5e358565a0458eea45eae0aaf4969ce3a36574a7
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: e8990cf830]
New properties SVMAPISupported added in Thunk spec HSA_CAPABILITY, read
from sysfs from KFD topology.
New local memory property flag CoherentHostAccess added to Thunk
HSA_MEMORYPROPERTY, read from sysfs from KFD topology.
Change-Id: I83933f0e5a61508508168873209dba4af0b77295
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
New properties SVMAPISupported added in Thunk spec HSA_CAPABILITY, read
from sysfs from KFD topology.
New local memory property flag CoherentHostAccess added to Thunk
HSA_MEMORYPROPERTY, read from sysfs from KFD topology.
Change-Id: I83933f0e5a61508508168873209dba4af0b77295
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: e8f369b385]
XNACK API for GPUs that support this mode. This API
makes calls to amdgpu driver to configure xnack mode.
It supports set xnack mode and query the current mode used.
Change-Id: If865fd0e3f900f008243dc49504e1a0694e1791a
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
XNACK API for GPUs that support this mode. This API
makes calls to amdgpu driver to configure xnack mode.
It supports set xnack mode and query the current mode used.
Change-Id: If865fd0e3f900f008243dc49504e1a0694e1791a
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
[ROCm/ROCR-Runtime commit: bb441d0bdd]
Add function definitions to support SVM (shared virtual memory)
and xnack set.
Change-Id: Ia97ad9d0c449d8d500d799f702e1a58e87d65a56
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Add function definitions to support SVM (shared virtual memory)
and xnack set.
Change-Id: Ia97ad9d0c449d8d500d799f702e1a58e87d65a56
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: c44a4be776]
Add svm (shared virtual memory) range and xnack mode
APIs.
Change-Id: Ibd8d7fe566dc200730da0c892caa71aad7589ebd
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Add svm (shared virtual memory) range and xnack mode
APIs.
Change-Id: Ibd8d7fe566dc200730da0c892caa71aad7589ebd
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
[ROCm/ROCR-Runtime commit: ce26348f3a]
Query the KFD interface version once and store it in a global variable.
This makes it more efficient for KFD APIs to query the API version
later.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I267f3465f754e78fb21a7c42c5877cd68eaa9d05
Query the KFD interface version once and store it in a global variable.
This makes it more efficient for KFD APIs to query the API version
later.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I267f3465f754e78fb21a7c42c5877cd68eaa9d05
[ROCm/ROCR-Runtime commit: 43ce63b68b]
HIP headers use few structure names as X, Y, and Z. This causes
compilation issues when the apps use similar names as macros.
Renamed the struct names to use reserved names such as
__X, __Y and __Z
Change-Id: I59416c3734f274e853c87d4856b7e616f6cee5f5
[ROCm/clr commit: 009543ec7a]
HIP headers use few structure names as X, Y, and Z. This causes
compilation issues when the apps use similar names as macros.
Renamed the struct names to use reserved names such as
__X, __Y and __Z
Change-Id: I59416c3734f274e853c87d4856b7e616f6cee5f5
HIP headers use few structure names as X, Y, and Z. This causes
compilation issues when the apps use similar names as macros.
Renamed the struct names to use reserved names such as
__X, __Y and __Z
Change-Id: I59416c3734f274e853c87d4856b7e616f6cee5f5
[ROCm/hip commit: b26ef8522e]
HIP headers use few structure names as X, Y, and Z. This causes
compilation issues when the apps use similar names as macros.
Renamed the struct names to use reserved names such as
__X, __Y and __Z
Change-Id: I59416c3734f274e853c87d4856b7e616f6cee5f5
Enabling both LC and HSAIL will cause the DYN macro to be redefined.
Rename it for each compiler to avoid name clashing.
Change-Id: I607f022f37c4d05bef4e3a8070d19bd3659d7bc2
[ROCm/clr commit: b771377665]
Enabling both LC and HSAIL will cause the DYN macro to be redefined.
Rename it for each compiler to avoid name clashing.
Change-Id: I607f022f37c4d05bef4e3a8070d19bd3659d7bc2