76333 Commity
Autor SHA1 Wiadomość Data
Sarbojit Sarkar 83e94d189c SWDEV-258579: hipMemcpy2D better error handling
Change-Id: I09378d6e31da99451e22cbe9276a5ff1ad4a1840


[ROCm/clr commit: a08ddb4b53]
2020-12-03 05:50:42 -05:00
Sarbojit Sarkar a08ddb4b53 SWDEV-258579: hipMemcpy2D better error handling
Change-Id: I09378d6e31da99451e22cbe9276a5ff1ad4a1840
2020-12-03 05:50:42 -05:00
Sarbojit Sarkar 4f0fe005b3 SWDEV-258579: hipMemcpy2D better error handling
Change-Id: I09378d6e31da99451e22cbe9276a5ff1ad4a1840


[ROCm/hip commit: 4c1f86699d]
2020-12-03 05:50:42 -05:00
Sarbojit Sarkar 4c1f86699d SWDEV-258579: hipMemcpy2D better error handling
Change-Id: I09378d6e31da99451e22cbe9276a5ff1ad4a1840
2020-12-03 05:50:42 -05:00
Chauncey Hui 882c0d99ec SWDEV-2 - Change OpenCL version number from 3236 to 3237
[ROCm/clr commit: 36c328842f]
2020-12-03 03:00:04 -05:00
Chauncey Hui 36c328842f SWDEV-2 - Change OpenCL version number from 3236 to 3237 2020-12-03 03:00:04 -05:00
Divya Shikre 129e3e8934 Fix for syntax error caused due to performance determinism commit.
Signed-off-by: Divya Shikre <DivyaUday.Shikre@amd.com>
Change-Id: I02fbfec667e7f96ab0d0662036cf339a56025ba6


[ROCm/rocm_smi_lib commit: a0d10e021b]
2020-12-02 16:31:01 -05:00
Divya Shikre a0d10e021b Fix for syntax error caused due to performance determinism commit.
Signed-off-by: Divya Shikre <DivyaUday.Shikre@amd.com>
Change-Id: I02fbfec667e7f96ab0d0662036cf339a56025ba6
2020-12-02 16:31:01 -05:00
Divya Shikre 08ba8bed83 Fix for syntax error caused due to performance determinism commit.
Signed-off-by: Divya Shikre <DivyaUday.Shikre@amd.com>
Change-Id: I02fbfec667e7f96ab0d0662036cf339a56025ba6


[ROCm/amdsmi commit: a0d10e021b]
2020-12-02 16:31:01 -05:00
Evgeny d7f56b632c SWDEV-258731 : cleanup
Change-Id: Iabcc81576eb8b6c0484eae820c3e25a896da6c5b


[ROCm/roctracer commit: b83ffeeab8]
2020-12-02 13:52:57 -06:00
Evgeny b83ffeeab8 SWDEV-258731 : cleanup
Change-Id: Iabcc81576eb8b6c0484eae820c3e25a896da6c5b
2020-12-02 13:52:57 -06:00
Evgeny 7e60bf163e SWDEV-255662 : spm kfd mode support
Change-Id: I840c7e92d3d5a59d8e5402c4d8ef86bc123dd07c
2020-12-02 13:02:45 -06:00
Evgeny 2adb15caff SWDEV-255662 : spm kfd mode support
Change-Id: I840c7e92d3d5a59d8e5402c4d8ef86bc123dd07c


[ROCm/rocprofiler commit: 7e60bf163e]
2020-12-02 13:02:45 -06:00
Divya Shikre 6d4fb11c6e Adding Performance Determinism Mode to rocm_smi lib, CLI & gtest.
A special mode of operation to achieve minimal performance variation by letting
the user have the ability to provide the desired frequency to be set as the soft limit.
The user can control the entry and exit to the mode via rocm-smi a mechanism to
enter / exit performance determinism mode as below.

Enter performance determinism mode:
- hold a lock
- write performance_determinism to power_dpm_force_performance_level
- write input clk_freq to pp_dpm_sclk
- release lock

Exit performance determinism_mode:
- hold a lock
- write auto to power_dpm_force_performance_level
- release lock

Signed-off-by: Divya Shikre <DivyaUday.Shikre@amd.com>
Change-Id: Ia24e27954cdf1c4337ffc83d8948fbdfaf4552d2


[ROCm/rocm_smi_lib commit: 60d0f3052f]
2020-12-02 11:11:00 -05:00
Divya Shikre 60d0f3052f Adding Performance Determinism Mode to rocm_smi lib, CLI & gtest.
A special mode of operation to achieve minimal performance variation by letting
the user have the ability to provide the desired frequency to be set as the soft limit.
The user can control the entry and exit to the mode via rocm-smi a mechanism to
enter / exit performance determinism mode as below.

Enter performance determinism mode:
- hold a lock
- write performance_determinism to power_dpm_force_performance_level
- write input clk_freq to pp_dpm_sclk
- release lock

Exit performance determinism_mode:
- hold a lock
- write auto to power_dpm_force_performance_level
- release lock

Signed-off-by: Divya Shikre <DivyaUday.Shikre@amd.com>
Change-Id: Ia24e27954cdf1c4337ffc83d8948fbdfaf4552d2
2020-12-02 11:11:00 -05:00
Divya Shikre 4fd8d18e22 Adding Performance Determinism Mode to rocm_smi lib, CLI & gtest.
A special mode of operation to achieve minimal performance variation by letting
the user have the ability to provide the desired frequency to be set as the soft limit.
The user can control the entry and exit to the mode via rocm-smi a mechanism to
enter / exit performance determinism mode as below.

Enter performance determinism mode:
- hold a lock
- write performance_determinism to power_dpm_force_performance_level
- write input clk_freq to pp_dpm_sclk
- release lock

Exit performance determinism_mode:
- hold a lock
- write auto to power_dpm_force_performance_level
- release lock

Signed-off-by: Divya Shikre <DivyaUday.Shikre@amd.com>
Change-Id: Ia24e27954cdf1c4337ffc83d8948fbdfaf4552d2


[ROCm/amdsmi commit: 60d0f3052f]
2020-12-02 11:11:00 -05:00
Evgeny Shcherbakov 1585ab7259 Merge "Adding dumping of HSA handles" into amd-staging
[ROCm/roctracer commit: 6a59675f01]
2020-12-02 06:35:04 -05:00
Evgeny Shcherbakov 6a59675f01 Merge "Adding dumping of HSA handles" into amd-staging 2020-12-02 06:35:04 -05:00
agodavar 2e6334e080 SWDEV-259210 : Handle invalid inputs for hipDeviceGetByPCIBusId and hipDeviceGetPCIBusId APIs
Change-Id: Iab48604941c4c715ee3357ace2e2d26dbc8cad33


[ROCm/clr commit: ef415ec610]
2020-12-02 00:01:54 -05:00
agodavar ef415ec610 SWDEV-259210 : Handle invalid inputs for hipDeviceGetByPCIBusId and hipDeviceGetPCIBusId APIs
Change-Id: Iab48604941c4c715ee3357ace2e2d26dbc8cad33
2020-12-02 00:01:54 -05:00
agodavar ab9e37b729 SWDEV-259210 : Handle invalid inputs for hipDeviceGetByPCIBusId and hipDeviceGetPCIBusId APIs
Change-Id: Iab48604941c4c715ee3357ace2e2d26dbc8cad33


[ROCm/hip commit: 9d56e96725]
2020-12-02 00:01:54 -05:00
agodavar 9d56e96725 SWDEV-259210 : Handle invalid inputs for hipDeviceGetByPCIBusId and hipDeviceGetPCIBusId APIs
Change-Id: Iab48604941c4c715ee3357ace2e2d26dbc8cad33
2020-12-02 00:01:54 -05:00
Jason Tang d47db14a32 SWDEV-260632 - [PAL] Report correct Target ID
Change-Id: Ia39395e2c02e7c95b3df93be1f8030b4fa734583


[ROCm/clr commit: 054f256589]
2020-12-01 18:33:25 -05:00
Jason Tang 054f256589 SWDEV-260632 - [PAL] Report correct Target ID
Change-Id: Ia39395e2c02e7c95b3df93be1f8030b4fa734583
2020-12-01 18:33:25 -05:00
Evgeny f2c9980647 fixing sqtt trace for zero size case
Change-Id: I75712485f518725af46a3b419339a212d1e762a0
2020-12-01 18:19:51 -05:00
Evgeny b781ea8577 fixing sqtt trace for zero size case
Change-Id: I75712485f518725af46a3b419339a212d1e762a0


[ROCm/rocprofiler commit: f2c9980647]
2020-12-01 18:19:51 -05:00
Evgeny e6a0c8a665 Adding dumping of HSA handles
Change-Id: I18e2cfdf2574110bffa09d30c7ac1d3941252939


[ROCm/roctracer commit: 7d8fd0606d]
2020-12-01 16:45:33 -05:00
Evgeny 7d8fd0606d Adding dumping of HSA handles
Change-Id: I18e2cfdf2574110bffa09d30c7ac1d3941252939
2020-12-01 16:45:33 -05:00
Sourabh Betigeri c692124ad9 SWDEV-255397: Added new perf test for hipMemset* APIs
Change-Id: Icb12360ebde003e006cc4dceccac7ebe42712a3f


[ROCm/hip-tests commit: 0855d7158c]
2020-12-01 12:30:58 -05:00
Sourabh Betigeri 0855d7158c SWDEV-255397: Added new perf test for hipMemset* APIs
Change-Id: Icb12360ebde003e006cc4dceccac7ebe42712a3f
2020-12-01 12:30:58 -05:00
Sourabh Betigeri fc68222435 SWDEV-255397: Added new perf test for hipMemset* APIs
Change-Id: Icb12360ebde003e006cc4dceccac7ebe42712a3f


[ROCm/clr commit: 4b3c04c3b0]
2020-12-01 12:30:58 -05:00
Sourabh Betigeri 4b3c04c3b0 SWDEV-255397: Added new perf test for hipMemset* APIs
Change-Id: Icb12360ebde003e006cc4dceccac7ebe42712a3f
2020-12-01 12:30:58 -05:00
Sourabh Betigeri cce5c88a64 SWDEV-255397: Added new perf test for hipMemset* APIs
Change-Id: Icb12360ebde003e006cc4dceccac7ebe42712a3f


[ROCm/hip commit: 33c98873fa]
2020-12-01 12:30:58 -05:00
Sourabh Betigeri 33c98873fa SWDEV-255397: Added new perf test for hipMemset* APIs
Change-Id: Icb12360ebde003e006cc4dceccac7ebe42712a3f
2020-12-01 12:30:58 -05:00
Yaxun (Sam) Liu bf2c3ef2dd Update documentation for supported clang options
Change-Id: I5d7017cd5c4335959fe5bae322e90aa46cdbc672


[ROCm/clr commit: b49d801c5d]
2020-12-01 12:00:10 -05:00
Yaxun (Sam) Liu b49d801c5d Update documentation for supported clang options
Change-Id: I5d7017cd5c4335959fe5bae322e90aa46cdbc672
2020-12-01 12:00:10 -05:00
Yaxun (Sam) Liu ba56afadd3 Update documentation for supported clang options
Change-Id: I5d7017cd5c4335959fe5bae322e90aa46cdbc672


[ROCm/hip commit: fe70aa4930]
2020-12-01 12:00:10 -05:00
Yaxun (Sam) Liu fe70aa4930 Update documentation for supported clang options
Change-Id: I5d7017cd5c4335959fe5bae322e90aa46cdbc672
2020-12-01 12:00:10 -05:00
Bill(Shuzhou) Liu 81ad23343c Add raslib fields to RDC
The new raslib fields are added to RDC for dmon.
* The rdc_field.data, rdc.h and rdc_bootstrap.py are changed
  for new fields.
* The RDC_FI_ECC_CORRECT_TOTAL and RDC_FI_ECC_UNCORRECT_TOTAL are
  removed from RdcSmiLib.cc, and will be gotten from raslib.

Change-Id: I4ee016e3d52e9d38b54406ca129da511f741c6d6
2020-12-01 10:56:36 -05:00
Bill(Shuzhou) Liu 17d5758923 Add raslib fields to RDC
The new raslib fields are added to RDC for dmon.
* The rdc_field.data, rdc.h and rdc_bootstrap.py are changed
  for new fields.
* The RDC_FI_ECC_CORRECT_TOTAL and RDC_FI_ECC_UNCORRECT_TOTAL are
  removed from RdcSmiLib.cc, and will be gotten from raslib.

Change-Id: I4ee016e3d52e9d38b54406ca129da511f741c6d6


[ROCm/rdc commit: 81ad23343c]
2020-12-01 10:56:36 -05:00
Chauncey Hui 55a8b68440 SWDEV-2 - Change OpenCL version number from 3235 to 3236
[ROCm/clr commit: e13577cc61]
2020-12-01 03:00:03 -05:00
Chauncey Hui e13577cc61 SWDEV-2 - Change OpenCL version number from 3235 to 3236 2020-12-01 03:00:03 -05:00
German Andryeyev 9c462f9a6d Disable worker thread creation for direct dispatch
Change-Id: I28f08ab9352310c9bf843fcb803a48f95ddf4676


[ROCm/clr commit: e4f51e063b]
2020-11-30 17:50:12 -05:00
German Andryeyev e4f51e063b Disable worker thread creation for direct dispatch
Change-Id: I28f08ab9352310c9bf843fcb803a48f95ddf4676
2020-11-30 17:50:12 -05:00
Michael LIAO 927ab284f9 Fix hostcall test build.
- As `long`/`ulong` on Windows has different bit sizes from Linux
  platforms, even compiled in 64-bit mode. Need to use portable data
  type `int64_t`/`uint64_t` as possible or use `long long` ones to
  match the prototype in LLVM IR.

Change-Id: I62fe16a2e53aa0f2f2b4069b8a1596b8db7050c9


[ROCm/clr commit: f3b63c004a]
2020-11-30 16:47:16 -05:00
Michael LIAO f3b63c004a Fix hostcall test build.
- As `long`/`ulong` on Windows has different bit sizes from Linux
  platforms, even compiled in 64-bit mode. Need to use portable data
  type `int64_t`/`uint64_t` as possible or use `long long` ones to
  match the prototype in LLVM IR.

Change-Id: I62fe16a2e53aa0f2f2b4069b8a1596b8db7050c9
2020-11-30 16:47:16 -05:00
Michael LIAO a031edb38f Fix hostcall test build.
- As `long`/`ulong` on Windows has different bit sizes from Linux
  platforms, even compiled in 64-bit mode. Need to use portable data
  type `int64_t`/`uint64_t` as possible or use `long long` ones to
  match the prototype in LLVM IR.

Change-Id: I62fe16a2e53aa0f2f2b4069b8a1596b8db7050c9


[ROCm/hip commit: be786dff8e]
2020-11-30 16:47:16 -05:00
Michael LIAO be786dff8e Fix hostcall test build.
- As `long`/`ulong` on Windows has different bit sizes from Linux
  platforms, even compiled in 64-bit mode. Need to use portable data
  type `int64_t`/`uint64_t` as possible or use `long long` ones to
  match the prototype in LLVM IR.

Change-Id: I62fe16a2e53aa0f2f2b4069b8a1596b8db7050c9
2020-11-30 16:47:16 -05:00
Bill(Shuzhou) Liu 4b3dbc4697 Use relative path to find librdc_bootstrap.so
The python script will search list of the installation folders to
find the librdc_bootstrap.so.

Change-Id: I52e444e6d153c318c731c4b2cd0d8e39b0fd31ca
2020-11-30 13:46:15 -05:00
Bill(Shuzhou) Liu 4839075a86 Use relative path to find librdc_bootstrap.so
The python script will search list of the installation folders to
find the librdc_bootstrap.so.

Change-Id: I52e444e6d153c318c731c4b2cd0d8e39b0fd31ca


[ROCm/rdc commit: 4b3dbc4697]
2020-11-30 13:46:15 -05:00