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Author SHA1 Message Date
Wenkai Du 730fddfcf3 Merge pull request #212 from wenkaidu/version 
Report HIP version in logs

[ROCm/rccl commit: 957be85944]
 2020-05-20 16:25:54 -07:00
Wenkai Du 957be85944 Merge pull request #212 from wenkaidu/version 
Report HIP version in logs
 2020-05-20 16:25:54 -07:00
Aryan Salmanpour 009eed8763 check for valid queue before accessing cuMask() 
Change-Id: I8d4b0dbcd097c2ec5c31dea5a3d0060f0864a7e8


[ROCm/clr commit: fec4adfd19]
 2020-05-20 16:23:09 -04:00
Aryan Salmanpour fec4adfd19 check for valid queue before accessing cuMask() 
Change-Id: I8d4b0dbcd097c2ec5c31dea5a3d0060f0864a7e8
 2020-05-20 16:23:09 -04:00
Saleel Kudchadker 33377ef6d7 Fix elapsed time calc for hipEventElapsedTime 
If the start and stop events have same command internally
then measure command end to command start
Change-Id: Ie70cfa37c06c06573f0ed58dab2bbe4434c1724b


[ROCm/clr commit: fe9aa9356b]
 2020-05-20 16:02:48 -04:00
Saleel Kudchadker fe9aa9356b Fix elapsed time calc for hipEventElapsedTime 
If the start and stop events have same command internally
then measure command end to command start
Change-Id: Ie70cfa37c06c06573f0ed58dab2bbe4434c1724b
 2020-05-20 16:02:48 -04:00
Saleel Kudchadker 7836dfd322 Fix elapsed time calc for hipEventElapsedTime 
If the start and stop events have same command internally
then measure command end to command start
Change-Id: Ie70cfa37c06c06573f0ed58dab2bbe4434c1724b


[ROCm/hip commit: 50be95e169]
 2020-05-20 16:02:48 -04:00
Saleel Kudchadker 50be95e169 Fix elapsed time calc for hipEventElapsedTime 
If the start and stop events have same command internally
then measure command end to command start
Change-Id: Ie70cfa37c06c06573f0ed58dab2bbe4434c1724b
 2020-05-20 16:02:48 -04:00
German Andryeyev e6b1dc9771 Add missing memory allocation in printf 
Change-Id: I452b676612b54f70106e7ef1bcb5ce2baf7b3ffc


[ROCm/clr commit: f56a052243]
 2020-05-20 14:49:59 -04:00
German Andryeyev f56a052243 Add missing memory allocation in printf 
Change-Id: I452b676612b54f70106e7ef1bcb5ce2baf7b3ffc
 2020-05-20 14:49:59 -04:00
Wenkai Du b449a3b36d Report HIP version in logs 
[ROCm/rccl commit: e41ab173cf]
 2020-05-20 18:15:32 +00:00
Wenkai Du e41ab173cf Report HIP version in logs 2020-05-20 18:15:32 +00:00
Alex Xie 48068bdb89 Fix compile error in certain version of GCC 
Change-Id: I27f021db908bf114a685427a47cd9f0d6b2e5693


[ROCm/clr commit: 966448c53b]
 2020-05-20 13:13:55 -04:00
Alex Xie 966448c53b Fix compile error in certain version of GCC 
Change-Id: I27f021db908bf114a685427a47cd9f0d6b2e5693
 2020-05-20 13:13:55 -04:00
German Andryeyev 9f69856aa4 Add a test case for async double memset 
Change-Id: I8a1df610c8d3d942651f258e7812e8697067c347


[ROCm/clr commit: 3ae839c85b]
 2020-05-20 12:52:29 -04:00
German Andryeyev 3ae839c85b Add a test case for async double memset 
Change-Id: I8a1df610c8d3d942651f258e7812e8697067c347
 2020-05-20 12:52:29 -04:00
German Andryeyev 20e64e1450 Add a test case for async double memset 
Change-Id: I8a1df610c8d3d942651f258e7812e8697067c347


[ROCm/hip commit: 4503d44e12]
 2020-05-20 12:52:29 -04:00
German Andryeyev 4503d44e12 Add a test case for async double memset 
Change-Id: I8a1df610c8d3d942651f258e7812e8697067c347
 2020-05-20 12:52:29 -04:00
German Andryeyev e20f40119c Fix async mem clear 
Optimization for the fence release removed a sync for mem fill.
Add simple const buffer management forr the filled pattern to avoid
pattern overwriting with the async fills.

Change-Id: I63773ac09ceec31d5396d24570e4647ff096326b


[ROCm/clr commit: 2ce6bbebc4]
 2020-05-20 11:13:41 -04:00
German Andryeyev 2ce6bbebc4 Fix async mem clear 
Optimization for the fence release removed a sync for mem fill.
Add simple const buffer management forr the filled pattern to avoid
pattern overwriting with the async fills.

Change-Id: I63773ac09ceec31d5396d24570e4647ff096326b
 2020-05-20 11:13:41 -04:00
Matt Arsenault 8789cbafa1 Don't add_subdirectory on a binary directory 
This doesn't make sense and didn't do anything.

Change-Id: If6cbcd9269d8d45b091f100318afd3ab9ec6ceec


[ROCm/clr commit: a38144dec7]
 2020-05-20 09:01:08 -04:00
Matt Arsenault a38144dec7 Don't add_subdirectory on a binary directory 
This doesn't make sense and didn't do anything.

Change-Id: If6cbcd9269d8d45b091f100318afd3ab9ec6ceec
 2020-05-20 09:01:08 -04:00
Chauncey Hui d400543947 Modified IpcDetach to return status instead of void. 
Change-Id: I68ed94b93f0383babe25eb046b4047d249a0fdc1


[ROCm/clr commit: 0af9c06968]
 2020-05-20 03:38:21 -04:00
Chauncey Hui 0af9c06968 Modified IpcDetach to return status instead of void. 
Change-Id: I68ed94b93f0383babe25eb046b4047d249a0fdc1
 2020-05-20 03:38:21 -04:00
Chauncey Hui 593b1c8be7 SWDEV-2 - Change OpenCL version number from 3144 to 3145 
[ROCm/clr commit: 60d6a28dc9]
 2020-05-20 03:00:03 -04:00
Chauncey Hui 60d6a28dc9 SWDEV-2 - Change OpenCL version number from 3144 to 3145 2020-05-20 03:00:03 -04:00
Evgeny 63c16c8804 fising mytest environment 
Change-Id: Ic48c95e711758c3e448c317bc78c1bceeb22362c


[ROCm/roctracer commit: 7c5cfafa30]
 2020-05-20 00:44:58 -05:00
Evgeny 7c5cfafa30 fising mytest environment 
Change-Id: Ic48c95e711758c3e448c317bc78c1bceeb22362c
 2020-05-20 00:44:58 -05:00
Matt Arsenault b65ba80252 Fix include directories for cltrace 
Change-Id: I8de82fa4b6ce7e1e869f1001d1710dc8673b7be5


[ROCm/clr commit: 7273fdedfe]
 2020-05-19 21:41:16 -04:00
Matt Arsenault 7273fdedfe Fix include directories for cltrace 
Change-Id: I8de82fa4b6ce7e1e869f1001d1710dc8673b7be5
 2020-05-19 21:41:16 -04:00
Laurent Morichetti 584ef1e1ca Clear mode.debug_en if !status.halt 
The 1st level trap handler jumps to the 2nd level trap handler on
context save requests or regular traps if (mode.debug_en
&& !status.halt) is true.

If we return from the 2nd level trap handler without status.halt=1, then
we need to make sure mode.debug_en is cleared, or we will re-enter the
2nd level trap handler again and again when trapsts.savectx is set.

Change-Id: I4db6369de8c91a32842f488a4df5c9d94fa65aa9
 2020-05-19 18:31:29 -07:00
Laurent Morichetti d70dc701a0 Clear mode.debug_en if !status.halt 
The 1st level trap handler jumps to the 2nd level trap handler on
context save requests or regular traps if (mode.debug_en
&& !status.halt) is true.

If we return from the 2nd level trap handler without status.halt=1, then
we need to make sure mode.debug_en is cleared, or we will re-enter the
2nd level trap handler again and again when trapsts.savectx is set.

Change-Id: I4db6369de8c91a32842f488a4df5c9d94fa65aa9


[ROCm/ROCR-Runtime commit: 584ef1e1ca]
 2020-05-19 18:31:29 -07:00
Matt Arsenault d2cb056d06 Remove include/ from #includes 
These are unnecessary and an obstacle to producing a relocatable
package.

Change-Id: I0059bf7a2d11fcece0cd7ab47d7545d0df4d7099


[ROCm/clr commit: 1d267c9c08]
 2020-05-19 19:35:09 -04:00
Matt Arsenault 1d267c9c08 Remove include/ from #includes 
These are unnecessary and an obstacle to producing a relocatable
package.

Change-Id: I0059bf7a2d11fcece0cd7ab47d7545d0df4d7099
 2020-05-19 19:35:09 -04:00
Aakash Sudhanwa c6c208099b Revert "Reenable cooperative groups" 
This reverts commit 7b00a525ba.

Reason for revert: <INSERT REASONING HERE>

Change-Id: I8954b37c354382804a139d80e2551c381fd9b2ed


[ROCm/clr commit: abc115bda8]
 2020-05-19 18:21:48 -04:00
Aakash Sudhanwa abc115bda8 Revert "Reenable cooperative groups" 
This reverts commit 82dc1a6343.

Reason for revert: <INSERT REASONING HERE>

Change-Id: I8954b37c354382804a139d80e2551c381fd9b2ed
 2020-05-19 18:21:48 -04:00
Evgeny d6cd83491e fix hsa_path 
Change-Id: I07c6a504ec1892f314fcbb207656baaf0e356864


[ROCm/roctracer commit: c956bb9c6b]
 2020-05-19 17:20:25 -05:00
Evgeny c956bb9c6b fix hsa_path 
Change-Id: I07c6a504ec1892f314fcbb207656baaf0e356864
 2020-05-19 17:20:25 -05:00
Jason Tang d917bbfc73 SWDEV-236894 - Rename LOG_LEVEL to AMD_LOG_LEVEL 
Change-Id: Ibdfaf0fb615ac343c05d0fa3c3ace9cbb592ecf3


[ROCm/clr commit: 49224d95c7]
 2020-05-19 17:32:24 -04:00
Jason Tang 49224d95c7 SWDEV-236894 - Rename LOG_LEVEL to AMD_LOG_LEVEL 
Change-Id: Ibdfaf0fb615ac343c05d0fa3c3ace9cbb592ecf3
 2020-05-19 17:32:24 -04:00
Chris Freehill 11b90a242a Return an error instead of assert when reading bad data 
Assert doesn't help with release builds.

Change-Id: Ib076791fd442e96c7544914cdf08774fc7a40a94


[ROCm/rocm_smi_lib commit: 754a993d32]
 2020-05-19 15:58:40 -04:00
Chris Freehill 754a993d32 Return an error instead of assert when reading bad data 
Assert doesn't help with release builds.

Change-Id: Ib076791fd442e96c7544914cdf08774fc7a40a94
 2020-05-19 15:58:40 -04:00
Chris Freehill ad964f67f5 Return an error instead of assert when reading bad data 
Assert doesn't help with release builds.

Change-Id: Ib076791fd442e96c7544914cdf08774fc7a40a94


[ROCm/amdsmi commit: 754a993d32]
 2020-05-19 15:58:40 -04:00
Jason Tang 1e58ddd549 Add dlerror to ICD to help future diagnosis 
Change-Id: Ieb95252ab671ff666fceee3349637683078a0f89


[ROCm/clr commit: 601cf7d4bb]
 2020-05-19 10:49:19 -04:00
Jason Tang 601cf7d4bb Add dlerror to ICD to help future diagnosis 
Change-Id: Ieb95252ab671ff666fceee3349637683078a0f89
 2020-05-19 10:49:19 -04:00
Rachida Kebichi 22f2375dd2 Added check trace with config. 
Change-Id: I1c71793c4c6f512288e92f70105f428c3f8671c4


[ROCm/roctracer commit: 8cece61689]
 2020-05-19 09:47:19 -05:00
Rachida Kebichi 8cece61689 Added check trace with config. 
Change-Id: I1c71793c4c6f512288e92f70105f428c3f8671c4
 2020-05-19 09:47:19 -05:00
Dittakavi Satyanvesh 8aef4b955b enable occupancy sample on HIP-Clang 
Change-Id: I236daad743bbbc7f8daa41e8157a4ff73058518b


[ROCm/hip-tests commit: ea913c964a]
 2020-05-19 03:08:19 -04:00
Dittakavi Satyanvesh ea913c964a enable occupancy sample on HIP-Clang 
Change-Id: I236daad743bbbc7f8daa41e8157a4ff73058518b
 2020-05-19 03:08:19 -04:00
Dittakavi Satyanvesh 4ab0a2c0d6 enable occupancy sample on HIP-Clang 
Change-Id: I236daad743bbbc7f8daa41e8157a4ff73058518b


[ROCm/clr commit: 4ed5c887c0]
 2020-05-19 03:08:19 -04:00