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Автор SHA1 Сообщение Дата
Pryor, Adam d0a89393df Remove ring hang (#391)
Change-Id: I856cd0949d3661911ab9302148aa1bc6e72abeed

Signed-off-by: adapryor <Adam.pryor@amd.com>
2025-05-29 11:58:46 -05:00
Pryor, Adam 69fde31369 Remove ring hang (#391)
Change-Id: I856cd0949d3661911ab9302148aa1bc6e72abeed

Signed-off-by: adapryor <Adam.pryor@amd.com>

[ROCm/amdsmi commit: d0a89393df]
2025-05-29 11:58:46 -05:00
Poag, Charis f89a8c895c Removed backwards compatibility for jpeg_activity/vcn_activity (#357)
Updated:
- Removed backwards compatibility for jpeg_activity/vcn_activity
- On supported ASICs users can use XCP (partition) stat values:
  jpeg_busy and vcn_busy

Signed-off-by: Charis Poag <Charis.Poag@amd.com>
2025-05-29 11:58:06 -05:00
Poag, Charis b88ee7cc5a Removed backwards compatibility for jpeg_activity/vcn_activity (#357)
Updated:
- Removed backwards compatibility for jpeg_activity/vcn_activity
- On supported ASICs users can use XCP (partition) stat values:
  jpeg_busy and vcn_busy

Signed-off-by: Charis Poag <Charis.Poag@amd.com>

[ROCm/amdsmi commit: f89a8c895c]
2025-05-29 11:58:06 -05:00
David Yat Sin d52f1d0453 rocr: Remove extra check for page-aligned
ROCr initially had a bug where memory allocations that were not 4K
aligned were internally 4K aligned but ROCr would not keep track
of user-requested size. This would cause some pointer_info queries
to fail, but HIP was already aligning the buffer sizes for IPC
requests. For backward compatibility accross 2 minor versions,
we allowed IPC look-ups to be both aligned and un-aligned.
Removing this check as this 4 minor versions have been released
since then.
2025-05-29 12:35:15 -04:00
David Yat Sin 8f7c7458aa rocr: Remove extra check for page-aligned
ROCr initially had a bug where memory allocations that were not 4K
aligned were internally 4K aligned but ROCr would not keep track
of user-requested size. This would cause some pointer_info queries
to fail, but HIP was already aligning the buffer sizes for IPC
requests. For backward compatibility accross 2 minor versions,
we allowed IPC look-ups to be both aligned and un-aligned.
Removing this check as this 4 minor versions have been released
since then.


[ROCm/ROCR-Runtime commit: d52f1d0453]
2025-05-29 12:35:15 -04:00
Belton-Schure, Aidan c8a720088f SWDEV-527851 SWDEV-527890 SWDEV-529456 - Update vector types test (#172)
* Update vector types test

* update MakeVector to be host+device function

* Add regression testing

* Add tests for subscript operator

Change-Id: Ifac85aaa6cd6d6bd96c4239414e38f284e2a2d54

* Fix unused vars

Change-Id: I6bc2da76dbf962db5d75ea5a84bf16b66f8ba6ba

---------

Co-authored-by: Aidan Belton <abeltons@amd.com>

[ROCm/hip-tests commit: ef6c95f6ce]
2025-05-29 21:38:20 +05:30
Belton-Schure, Aidan ef6c95f6ce SWDEV-527851 SWDEV-527890 SWDEV-529456 - Update vector types test (#172)
* Update vector types test

* update MakeVector to be host+device function

* Add regression testing

* Add tests for subscript operator

Change-Id: Ifac85aaa6cd6d6bd96c4239414e38f284e2a2d54

* Fix unused vars

Change-Id: I6bc2da76dbf962db5d75ea5a84bf16b66f8ba6ba

---------

Co-authored-by: Aidan Belton <abeltons@amd.com>
2025-05-29 21:38:20 +05:30
Narlo, Joseph 8724658c14 [SWDEV-535389] Removed unused definition (#402)
Signed-off-by: Arif, Maisam <Maisam.Arif@amd.com>
Co-authored-by: Arif, Maisam <Maisam.Arif@amd.com>
2025-05-29 10:48:16 -05:00
Narlo, Joseph fea816ee47 [SWDEV-535389] Removed unused definition (#402)
Signed-off-by: Arif, Maisam <Maisam.Arif@amd.com>
Co-authored-by: Arif, Maisam <Maisam.Arif@amd.com>

[ROCm/amdsmi commit: 8724658c14]
2025-05-29 10:48:16 -05:00
Maisam Arif 2481573184 Removed leftover AMDSMI_MAX_DRIVER_VERSION_LENGTH
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Change-Id: Iee95728e6eb6d7962ed658b9a77feccb88e24e92
2025-05-29 10:34:21 -05:00
Maisam Arif 3db6b8b36c Removed leftover AMDSMI_MAX_DRIVER_VERSION_LENGTH
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Change-Id: Iee95728e6eb6d7962ed658b9a77feccb88e24e92


[ROCm/amdsmi commit: 2481573184]
2025-05-29 10:34:21 -05:00
Elwazir, Ammar f39871096b Headers include fix (#426)
* Header Fixes

* Format fix

[ROCm/rocprofiler-sdk commit: 8f86aee2ca]
2025-05-29 10:04:09 -05:00
Elwazir, Ammar 8f86aee2ca Headers include fix (#426)
* Header Fixes

* Format fix
2025-05-29 10:04:09 -05:00
Indic, Vladimir ec2fe441e6 GFX950 Stochastic PC sampling (#344)
* GFX950 Stochastic PC sampling

* Use actual type instead void *

* error reporting if the pcs method is inappropriate

[ROCm/rocprofiler-sdk commit: 2bb64e9c9a]
2025-05-29 17:59:52 +05:30
Indic, Vladimir 2bb64e9c9a GFX950 Stochastic PC sampling (#344)
* GFX950 Stochastic PC sampling

* Use actual type instead void *

* error reporting if the pcs method is inappropriate
2025-05-29 17:59:52 +05:30
Manocha, Rahul 98c34321f1 SWDEV-460098 - Fix error codes for hipLaunchKernel APIs to match cuda (#206)
Co-authored-by: Branislav Brzak <branislav.brzak@amd.com>

[ROCm/hip-tests commit: ea8a7e1e54]
2025-05-29 13:20:49 +05:30
Manocha, Rahul ea8a7e1e54 SWDEV-460098 - Fix error codes for hipLaunchKernel APIs to match cuda (#206)
Co-authored-by: Branislav Brzak <branislav.brzak@amd.com>
2025-05-29 13:20:49 +05:30
Luzynski, Sebastian 700692bae2 SWDEV-508967 - Fix error code mismatch for hipBindTexture API (#423)
Signed-off-by: Sebastian Luzynski <Sebastian.Luzynski@amd.com>

[ROCm/clr commit: 109795f6c9]
2025-05-29 13:13:12 +05:30
Luzynski, Sebastian 109795f6c9 SWDEV-508967 - Fix error code mismatch for hipBindTexture API (#423)
Signed-off-by: Sebastian Luzynski <Sebastian.Luzynski@amd.com>
2025-05-29 13:13:12 +05:30
Belton-Schure, Aidan 0fcf5ef2c5 Fix vec operator[] (#419)
Change-Id: I1b6767b8b7f7dbcf9998662dd9f8ae3a96e1deca

[ROCm/clr commit: 9533ceb8aa]
2025-05-29 13:09:34 +05:30
Belton-Schure, Aidan 9533ceb8aa Fix vec operator[] (#419)
Change-Id: I1b6767b8b7f7dbcf9998662dd9f8ae3a96e1deca
2025-05-29 13:09:34 +05:30
Betigeri, Sourabh 328aeb758c SWDEV-508963 - Change hipMemcpy subset of methods to use const qualifier for src (#139) (#418)
Change-Id: Ia5b68bacff634d3d9e5757f515bac50887895bc3

[ROCm/clr commit: c0c3aa3637]
2025-05-29 13:07:51 +05:30
Betigeri, Sourabh c0c3aa3637 SWDEV-508963 - Change hipMemcpy subset of methods to use const qualifier for src (#139) (#418)
Change-Id: Ia5b68bacff634d3d9e5757f515bac50887895bc3
2025-05-29 13:07:51 +05:30
Betigeri, Sourabh 8ad6c23d58 SWDEV-508963 - Change hipMemcpy subset of methods to use const qualifier for src (#55) (#98)
Change-Id: I03bb31f48c3552774eb7354a50f5eb77e0c3d44b

[ROCm/hip commit: 754b45b91d]
2025-05-29 13:07:25 +05:30
Betigeri, Sourabh 754b45b91d SWDEV-508963 - Change hipMemcpy subset of methods to use const qualifier for src (#55) (#98)
Change-Id: I03bb31f48c3552774eb7354a50f5eb77e0c3d44b
2025-05-29 13:07:25 +05:30
Manocha, Rahul 88c3041e15 SWDEV-460098 - Match hipModuleLaunchKernel and hipModuleLaunchCooperativeKernel with cuda (#414)
Co-authored-by: Rahul Manocha <rmanocha@amd.com>

[ROCm/clr commit: 7177f1c280]
2025-05-29 13:04:54 +05:30
Manocha, Rahul 7177f1c280 SWDEV-460098 - Match hipModuleLaunchKernel and hipModuleLaunchCooperativeKernel with cuda (#414)
Co-authored-by: Rahul Manocha <rmanocha@amd.com>
2025-05-29 13:04:54 +05:30
Arandjelovic, Marko 15b839954e SWDEV-531009 - Revert SWDEV-525653 - Make hipGetDeviceProperties and hipChooseDevice use th… (#381)
This reverts commit d4275741ba.

[ROCm/clr commit: df06b2b692]
2025-05-29 13:02:45 +05:30
Arandjelovic, Marko df06b2b692 SWDEV-531009 - Revert SWDEV-525653 - Make hipGetDeviceProperties and hipChooseDevice use th… (#381)
This reverts commit b006380ff6.
2025-05-29 13:02:45 +05:30
Dittakavi, Satyanvesh 89e363cab1 SWDEV-530921 - Remove the usage of __AMDGCN_WAVEFRONT_SIZE as compile time constant (#82)
[ROCm/hip commit: b32b642fef]
2025-05-29 12:53:42 +05:30
Dittakavi, Satyanvesh b32b642fef SWDEV-530921 - Remove the usage of __AMDGCN_WAVEFRONT_SIZE as compile time constant (#82) 2025-05-29 12:53:42 +05:30
Dittakavi, Satyanvesh dd3eaa86ff SWDEV-530921 - Remove the usage of __AMDGCN_WAVEFRONT_SIZE as compile time constant (#330)
* SWDEV-530921 - Remove the usage of __AMDGCN_WAVEFRONT_SIZE as compile time constant

* wavefrontsize builtin to be used only in device compilation

* SWDEV-530921 - Remove the usage of __AMDGCN_WAVEFRONT_SIZE as compile time constant

[ROCm/clr commit: 54503f0d67]
2025-05-29 12:52:10 +05:30
Dittakavi, Satyanvesh 54503f0d67 SWDEV-530921 - Remove the usage of __AMDGCN_WAVEFRONT_SIZE as compile time constant (#330)
* SWDEV-530921 - Remove the usage of __AMDGCN_WAVEFRONT_SIZE as compile time constant

* wavefrontsize builtin to be used only in device compilation

* SWDEV-530921 - Remove the usage of __AMDGCN_WAVEFRONT_SIZE as compile time constant
2025-05-29 12:52:10 +05:30
David Yat Sin c3978d03a4 rocr: Update async-scratch reclaim API doc 2025-05-28 20:08:52 -04:00
David Yat Sin 4515a48355 rocr: Update async-scratch reclaim API doc
[ROCm/ROCR-Runtime commit: c3978d03a4]
2025-05-28 20:08:52 -04:00
Narlo, Joseph 4cd0f3391e [SWDEV-522996] Syncing Unified Header and AMDSMI (#355)
* Update doxygen help text and formatting

Signed-off-by: josnarlo <Joseph.Narlo@amd.com>
2025-05-28 19:06:10 -05:00
Narlo, Joseph cd3128f997 [SWDEV-522996] Syncing Unified Header and AMDSMI (#355)
* Update doxygen help text and formatting

Signed-off-by: josnarlo <Joseph.Narlo@amd.com>

[ROCm/amdsmi commit: 4cd0f3391e]
2025-05-28 19:06:10 -05:00
Narlo, Joseph b6d638d942 [SWDEV-532125] Remove_Unused_Definitions (#385)
Signed-off-by: Narlo, Joseph <Joseph.Narlo@amd.com>
2025-05-28 18:49:08 -05:00
Narlo, Joseph 8d6253d772 [SWDEV-532125] Remove_Unused_Definitions (#385)
Signed-off-by: Narlo, Joseph <Joseph.Narlo@amd.com>

[ROCm/amdsmi commit: b6d638d942]
2025-05-28 18:49:08 -05:00
Narlo, Joseph 7c29b4eab8 [SWDEV-532131] Update String Lengths (#383)
Signed-off-by: Narlo, Joseph <Joseph.Narlo@amd.com>
2025-05-28 18:31:30 -05:00
Narlo, Joseph 41522f665f [SWDEV-532131] Update String Lengths (#383)
Signed-off-by: Narlo, Joseph <Joseph.Narlo@amd.com>

[ROCm/amdsmi commit: 7c29b4eab8]
2025-05-28 18:31:30 -05:00
Narlo, Joseph 9862db63dd [SWDEV-532129] Update amdsmi asic info (#369)
* Added `subsystem_id` to `amdsmi_get_gpu_asic_info`
---------
Signed-off-by: Narlo, Joseph <Joseph.Narlo@amd.com>
2025-05-28 18:26:58 -05:00
Narlo, Joseph d2bf77401e [SWDEV-532129] Update amdsmi asic info (#369)
* Added `subsystem_id` to `amdsmi_get_gpu_asic_info`
---------
Signed-off-by: Narlo, Joseph <Joseph.Narlo@amd.com>

[ROCm/amdsmi commit: 9862db63dd]
2025-05-28 18:26:58 -05:00
Narlo, Joseph f3a5cc9cd5 [SWDEV-533941] Align P2P input struct (#395)
* Removed `amdsmi_io_link_type_t` and replaced with alredy implemented amdsmi_link_type_t
Signed-off-by: josnarlo <Joseph.Narlo@amd.com>
2025-05-28 18:22:19 -05:00
Narlo, Joseph 1fbddb6dcc [SWDEV-533941] Align P2P input struct (#395)
* Removed `amdsmi_io_link_type_t` and replaced with alredy implemented amdsmi_link_type_t
Signed-off-by: josnarlo <Joseph.Narlo@amd.com>

[ROCm/amdsmi commit: f3a5cc9cd5]
2025-05-28 18:22:19 -05:00
Narlo, Joseph 38a1fadf44 [SWDEV-535200] Remove deprecated function amdsmi_get_power_info_v2 (#397)
Signed-off-by: josnarlo <Joseph.Narlo@amd.com>
Signed-off-by: Narlo, Joseph <Joseph.Narlo@amd.com>
2025-05-28 18:09:13 -05:00
Narlo, Joseph 59f5827164 [SWDEV-535200] Remove deprecated function amdsmi_get_power_info_v2 (#397)
Signed-off-by: josnarlo <Joseph.Narlo@amd.com>
Signed-off-by: Narlo, Joseph <Joseph.Narlo@amd.com>

[ROCm/amdsmi commit: 38a1fadf44]
2025-05-28 18:09:13 -05:00
Narlo, Joseph 7b3c85e970 [SWDEV-534438] Update structure amdsmi_bdf_t (#388)
Signed-off-by: josnarlo <Joseph.Narlo@amd.com>
Signed-off-by: Narlo, Joseph <Joseph.Narlo@amd.com>
2025-05-28 18:05:43 -05:00
Narlo, Joseph 268c4e59ed [SWDEV-534438] Update structure amdsmi_bdf_t (#388)
Signed-off-by: josnarlo <Joseph.Narlo@amd.com>
Signed-off-by: Narlo, Joseph <Joseph.Narlo@amd.com>

[ROCm/amdsmi commit: 7b3c85e970]
2025-05-28 18:05:43 -05:00