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22 Commit-ok

Szerző SHA1 Üzenet Dátum
Mustafa Abduljabbar 2621e0254e [Device] WarpSpeed enablement and single node CU and perf opt for MI350 (#2073)
[ROCm/rccl commit: d009ab144e]
2025-12-11 19:04:35 -05:00
Mustafa Abduljabbar eb0b1387b7 [Device] Adjust threadblock size for gfx950 to increase LL64/Simple performance for AR, RS and AG (#1978)
* Add initial commit to increase tb size to 512
* Fix LL perf issue when subset of NCCL_MAX_NTHREADS is used
Adding a constant to barrier_generic logic from using fallback logic when nthreads < NCCL_MAX_NTHREADS and nthreads == blockDim.X
* Adjust nthreads for LL
* Opt threads for reduce_scatter upper small range
* Add macro for single node
* Restrict MSCCL to 256 threads to prevent mem access fault
* Support pre-MI350 compatibility
* Partially refactor threadblock size override
* Use const macros instead of numerals
* opt out of unused function

[ROCm/rccl commit: 12f51ba8bf]
2025-10-29 23:24:32 -05:00
alex-breslow-amd a5256e6219 MSCCL: Unland PR1788 + Fix for MSCCL Data Corruption (#1960)
- Earlier fix PR1788 is no longer necessary after ROCr fix and pre-ROCr fix workaround
- Inserts an s_waitcnt vmcnt(0), which fixes a data corruption issue in MSCCL

[ROCm/rccl commit: 154350baaf]
2025-10-15 10:32:25 -07:00
mberenjk c76a4492f1 Added useAcc as a template parameter to address the performance regression (#1856)
* Added useAcc as a template parameter to address the 2% performance regression in allreduceWithBias
---------

Co-authored-by: Marzieh Berenjkoub <mberenjk@amd.com>


[ROCm/rccl commit: c61152baa4]
2025-08-14 15:58:54 -05:00
Wenkai Du e031a4a2f4 msccl: use special send for LL on gfx950 (#1788)
[ROCm/rccl commit: ae9642d4bc]
2025-07-03 04:16:18 -05:00
corey-derochie-amd e95578ef4c removed gfx940 and gfx941 (#1606)
* removed gfx940 and gfx941

* removed gfx940 and gfx941

* Update "gfx94" to "gfx942" in init.cc

* Updated remaining "gfx94" updates to "gfx942"

* Update filenames and variables from gfx940 to gfx942

---------

Co-authored-by: akolliasAMD <akollias@amd.com>

[ROCm/rccl commit: 6505639cf4]
2025-03-20 09:34:53 -06:00
Pedram Alizadeh acf5822a6c enable building rccl for gfx950 (#1571)
[ROCm/rccl commit: f268553ee4]
2025-02-25 16:13:48 -05:00
akolliasAMD ae0b3c19d2 reverted the syncLDS back to syncthreads (#1554)
[ROCm/rccl commit: aedbc95735]
2025-02-19 10:44:32 -07:00
Pedram Alizadeh 37f46f1669 reverting the (Reduce NPKit latency overhead in MSCCL kernel) PR #893 (#1525)
[ROCm/rccl commit: 0e5f4d0662]
2025-02-14 11:03:43 -05:00
corey-derochie-amd abc9197821 Removing duplicate definitions of INC_COLL_TRACE and traceData macros (#1500)
They are nearly identical, except the common.h definition sets `collTrace->channelId`.

[ROCm/rccl commit: f77308a2fe]
2025-01-22 16:50:27 -07:00
akolliasAMD 38e189bb1e removed hcc mentions (#1291)
[ROCm/rccl commit: d6c317d6ae]
2024-08-14 15:04:13 -06:00
Wenkai Du 54e4899607 Template unroll for RCCL kernels (#1250)
* Template unroll for RCCL kernels

* Adding unroll template arg during CMake hipification

* Reduce linking parallel jobs to avoid OOM in CI

* Workaround issues with UT tests

SWDEV-469533: register spill fix is needed for mainline build
LWPCOMMLIBS-369: cannot enable 112 channels with 80 CUs
Use -parallel-jobs=8 for linking

* CI: do not use -j 16 when building

* CI: use -j 8 when building

* Only reduce parallel linking job for CI extended

* Restore original jenkins command. Change parallel linking jobs in cmake

* Disable MSCCLPP

---------

Co-authored-by: gilbertlee-amd <gilbert.lee@amd.com>

[ROCm/rccl commit: 89349f2ce4]
2024-07-19 08:15:59 -07:00
akolliasAMD 942555fd21 gfx12 initial enablement (#1219)
[ROCm/rccl commit: 63e4d76e23]
2024-07-10 13:32:09 -06:00
Wenkai Du b3e9d2d61b NPKit: separate time stamps for GPU access from different blocks (#1229)
To avoid races in memory access in GPU

[ROCm/rccl commit: 9d8f68b4ee]
2024-06-28 08:00:22 -07:00
Wenkai Du 3906e992f8 MSCCL: add support for out-of-place all reduce (#1156)
[ROCm/rccl commit: 4e1b8c1cbb]
2024-04-28 19:49:09 -07:00
Shilei Tian 9a203f439c SWDEV-455705: Fix an UB that could lead to miscompilation (#1155)
[ROCm/rccl commit: efe99057b0]
2024-04-25 10:10:01 -07:00
Wenkai Du e494f29235 Replace __HIP_PLATFORM_HCC__ with __HIP_PLATFORM_AMD__ (#1154)
[ROCm/rccl commit: 9e0c9b4ed8]
2024-04-25 07:19:18 -07:00
mberenjk da835cff9c replacing rccl_bfloat16 with hip_bfloat16 (#1126)
Co-authored-by: mberenjk <mberenjk@amd.com>

[ROCm/rccl commit: 428837ffe4]
2024-04-11 11:30:37 -05:00
Andy li e373bd44bf Enable fp8 support (#1101)
* initial checkin

* resolve cr comments

* resolve the build issue

* fix the data correctless issue

* update fp8 header file and update the unit test for fp8 support

* remove fp16 from fp8 headers

* fix ut issue and catch up the latest code from develop

* udate according to cr comments

* update ut according to cr comments

* update num floats for each SumPostDiv from 4 to 6

* update fp8 header file name

* fix the typo

[ROCm/rccl commit: 6777e65c1d]
2024-03-08 15:17:53 -08:00
Wenkai Du d5f5091e5d Merge remote-tracking branch 'rccl/develop' into 2.19.4
[ROCm/rccl commit: d999d9ad21]
2024-02-09 11:31:03 -06:00
Wenkai Du 4f4e52aafe Merge remote-tracking branch 'rccl/develop' into 2.19.4
[ROCm/rccl commit: 1a134b283b]
2024-01-31 11:53:10 -06:00
BertanDogancay 404d398bac Merge remote-tracking branch 'nccl/v2.19' into develop
[ROCm/rccl commit: 81ddf9de89]
2024-01-24 15:25:33 -08:00